Commit 170dd56d authored by Phil Sutter's avatar Phil Sutter Committed by Herbert Xu

crypto: mv_cesa - add an expiry timer in case anything goes wrong

The timer triggers when 500ms have gone by after triggering the engine
and no completion interrupt was received. The callback then tries to
sanitise things as well as possible.
Signed-off-by: default avatarPhil Sutter <phil.sutter@viprinet.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent b8840098
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
#define MV_CESA "MV-CESA:" #define MV_CESA "MV-CESA:"
#define MAX_HW_HASH_SIZE 0xFFFF #define MAX_HW_HASH_SIZE 0xFFFF
#define MV_CESA_EXPIRE 500 /* msec */
/* /*
* STM: * STM:
...@@ -87,6 +88,7 @@ struct crypto_priv { ...@@ -87,6 +88,7 @@ struct crypto_priv {
spinlock_t lock; spinlock_t lock;
struct crypto_queue queue; struct crypto_queue queue;
enum engine_status eng_st; enum engine_status eng_st;
struct timer_list completion_timer;
struct crypto_async_request *cur_req; struct crypto_async_request *cur_req;
struct req_progress p; struct req_progress p;
int max_req_size; int max_req_size;
...@@ -138,6 +140,29 @@ struct mv_req_hash_ctx { ...@@ -138,6 +140,29 @@ struct mv_req_hash_ctx {
int count_add; int count_add;
}; };
static void mv_completion_timer_callback(unsigned long unused)
{
int active = readl(cpg->reg + SEC_ACCEL_CMD) & SEC_CMD_EN_SEC_ACCL0;
printk(KERN_ERR MV_CESA
"completion timer expired (CESA %sactive), cleaning up.\n",
active ? "" : "in");
del_timer(&cpg->completion_timer);
writel(SEC_CMD_DISABLE_SEC, cpg->reg + SEC_ACCEL_CMD);
while(readl(cpg->reg + SEC_ACCEL_CMD) & SEC_CMD_DISABLE_SEC)
printk(KERN_INFO MV_CESA "%s: waiting for engine finishing\n", __func__);
cpg->eng_st = ENGINE_W_DEQUEUE;
wake_up_process(cpg->queue_th);
}
static void mv_setup_timer(void)
{
setup_timer(&cpg->completion_timer, &mv_completion_timer_callback, 0);
mod_timer(&cpg->completion_timer,
jiffies + msecs_to_jiffies(MV_CESA_EXPIRE));
}
static void compute_aes_dec_key(struct mv_ctx *ctx) static void compute_aes_dec_key(struct mv_ctx *ctx)
{ {
struct crypto_aes_ctx gen_aes_key; struct crypto_aes_ctx gen_aes_key;
...@@ -273,12 +298,8 @@ static void mv_process_current_q(int first_block) ...@@ -273,12 +298,8 @@ static void mv_process_current_q(int first_block)
sizeof(struct sec_accel_config)); sizeof(struct sec_accel_config));
/* GO */ /* GO */
mv_setup_timer();
writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD); writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD);
/*
* XXX: add timer if the interrupt does not occur for some mystery
* reason
*/
} }
static void mv_crypto_algo_completion(void) static void mv_crypto_algo_completion(void)
...@@ -357,12 +378,8 @@ static void mv_process_hash_current(int first_block) ...@@ -357,12 +378,8 @@ static void mv_process_hash_current(int first_block)
memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config)); memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config));
/* GO */ /* GO */
mv_setup_timer();
writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD); writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD);
/*
* XXX: add timer if the interrupt does not occur for some mystery
* reason
*/
} }
static inline int mv_hash_import_sha1_ctx(const struct mv_req_hash_ctx *ctx, static inline int mv_hash_import_sha1_ctx(const struct mv_req_hash_ctx *ctx,
...@@ -888,6 +905,10 @@ irqreturn_t crypto_int(int irq, void *priv) ...@@ -888,6 +905,10 @@ irqreturn_t crypto_int(int irq, void *priv)
if (!(val & SEC_INT_ACCEL0_DONE)) if (!(val & SEC_INT_ACCEL0_DONE))
return IRQ_NONE; return IRQ_NONE;
if (!del_timer(&cpg->completion_timer)) {
printk(KERN_WARNING MV_CESA
"got an interrupt but no pending timer?\n");
}
val &= ~SEC_INT_ACCEL0_DONE; val &= ~SEC_INT_ACCEL0_DONE;
writel(val, cpg->reg + FPGA_INT_STATUS); writel(val, cpg->reg + FPGA_INT_STATUS);
writel(val, cpg->reg + SEC_ACCEL_INT_STATUS); writel(val, cpg->reg + SEC_ACCEL_INT_STATUS);
......
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