Commit 17b16054 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Fix bits vs. bytes mixup in dbuf block size computation

The spec used to say "8bpp" which someone took to mean 8 bytes per
pixel when in fact it was supposed to be 8 bits per pixel. The
spec has been updated to make it more clear now. Fix the code
to match.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181221171436.8218-4-ville.syrjala@linux.intel.comReviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent 692927f4
...@@ -4617,7 +4617,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate, ...@@ -4617,7 +4617,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
intel_pstate); intel_pstate);
if (INTEL_GEN(dev_priv) >= 11 && if (INTEL_GEN(dev_priv) >= 11 &&
fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 8) fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 1)
wp->dbuf_block_size = 256; wp->dbuf_block_size = 256;
else else
wp->dbuf_block_size = 512; wp->dbuf_block_size = 512;
......
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