Commit 17fb4f29 authored by Jubin John's avatar Jubin John Committed by Doug Ledford

staging/rdma/hfi1: Fix code alignment

Fix code alignment to fix checkpatch check:
CHECK: Alignment should match open parenthesis
Reviewed-by: default avatarDennis Dalessandro <dennis.dalessandro@intel.com>
Reviewed-by: default avatarIra Weiny <ira.weiny@intel.com>
Reviewed-by: default avatarMike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: default avatarJubin John <jubin.john@intel.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent 4d114fdd
This diff is collapsed.
......@@ -701,7 +701,8 @@ static inline int process_rcv_packet(struct hfi1_packet *packet, int thread)
*/
prefetch_range(packet->ebuf,
packet->tlen - ((packet->rcd->rcvhdrqentsize -
(rhf_hdrq_offset(packet->rhf) + 2)) * 4));
(rhf_hdrq_offset(packet->rhf)
+ 2)) * 4));
}
/*
......@@ -958,9 +959,9 @@ int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
prescan_rxq(rcd, &packet);
while (last == RCV_PKT_OK) {
if (unlikely(dd->do_drop && atomic_xchg(&dd->drop_packet,
DROP_PACKET_OFF) == DROP_PACKET_ON)) {
if (unlikely(dd->do_drop &&
atomic_xchg(&dd->drop_packet, DROP_PACKET_OFF) ==
DROP_PACKET_ON)) {
dd->do_drop = 0;
/* On to the next packet */
......@@ -990,8 +991,7 @@ int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
if (seq != rcd->seq_cnt)
last = RCV_PKT_DONE;
if (needset) {
dd_dev_info(dd,
"Switching to NO_DMA_RTAIL\n");
dd_dev_info(dd, "Switching to NO_DMA_RTAIL\n");
set_all_nodma_rtail(dd);
needset = 0;
}
......
......@@ -115,11 +115,9 @@ static DEFINE_MUTEX(eprom_mutex);
static void write_enable(struct hfi1_devdata *dd)
{
/* raise signal */
write_csr(dd, ASIC_GPIO_OUT,
read_csr(dd, ASIC_GPIO_OUT) | EPROM_WP_N);
write_csr(dd, ASIC_GPIO_OUT, read_csr(dd, ASIC_GPIO_OUT) | EPROM_WP_N);
/* raise enable */
write_csr(dd, ASIC_GPIO_OE,
read_csr(dd, ASIC_GPIO_OE) | EPROM_WP_N);
write_csr(dd, ASIC_GPIO_OE, read_csr(dd, ASIC_GPIO_OE) | EPROM_WP_N);
}
/*
......@@ -128,11 +126,9 @@ static void write_enable(struct hfi1_devdata *dd)
static void write_disable(struct hfi1_devdata *dd)
{
/* lower signal */
write_csr(dd, ASIC_GPIO_OUT,
read_csr(dd, ASIC_GPIO_OUT) & ~EPROM_WP_N);
write_csr(dd, ASIC_GPIO_OUT, read_csr(dd, ASIC_GPIO_OUT) & ~EPROM_WP_N);
/* lower enable */
write_csr(dd, ASIC_GPIO_OE,
read_csr(dd, ASIC_GPIO_OE) & ~EPROM_WP_N);
write_csr(dd, ASIC_GPIO_OE, read_csr(dd, ASIC_GPIO_OE) & ~EPROM_WP_N);
}
/*
......@@ -472,8 +468,7 @@ int eprom_init(struct hfi1_devdata *dd)
/* reset EPROM to be sure it is in a good state */
/* set reset */
write_csr(dd, ASIC_EEP_CTL_STAT,
ASIC_EEP_CTL_STAT_EP_RESET_SMASK);
write_csr(dd, ASIC_EEP_CTL_STAT, ASIC_EEP_CTL_STAT_EP_RESET_SMASK);
/* clear reset, set speed */
write_csr(dd, ASIC_EEP_CTL_STAT,
EP_SPEED_FULL << ASIC_EEP_CTL_STAT_RATE_SPI_SHIFT);
......
......@@ -1145,8 +1145,8 @@ static int user_init(struct file *fp)
* has done it.
*/
if (fd->subctxt) {
ret = wait_event_interruptible(uctxt->wait,
!test_bit(HFI1_CTXT_MASTER_UNINIT,
ret = wait_event_interruptible(uctxt->wait, !test_bit(
HFI1_CTXT_MASTER_UNINIT,
&uctxt->event_flags));
goto expected;
}
......
......@@ -393,13 +393,19 @@ static int invalid_header(struct hfi1_devdata *dd, const char *what,
static int verify_css_header(struct hfi1_devdata *dd, struct css_header *css)
{
/* verify CSS header fields (most sizes are in DW, so add /4) */
if (invalid_header(dd, "module_type", css->module_type, CSS_MODULE_TYPE) ||
invalid_header(dd, "header_len", css->header_len, (sizeof(struct firmware_file) / 4)) ||
invalid_header(dd, "header_version", css->header_version, CSS_HEADER_VERSION) ||
invalid_header(dd, "module_vendor", css->module_vendor, CSS_MODULE_VENDOR) ||
if (invalid_header(dd, "module_type", css->module_type,
CSS_MODULE_TYPE) ||
invalid_header(dd, "header_len", css->header_len,
(sizeof(struct firmware_file) / 4)) ||
invalid_header(dd, "header_version", css->header_version,
CSS_HEADER_VERSION) ||
invalid_header(dd, "module_vendor", css->module_vendor,
CSS_MODULE_VENDOR) ||
invalid_header(dd, "key_size", css->key_size, KEY_SIZE / 4) ||
invalid_header(dd, "modulus_size", css->modulus_size, KEY_SIZE / 4) ||
invalid_header(dd, "exponent_size", css->exponent_size, EXPONENT_SIZE / 4)) {
invalid_header(dd, "modulus_size", css->modulus_size,
KEY_SIZE / 4) ||
invalid_header(dd, "exponent_size", css->exponent_size,
EXPONENT_SIZE / 4)) {
return -EINVAL;
}
return 0;
......@@ -532,7 +538,8 @@ static int obtain_one_firmware(struct hfi1_devdata *dd, const char *name,
/* css->size check failed */
dd_dev_err(dd,
"invalid firmware header field size: expected 0x%lx or 0x%lx, actual 0x%x\n",
fdet->fw->size / 4, (fdet->fw->size - AUGMENT_SIZE) / 4,
fdet->fw->size / 4,
(fdet->fw->size - AUGMENT_SIZE) / 4,
css->size);
ret = -EINVAL;
......@@ -908,8 +915,8 @@ static int run_rsa(struct hfi1_devdata *dd, const char *who,
* is not keeping the error high.
*/
write_csr(dd, MISC_ERR_CLEAR,
MISC_ERR_STATUS_MISC_FW_AUTH_FAILED_ERR_SMASK
| MISC_ERR_STATUS_MISC_KEY_MISMATCH_ERR_SMASK);
MISC_ERR_STATUS_MISC_FW_AUTH_FAILED_ERR_SMASK |
MISC_ERR_STATUS_MISC_KEY_MISMATCH_ERR_SMASK);
/*
* All that is left are the current errors. Print warnings on
* authorization failure details, if any. Firmware authorization
......@@ -938,7 +945,8 @@ static void load_security_variables(struct hfi1_devdata *dd,
write_rsa_data(dd, MISC_CFG_RSA_MU, fdet->mu, MU_SIZE);
/* Security variables d. Write the header */
write_streamed_rsa_data(dd, MISC_CFG_SHA_PRELOAD,
(u8 *)fdet->css_header, sizeof(struct css_header));
(u8 *)fdet->css_header,
sizeof(struct css_header));
}
/* return the 8051 firmware state */
......@@ -1066,11 +1074,11 @@ void sbus_request(struct hfi1_devdata *dd,
u8 receiver_addr, u8 data_addr, u8 command, u32 data_in)
{
write_csr(dd, ASIC_CFG_SBUS_REQUEST,
((u64)data_in << ASIC_CFG_SBUS_REQUEST_DATA_IN_SHIFT)
| ((u64)command << ASIC_CFG_SBUS_REQUEST_COMMAND_SHIFT)
| ((u64)data_addr << ASIC_CFG_SBUS_REQUEST_DATA_ADDR_SHIFT)
| ((u64)receiver_addr
<< ASIC_CFG_SBUS_REQUEST_RECEIVER_ADDR_SHIFT));
((u64)data_in << ASIC_CFG_SBUS_REQUEST_DATA_IN_SHIFT) |
((u64)command << ASIC_CFG_SBUS_REQUEST_COMMAND_SHIFT) |
((u64)data_addr << ASIC_CFG_SBUS_REQUEST_DATA_ADDR_SHIFT) |
((u64)receiver_addr <<
ASIC_CFG_SBUS_REQUEST_RECEIVER_ADDR_SHIFT));
}
/*
......@@ -1551,8 +1559,8 @@ int parse_platform_config(struct hfi1_devdata *dd)
header2 = *(ptr + 1);
if (header1 != ~header2) {
dd_dev_info(dd, "%s: Failed validation at offset %ld\n",
__func__, (ptr -
(u32 *)dd->platform_config.data));
__func__, (ptr - (u32 *)
dd->platform_config.data));
goto bail;
}
......@@ -1597,7 +1605,8 @@ int parse_platform_config(struct hfi1_devdata *dd)
dd_dev_info(dd,
"%s: Unknown data table %d, offset %ld\n",
__func__, table_type,
(ptr - (u32 *)dd->platform_config.data));
(ptr - (u32 *)
dd->platform_config.data));
goto bail; /* We don't trust this file now */
}
pcfgcache->config_tables[table_type].table = ptr;
......@@ -1654,7 +1663,8 @@ int parse_platform_config(struct hfi1_devdata *dd)
}
static int get_platform_fw_field_metadata(struct hfi1_devdata *dd, int table,
int field, u32 *field_len_bits, u32 *field_start_bits)
int field, u32 *field_len_bits,
u32 *field_start_bits)
{
struct platform_config_cache *pcfgcache = &dd->pcfg_cache;
u32 *src_ptr = NULL;
......@@ -1714,8 +1724,9 @@ static int get_platform_fw_field_metadata(struct hfi1_devdata *dd, int table,
* @len: length of memory pointed by @data in bytes.
*/
int get_platform_config_field(struct hfi1_devdata *dd,
enum platform_config_table_type_encoding table_type,
int table_index, int field_index, u32 *data, u32 len)
enum platform_config_table_type_encoding
table_type, int table_index, int field_index,
u32 *data, u32 len)
{
int ret = 0, wlen = 0, seek = 0;
u32 field_len_bits = 0, field_start_bits = 0, *src_ptr = NULL;
......@@ -1727,7 +1738,8 @@ int get_platform_config_field(struct hfi1_devdata *dd,
return -EINVAL;
ret = get_platform_fw_field_metadata(dd, table_type, field_index,
&field_len_bits, &field_start_bits);
&field_len_bits,
&field_start_bits);
if (ret)
return -EINVAL;
......
......@@ -1715,8 +1715,9 @@ void restore_pci_variables(struct hfi1_devdata *dd);
int do_pcie_gen3_transition(struct hfi1_devdata *dd);
int parse_platform_config(struct hfi1_devdata *dd);
int get_platform_config_field(struct hfi1_devdata *dd,
enum platform_config_table_type_encoding table_type,
int table_index, int field_index, u32 *data, u32 len);
enum platform_config_table_type_encoding
table_type, int table_index, int field_index,
u32 *data, u32 len);
const char *get_unit_name(int unit);
const char *get_card_name(struct rvt_dev_info *rdi);
......
......@@ -135,16 +135,14 @@ void handle_linkup_change(struct hfi1_devdata *dd, u32 linkup)
set_up_vl15(dd, dd->vau, dd->vl15_init);
assign_remote_cm_au_table(dd, dd->vcu);
ppd->neighbor_guid =
read_csr(dd,
DC_DC8051_STS_REMOTE_GUID);
read_csr(dd, DC_DC8051_STS_REMOTE_GUID);
ppd->neighbor_type =
read_csr(dd, DC_DC8051_STS_REMOTE_NODE_TYPE) &
DC_DC8051_STS_REMOTE_NODE_TYPE_VAL_MASK;
ppd->neighbor_port_number =
read_csr(dd, DC_DC8051_STS_REMOTE_PORT_NO) &
DC_DC8051_STS_REMOTE_PORT_NO_VAL_SMASK;
dd_dev_info(dd,
"Neighbor GUID: %llx Neighbor type %d\n",
dd_dev_info(dd, "Neighbor GUID: %llx Neighbor type %d\n",
ppd->neighbor_guid,
ppd->neighbor_type);
}
......
......@@ -981,9 +981,8 @@ static int set_port_states(struct hfi1_pportdata *ppd, struct opa_smp *smp,
link_state = HLS_DN_DOWNDEF;
else if (phys_state == IB_PORTPHYSSTATE_POLLING) {
link_state = HLS_DN_POLL;
set_link_down_reason(ppd,
OPA_LINKDOWN_REASON_FM_BOUNCE, 0,
OPA_LINKDOWN_REASON_FM_BOUNCE);
set_link_down_reason(ppd, OPA_LINKDOWN_REASON_FM_BOUNCE,
0, OPA_LINKDOWN_REASON_FM_BOUNCE);
} else if (phys_state == IB_PORTPHYSSTATE_DISABLED)
link_state = HLS_DN_DISABLE;
else {
......@@ -1185,7 +1184,9 @@ static int __subn_set_opa_portinfo(struct opa_smp *smp, u32 am, u8 *data,
if (lwe == OPA_LINK_WIDTH_RESET ||
lwe == OPA_LINK_WIDTH_RESET_OLD) {
set_link_width_downgrade_enabled(ppd,
ppd->link_width_downgrade_supported);
ppd->
link_width_downgrade_supported
);
} else if ((lwe & ~ppd->link_width_downgrade_supported) == 0) {
/* only set and apply if something changed */
if (lwe != ppd->link_width_downgrade_enabled) {
......@@ -1216,10 +1217,11 @@ static int __subn_set_opa_portinfo(struct opa_smp *smp, u32 am, u8 *data,
}
for (i = 0; i < ppd->vls_supported; i++) {
if ((i % 2) == 0)
mtu = enum_to_mtu((pi->neigh_mtu.pvlx_to_mtu[i / 2] >> 4)
& 0xF);
mtu = enum_to_mtu((pi->neigh_mtu.pvlx_to_mtu[i / 2] >>
4) & 0xF);
else
mtu = enum_to_mtu(pi->neigh_mtu.pvlx_to_mtu[i / 2] & 0xF);
mtu = enum_to_mtu(pi->neigh_mtu.pvlx_to_mtu[i / 2] &
0xF);
if (mtu == 0xffff) {
pr_warn("SubnSet(OPA_PortInfo) mtu invalid %d (0x%x)\n",
mtu,
......@@ -2320,7 +2322,8 @@ static void a0_portstatus(struct hfi1_pportdata *ppd,
}
static int pma_get_opa_portstatus(struct opa_pma_mad *pmp,
struct ib_device *ibdev, u8 port, u32 *resp_len)
struct ib_device *ibdev,
u8 port, u32 *resp_len)
{
struct opa_port_status_req *req =
(struct opa_port_status_req *)pmp->data;
......@@ -2563,7 +2566,8 @@ static void pma_get_opa_port_dctrs(struct ib_device *ibdev,
}
static int pma_get_opa_datacounters(struct opa_pma_mad *pmp,
struct ib_device *ibdev, u8 port, u32 *resp_len)
struct ib_device *ibdev,
u8 port, u32 *resp_len)
{
struct opa_port_data_counters_msg *req =
(struct opa_port_data_counters_msg *)pmp->data;
......@@ -2777,7 +2781,8 @@ static void pma_get_opa_port_ectrs(struct ib_device *ibdev,
}
static int pma_get_opa_porterrors(struct opa_pma_mad *pmp,
struct ib_device *ibdev, u8 port, u32 *resp_len)
struct ib_device *ibdev,
u8 port, u32 *resp_len)
{
size_t response_data_size;
struct _port_ectrs *rsp;
......@@ -2950,7 +2955,8 @@ static int pma_get_ib_portcounters(struct ib_pma_mad *pmp,
}
static int pma_get_opa_errorinfo(struct opa_pma_mad *pmp,
struct ib_device *ibdev, u8 port, u32 *resp_len)
struct ib_device *ibdev,
u8 port, u32 *resp_len)
{
size_t response_data_size;
struct _port_ei *rsp;
......@@ -3047,7 +3053,8 @@ static int pma_get_opa_errorinfo(struct opa_pma_mad *pmp,
}
static int pma_set_opa_portstatus(struct opa_pma_mad *pmp,
struct ib_device *ibdev, u8 port, u32 *resp_len)
struct ib_device *ibdev,
u8 port, u32 *resp_len)
{
struct opa_clear_port_status *req =
(struct opa_clear_port_status *)pmp->data;
......@@ -3194,7 +3201,8 @@ static int pma_set_opa_portstatus(struct opa_pma_mad *pmp,
}
static int pma_set_opa_errorinfo(struct opa_pma_mad *pmp,
struct ib_device *ibdev, u8 port, u32 *resp_len)
struct ib_device *ibdev,
u8 port, u32 *resp_len)
{
struct _port_ei *rsp;
struct opa_port_error_info_msg *req;
......@@ -3295,8 +3303,7 @@ static int __subn_get_opa_cong_info(struct opa_smp *smp, u32 am, u8 *data,
}
static int __subn_get_opa_cong_setting(struct opa_smp *smp, u32 am,
u8 *data,
struct ib_device *ibdev,
u8 *data, struct ib_device *ibdev,
u8 port, u32 *resp_len)
{
int i;
......
......@@ -219,8 +219,7 @@ int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev,
pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL2,
&dd->pcie_devctl2);
pci_read_config_dword(dd->pcidev, PCI_CFG_MSIX0, &dd->pci_msix0);
pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE1,
&dd->pci_lnkctl3);
pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE1, &dd->pci_lnkctl3);
pci_read_config_dword(dd->pcidev, PCIE_CFG_TPH2, &dd->pci_tph2);
return 0;
......@@ -432,19 +431,15 @@ void hfi1_enable_intx(struct pci_dev *pdev)
void restore_pci_variables(struct hfi1_devdata *dd)
{
pci_write_config_word(dd->pcidev, PCI_COMMAND, dd->pci_command);
pci_write_config_dword(dd->pcidev,
PCI_BASE_ADDRESS_0, dd->pcibar0);
pci_write_config_dword(dd->pcidev,
PCI_BASE_ADDRESS_1, dd->pcibar1);
pci_write_config_dword(dd->pcidev,
PCI_ROM_ADDRESS, dd->pci_rom);
pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0, dd->pcibar0);
pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1, dd->pcibar1);
pci_write_config_dword(dd->pcidev, PCI_ROM_ADDRESS, dd->pci_rom);
pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL, dd->pcie_devctl);
pcie_capability_write_word(dd->pcidev, PCI_EXP_LNKCTL, dd->pcie_lnkctl);
pcie_capability_write_word(dd->pcidev, PCI_EXP_DEVCTL2,
dd->pcie_devctl2);
pci_write_config_dword(dd->pcidev, PCI_CFG_MSIX0, dd->pci_msix0);
pci_write_config_dword(dd->pcidev, PCIE_CFG_SPCIE1,
dd->pci_lnkctl3);
pci_write_config_dword(dd->pcidev, PCIE_CFG_SPCIE1, dd->pci_lnkctl3);
pci_write_config_dword(dd->pcidev, PCIE_CFG_TPH2, dd->pci_tph2);
}
......@@ -758,7 +753,8 @@ static int load_eq_table(struct hfi1_devdata *dd, const u8 eq[11][3], u8 fs,
dd_dev_err(dd, " prec attn post\n");
}
dd_dev_err(dd, " p%02d: %02x %02x %02x\n",
i, (u32)eq[i][0], (u32)eq[i][1], (u32)eq[i][2]);
i, (u32)eq[i][0], (u32)eq[i][1],
(u32)eq[i][2]);
dd_dev_err(dd, " %02x %02x %02x\n",
(u32)c_minus1, (u32)c0, (u32)c_plus1);
hit_error = 1;
......@@ -840,8 +836,8 @@ static void write_gasket_interrupt(struct hfi1_devdata *dd, int index,
u16 code, u16 data)
{
write_csr(dd, ASIC_PCIE_SD_INTRPT_LIST + (index * 8),
(((u64)code << ASIC_PCIE_SD_INTRPT_LIST_INTRPT_CODE_SHIFT)
| ((u64)data << ASIC_PCIE_SD_INTRPT_LIST_INTRPT_DATA_SHIFT)));
(((u64)code << ASIC_PCIE_SD_INTRPT_LIST_INTRPT_CODE_SHIFT) |
((u64)data << ASIC_PCIE_SD_INTRPT_LIST_INTRPT_DATA_SHIFT)));
}
/*
......@@ -851,14 +847,13 @@ static void arm_gasket_logic(struct hfi1_devdata *dd)
{
u64 reg;
reg = (((u64)1 << dd->hfi1_id)
<< ASIC_PCIE_SD_HOST_CMD_INTRPT_CMD_SHIFT)
| ((u64)pcie_serdes_broadcast[dd->hfi1_id]
<< ASIC_PCIE_SD_HOST_CMD_SBUS_RCVR_ADDR_SHIFT
| ASIC_PCIE_SD_HOST_CMD_SBR_MODE_SMASK
| ((u64)SBR_DELAY_US & ASIC_PCIE_SD_HOST_CMD_TIMER_MASK)
<< ASIC_PCIE_SD_HOST_CMD_TIMER_SHIFT
);
reg = (((u64)1 << dd->hfi1_id) <<
ASIC_PCIE_SD_HOST_CMD_INTRPT_CMD_SHIFT) |
((u64)pcie_serdes_broadcast[dd->hfi1_id] <<
ASIC_PCIE_SD_HOST_CMD_SBUS_RCVR_ADDR_SHIFT |
ASIC_PCIE_SD_HOST_CMD_SBR_MODE_SMASK |
((u64)SBR_DELAY_US & ASIC_PCIE_SD_HOST_CMD_TIMER_MASK) <<
ASIC_PCIE_SD_HOST_CMD_TIMER_SHIFT);
write_csr(dd, ASIC_PCIE_SD_HOST_CMD, reg);
/* read back to push the write */
read_csr(dd, ASIC_PCIE_SD_HOST_CMD);
......@@ -1087,8 +1082,10 @@ int do_pcie_gen3_transition(struct hfi1_devdata *dd)
default_pset = DEFAULT_MCP_PSET;
}
pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL101,
(fs << PCIE_CFG_REG_PL101_GEN3_EQ_LOCAL_FS_SHIFT)
| (lf << PCIE_CFG_REG_PL101_GEN3_EQ_LOCAL_LF_SHIFT));
(fs <<
PCIE_CFG_REG_PL101_GEN3_EQ_LOCAL_FS_SHIFT) |
(lf <<
PCIE_CFG_REG_PL101_GEN3_EQ_LOCAL_LF_SHIFT));
ret = load_eq_table(dd, eq, fs, div);
if (ret)
goto done;
......@@ -1107,10 +1104,10 @@ int do_pcie_gen3_transition(struct hfi1_devdata *dd)
}
dd_dev_info(dd, "%s: using EQ Pset %u\n", __func__, pcie_pset);
pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL106,
((1 << pcie_pset)
<< PCIE_CFG_REG_PL106_GEN3_EQ_PSET_REQ_VEC_SHIFT)
| PCIE_CFG_REG_PL106_GEN3_EQ_EVAL2MS_DISABLE_SMASK
| PCIE_CFG_REG_PL106_GEN3_EQ_PHASE23_EXIT_MODE_SMASK);
((1 << pcie_pset) <<
PCIE_CFG_REG_PL106_GEN3_EQ_PSET_REQ_VEC_SHIFT) |
PCIE_CFG_REG_PL106_GEN3_EQ_EVAL2MS_DISABLE_SMASK |
PCIE_CFG_REG_PL106_GEN3_EQ_PHASE23_EXIT_MODE_SMASK);
/*
* step 5b: Do post firmware download steps via SBus
......
......@@ -766,8 +766,8 @@ struct send_context *sc_alloc(struct hfi1_devdata *dd, int type,
/* set the default partition key */
write_kctxt_csr(dd, hw_context, SC(CHECK_PARTITION_KEY),
(DEFAULT_PKEY &
SC(CHECK_PARTITION_KEY_VALUE_MASK))
<< SC(CHECK_PARTITION_KEY_VALUE_SHIFT));
SC(CHECK_PARTITION_KEY_VALUE_MASK)) <<
SC(CHECK_PARTITION_KEY_VALUE_SHIFT));
/* per context type checks */
if (type == SC_USER) {
......@@ -1237,8 +1237,7 @@ int sc_enable(struct send_context *sc)
*/
reg = read_kctxt_csr(dd, sc->hw_context, SC(ERR_STATUS));
if (reg)
write_kctxt_csr(dd, sc->hw_context, SC(ERR_CLEAR),
reg);
write_kctxt_csr(dd, sc->hw_context, SC(ERR_CLEAR), reg);
/*
* The HW PIO initialization engine can handle only one init
......@@ -2034,8 +2033,8 @@ void free_credit_return(struct hfi1_devdata *dd)
for (i = 0; i < num_numa; i++) {
if (dd->cr_base[i].va) {
dma_free_coherent(&dd->pcidev->dev,
TXE_NUM_CONTEXTS
* sizeof(struct credit_return),
TXE_NUM_CONTEXTS *
sizeof(struct credit_return),
dd->cr_base[i].va,
dd->cr_base[i].pa);
}
......
......@@ -1773,8 +1773,8 @@ static inline void rc_cancel_ack(struct rvt_qp *qp)
* schedule a response to be sent.
*/
static noinline int rc_rcv_error(struct hfi1_other_headers *ohdr, void *data,
struct rvt_qp *qp, u32 opcode, u32 psn, int diff,
struct hfi1_ctxtdata *rcd)
struct rvt_qp *qp, u32 opcode, u32 psn,
int diff, struct hfi1_ctxtdata *rcd)
{
struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
struct rvt_ack_entry *e;
......
......@@ -283,7 +283,8 @@ int hfi1_ruc_check_hdr(struct hfi1_ibport *ibp, struct hfi1_ib_header *hdr,
if (!gid_ok(&hdr->u.l.grh.dgid, ibp->rvp.gid_prefix,
guid))
goto err;
if (!gid_ok(&hdr->u.l.grh.sgid,
if (!gid_ok(
&hdr->u.l.grh.sgid,
qp->alt_ah_attr.grh.dgid.global.subnet_prefix,
qp->alt_ah_attr.grh.dgid.global.interface_id))
goto err;
......@@ -317,7 +318,8 @@ int hfi1_ruc_check_hdr(struct hfi1_ibport *ibp, struct hfi1_ib_header *hdr,
if (!gid_ok(&hdr->u.l.grh.dgid, ibp->rvp.gid_prefix,
guid))
goto err;
if (!gid_ok(&hdr->u.l.grh.sgid,
if (!gid_ok(
&hdr->u.l.grh.sgid,
qp->remote_ah_attr.grh.dgid.global.subnet_prefix,
qp->remote_ah_attr.grh.dgid.global.interface_id))
goto err;
......
......@@ -1622,12 +1622,10 @@ static void sdma_setlengen(struct sdma_engine *sde)
* generation counter.
*/
write_sde_csr(sde, SD(LEN_GEN),
(sde->descq_cnt / 64) << SD(LEN_GEN_LENGTH_SHIFT)
);
(sde->descq_cnt / 64) << SD(LEN_GEN_LENGTH_SHIFT));
write_sde_csr(sde, SD(LEN_GEN),
((sde->descq_cnt / 64) << SD(LEN_GEN_LENGTH_SHIFT))
| (4ULL << SD(LEN_GEN_GENERATION_SHIFT))
);
((sde->descq_cnt / 64) << SD(LEN_GEN_LENGTH_SHIFT)) |
(4ULL << SD(LEN_GEN_GENERATION_SHIFT)));
}
static inline void sdma_update_tail(struct sdma_engine *sde, u16 tail)
......@@ -1707,8 +1705,7 @@ static void init_sdma_regs(
write_sde_csr(sde, SD(DESC_CNT), 0);
write_sde_csr(sde, SD(HEAD_ADDR), sde->head_phys);
write_sde_csr(sde, SD(MEMORY),
((u64)credits <<
SD(MEMORY_SDMA_MEMORY_CNT_SHIFT)) |
((u64)credits << SD(MEMORY_SDMA_MEMORY_CNT_SHIFT)) |
((u64)(credits * sde->this_idx) <<
SD(MEMORY_SDMA_MEMORY_INDEX_SHIFT)));
write_sde_csr(sde, SD(ENG_ERR_MASK), ~0ull);
......@@ -1797,10 +1794,7 @@ static void dump_sdma_state(struct sdma_engine *sde)
dd_dev_err(sde->dd,
"SDMA (%u) descq_head: %u descq_tail: %u freecnt: %u FLE %d\n",
sde->this_idx,
head,
tail,
cnt,
sde->this_idx, head, tail, cnt,
!list_empty(&sde->flushlist));
/* print info for each entry in the descriptor queue */
......@@ -1830,12 +1824,15 @@ static void dump_sdma_state(struct sdma_engine *sde)
if (desc[0] & SDMA_DESC0_FIRST_DESC_FLAG)
dd_dev_err(sde->dd,
"\taidx: %u amode: %u alen: %u\n",
(u8)((desc[1] & SDMA_DESC1_HEADER_INDEX_SMASK)
>> SDMA_DESC1_HEADER_INDEX_SHIFT),
(u8)((desc[1] & SDMA_DESC1_HEADER_MODE_SMASK)
>> SDMA_DESC1_HEADER_MODE_SHIFT),
(u8)((desc[1] & SDMA_DESC1_HEADER_DWS_SMASK)
>> SDMA_DESC1_HEADER_DWS_SHIFT));
(u8)((desc[1] &
SDMA_DESC1_HEADER_INDEX_SMASK) >>
SDMA_DESC1_HEADER_INDEX_SHIFT),
(u8)((desc[1] &
SDMA_DESC1_HEADER_MODE_SMASK) >>
SDMA_DESC1_HEADER_MODE_SHIFT),
(u8)((desc[1] &
SDMA_DESC1_HEADER_DWS_SMASK) >>
SDMA_DESC1_HEADER_DWS_SHIFT));
head++;
head &= sde->sdma_mask;
}
......@@ -1866,12 +1863,9 @@ void sdma_seqfile_dump_sde(struct seq_file *s, struct sdma_engine *sde)
sdma_state_name(sde->state.current_state),
(unsigned long long)read_sde_csr(sde, SD(CTRL)),
(unsigned long long)read_sde_csr(sde, SD(STATUS)),
(unsigned long long)read_sde_csr(sde,
SD(ENG_ERR_STATUS)),
(unsigned long long)read_sde_csr(sde, SD(TAIL)),
tail,
(unsigned long long)read_sde_csr(sde, SD(HEAD)),
head,
(unsigned long long)read_sde_csr(sde, SD(ENG_ERR_STATUS)),
(unsigned long long)read_sde_csr(sde, SD(TAIL)), tail,
(unsigned long long)read_sde_csr(sde, SD(HEAD)), head,
(unsigned long long)le64_to_cpu(*sde->head_dma),
(unsigned long long)read_sde_csr(sde, SD(MEMORY)),
(unsigned long long)read_sde_csr(sde, SD(LEN_GEN)),
......@@ -1909,10 +1903,12 @@ void sdma_seqfile_dump_sde(struct seq_file *s, struct sdma_engine *sde)
head, flags, addr, gen, len);
if (desc[0] & SDMA_DESC0_FIRST_DESC_FLAG)
seq_printf(s, "\t\tahgidx: %u ahgmode: %u\n",
(u8)((desc[1] & SDMA_DESC1_HEADER_INDEX_SMASK)
>> SDMA_DESC1_HEADER_INDEX_SHIFT),
(u8)((desc[1] & SDMA_DESC1_HEADER_MODE_SMASK)
>> SDMA_DESC1_HEADER_MODE_SHIFT));
(u8)((desc[1] &
SDMA_DESC1_HEADER_INDEX_SMASK) >>
SDMA_DESC1_HEADER_INDEX_SHIFT),
(u8)((desc[1] &
SDMA_DESC1_HEADER_MODE_SMASK) >>
SDMA_DESC1_HEADER_MODE_SHIFT));
head = (head + 1) & sde->sdma_mask;
}
}
......@@ -2108,8 +2104,7 @@ int sdma_send_txreq(struct sdma_engine *sde,
* -EINVAL - sdma_txreq incomplete, -EBUSY - no space in ring (wait == NULL)
* -EIOCBQUEUED - tx queued to iowait, -ECOMM bad sdma state
*/
int sdma_send_txlist(struct sdma_engine *sde,
struct iowait *wait,
int sdma_send_txlist(struct sdma_engine *sde, struct iowait *wait,
struct list_head *tx_list)
{
struct sdma_txreq *tx, *tx_next;
......@@ -2178,8 +2173,7 @@ int sdma_send_txlist(struct sdma_engine *sde,
goto update_tail;
}
static void sdma_process_event(struct sdma_engine *sde,
enum sdma_events event)
static void sdma_process_event(struct sdma_engine *sde, enum sdma_events event)
{
unsigned long flags;
......@@ -3003,7 +2997,8 @@ void sdma_freeze(struct hfi1_devdata *dd)
* continuing.
*/
ret = wait_event_interruptible(dd->sdma_unfreeze_wq,
atomic_read(&dd->sdma_unfreeze_count) <= 0);
atomic_read(&dd->sdma_unfreeze_count) <=
0);
/* interrupted or count is negative, then unloading - just exit */
if (ret || atomic_read(&dd->sdma_unfreeze_count) < 0)
return;
......@@ -3054,5 +3049,6 @@ void _sdma_engine_progress_schedule(
trace_hfi1_sdma_engine_progress(sde, sde->progress_mask);
/* assume we have selected a good cpu */
write_csr(sde->dd,
CCE_INT_FORCE + (8 * (IS_SDMA_START / 64)), sde->progress_mask);
CCE_INT_FORCE + (8 * (IS_SDMA_START / 64)),
sde->progress_mask);
}
......@@ -707,8 +707,7 @@ int hfi1_create_port_files(struct ib_device *ibdev, u8 port_num,
kobject_uevent(&ppd->pport_cc_kobj, KOBJ_ADD);
ret = sysfs_create_bin_file(&ppd->pport_cc_kobj,
&cc_setting_bin_attr);
ret = sysfs_create_bin_file(&ppd->pport_cc_kobj, &cc_setting_bin_attr);
if (ret) {
dd_dev_err(dd,
"Skipping Congestion Control setting sysfs info, (err %d) port %u\n",
......@@ -716,8 +715,7 @@ int hfi1_create_port_files(struct ib_device *ibdev, u8 port_num,
goto bail_cc;
}
ret = sysfs_create_bin_file(&ppd->pport_cc_kobj,
&cc_table_bin_attr);
ret = sysfs_create_bin_file(&ppd->pport_cc_kobj, &cc_table_bin_attr);
if (ret) {
dd_dev_err(dd,
"Skipping Congestion Control table sysfs info, (err %d) port %u\n",
......
......@@ -154,7 +154,8 @@ const char *parse_everbs_hdrs(
case OP(RC, COMPARE_SWAP):
case OP(RC, FETCH_ADD):
trace_seq_printf(p, ATOMICETH_PRN,
(unsigned long long)ib_u64_get(eh->atomic_eth.vaddr),
(unsigned long long)ib_u64_get(
eh->atomic_eth.vaddr),
eh->atomic_eth.rkey,
(unsigned long long)ib_u64_get(
(__be32 *)&eh->atomic_eth.swap_data),
......@@ -187,12 +188,12 @@ const char *parse_sdma_flags(
trace_seq_printf(p, "%s", flags);
if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
(u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT)
& SDMA_DESC1_HEADER_MODE_MASK),
(u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT)
& SDMA_DESC1_HEADER_INDEX_MASK),
(u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT)
& SDMA_DESC1_HEADER_DWS_MASK));
(u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT) &
SDMA_DESC1_HEADER_MODE_MASK),
(u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT) &
SDMA_DESC1_HEADER_INDEX_MASK),
(u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT) &
SDMA_DESC1_HEADER_DWS_MASK));
return ret;
}
......
This diff is collapsed.
......@@ -320,7 +320,8 @@ int hfi1_make_ud_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
if (ah_attr->dlid < be16_to_cpu(IB_MULTICAST_LID_BASE) ||
ah_attr->dlid == be16_to_cpu(IB_LID_PERMISSIVE)) {
lid = ah_attr->dlid & ~((1 << ppd->lmc) - 1);
if (unlikely(!loopback && (lid == ppd->lid ||
if (unlikely(!loopback &&
(lid == ppd->lid ||
(lid == be16_to_cpu(IB_LID_PERMISSIVE) &&
qp->ibqp.qp_type == IB_QPT_GSI)))) {
unsigned long flags;
......
......@@ -970,7 +970,8 @@ static inline int egress_pkey_check(struct hfi1_pportdata *ppd,
/* The most likely matching pkey has index qp->s_pkey_index */
if (unlikely(!egress_pkey_matches_entry(pkey,
ppd->pkeys[qp->s_pkey_index]))) {
ppd->pkeys
[qp->s_pkey_index]))) {
/* no match - try the entire table */
for (; i < MAX_PKEY_VALUES; i++) {
if (egress_pkey_matches_entry(pkey, ppd->pkeys[i]))
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment