Commit 18fd9e35 authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Greg Kroah-Hartman

w1: mxc_w1: Driver cleanup

- Remove old and currently wrong address of the FSF from license
  parts of the code.
- Remove unused #include and sort remaining headers alphabetically.
- Remove unised definitions.
- Add definitions for bit-fields.
- Add missing module owner field.
Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent aea476b5
......@@ -10,24 +10,16 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
*/
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include "../w1.h"
#include "../w1_int.h"
#include "../w1_log.h"
/* According to the mx27 Datasheet the reset procedure should take up to about
* 1350us. We set the timeout to 500*100us = 50ms for sure */
......@@ -37,12 +29,12 @@
* MXC W1 Register offsets
*/
#define MXC_W1_CONTROL 0x00
# define MXC_W1_CONTROL_RDST BIT(3)
# define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
# define MXC_W1_CONTROL_PST BIT(6)
# define MXC_W1_CONTROL_RPP BIT(7)
#define MXC_W1_TIME_DIVIDER 0x02
#define MXC_W1_RESET 0x04
#define MXC_W1_COMMAND 0x06
#define MXC_W1_TXRX 0x08
#define MXC_W1_INTERRUPT 0x0A
#define MXC_W1_INTERRUPT_EN 0x0C
struct mxc_w1_device {
void __iomem *regs;
......@@ -61,12 +53,12 @@ static u8 mxc_w1_ds2_reset_bus(void *data)
unsigned int timeout_cnt = 0;
struct mxc_w1_device *dev = data;
__raw_writeb(0x80, (dev->regs + MXC_W1_CONTROL));
__raw_writeb(MXC_W1_CONTROL_RPP, (dev->regs + MXC_W1_CONTROL));
while (1) {
reg_val = __raw_readb(dev->regs + MXC_W1_CONTROL);
if (((reg_val >> 7) & 0x1) == 0 ||
if (!(reg_val & MXC_W1_CONTROL_RPP) ||
timeout_cnt > MXC_W1_RESET_TIMEOUT)
break;
else
......@@ -74,7 +66,7 @@ static u8 mxc_w1_ds2_reset_bus(void *data)
udelay(100);
}
return (reg_val >> 6) & 0x1;
return !!(reg_val & MXC_W1_CONTROL_PST);
}
/*
......@@ -90,16 +82,16 @@ static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
* datasheet.
*/
__raw_writeb((1 << (5 - bit)), ctrl_addr);
__raw_writeb(MXC_W1_CONTROL_WR(bit), ctrl_addr);
while (timeout_cnt--) {
if (!((__raw_readb(ctrl_addr) >> (5 - bit)) & 0x1))
if (!(__raw_readb(ctrl_addr) & MXC_W1_CONTROL_WR(bit)))
break;
udelay(1);
}
return ((__raw_readb(ctrl_addr)) >> 3) & 0x1;
return !!(__raw_readb(ctrl_addr) & MXC_W1_CONTROL_RDST);
}
static int mxc_w1_probe(struct platform_device *pdev)
......@@ -177,6 +169,7 @@ MODULE_DEVICE_TABLE(of, mxc_w1_dt_ids);
static struct platform_driver mxc_w1_driver = {
.driver = {
.name = "mxc_w1",
.owner = THIS_MODULE,
.of_match_table = mxc_w1_dt_ids,
},
.probe = mxc_w1_probe,
......
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