Commit 19c618e6 authored by Nicholas Kazlauskas's avatar Nicholas Kazlauskas Committed by Alex Deucher

drm/amd/display: Clear GPINT after DMCUB has reset

[Why]
Otherwise we can end up processing whatever was left in the register
if the DMCUB was previously reset.

If DMCUB gets force reset too early from another client then we might
not have even acked the disable yet - causing DMCUB instantly shutdown
if the command was 10020000.

[How]
Move the GPINT clear outside of the reset loop and do it unconditionally
after the DMCUB has been properly reset.
Reviewed-by: default avatarRoy Chan <roy.chan@amd.com>
Reviewed-by: default avatarEric Yang <Eric.Yang2@amd.com>
Acked-by: default avatarAnson Jacob <Anson.Jacob@amd.com>
Signed-off-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c71f260a
...@@ -115,10 +115,6 @@ void dmub_dcn31_reset(struct dmub_srv *dmub) ...@@ -115,10 +115,6 @@ void dmub_dcn31_reset(struct dmub_srv *dmub)
break; break;
} }
/* Clear the GPINT command manually so we don't reset again. */
cmd.all = 0;
dmub->hw_funcs.set_gpint(dmub, cmd);
/* Force reset in case we timed out, DMCUB is likely hung. */ /* Force reset in case we timed out, DMCUB is likely hung. */
} }
...@@ -130,6 +126,10 @@ void dmub_dcn31_reset(struct dmub_srv *dmub) ...@@ -130,6 +126,10 @@ void dmub_dcn31_reset(struct dmub_srv *dmub)
REG_WRITE(DMCUB_OUTBOX1_RPTR, 0); REG_WRITE(DMCUB_OUTBOX1_RPTR, 0);
REG_WRITE(DMCUB_OUTBOX1_WPTR, 0); REG_WRITE(DMCUB_OUTBOX1_WPTR, 0);
REG_WRITE(DMCUB_SCRATCH0, 0); REG_WRITE(DMCUB_SCRATCH0, 0);
/* Clear the GPINT command manually so we don't send anything during boot. */
cmd.all = 0;
dmub->hw_funcs.set_gpint(dmub, cmd);
} }
void dmub_dcn31_reset_release(struct dmub_srv *dmub) void dmub_dcn31_reset_release(struct dmub_srv *dmub)
......
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