Commit 1a170efe authored by Pali Rohár's avatar Pali Rohár Committed by Michael Ellerman

powerpc/85xx: p2020: Define just one machine description

Combine machine descriptions and code of all P2020 boards into just one
generic unified P2020 machine description. This allows kernel to boot on
any P2020-based board with P2020 DTS file without need to patch kernel and
define a new machine description in 85xx powerpc platform directory.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230408140122.25293-12-pali@kernel.org
parent 7d8ae6e0
...@@ -47,47 +47,29 @@ static void __init p2020_setup_arch(void) ...@@ -47,47 +47,29 @@ static void __init p2020_setup_arch(void)
mpc85xx_qe_par_io_init(); mpc85xx_qe_par_io_init();
} }
#ifdef CONFIG_MPC85xx_DS /*
machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices); * Called very early, device-tree isn't unflattened
#endif /* CONFIG_MPC85xx_DS */ */
static int __init p2020_probe(void)
{
struct device_node *p2020_cpu;
#ifdef CONFIG_MPC85xx_RDB /*
machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices); * There is no common compatible string for all P2020 boards.
machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices); * The only common thing is "PowerPC,P2020@0" cpu node.
#endif /* CONFIG_MPC85xx_RDB */ * So check for P2020 board via this cpu node.
*/
p2020_cpu = of_find_node_by_path("/cpus/PowerPC,P2020@0");
of_node_put(p2020_cpu);
#ifdef CONFIG_MPC85xx_DS return !!p2020_cpu;
define_machine(p2020_ds) { }
.name = "P2020 DS",
.compatible = "fsl,P2020DS",
.setup_arch = p2020_setup_arch,
.init_IRQ = p2020_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.progress = udbg_progress,
};
#endif /* CONFIG_MPC85xx_DS */
#ifdef CONFIG_MPC85xx_RDB machine_arch_initcall(p2020, mpc85xx_common_publish_devices);
define_machine(p2020_rdb) {
.name = "P2020 RDB",
.compatible = "fsl,P2020RDB",
.setup_arch = p2020_setup_arch,
.init_IRQ = p2020_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.progress = udbg_progress,
};
define_machine(p2020_rdb_pc) { define_machine(p2020) {
.name = "P2020RDB-PC", .name = "Freescale P2020",
.compatible = "fsl,P2020RDB-PC", .probe = p2020_probe,
.setup_arch = p2020_setup_arch, .setup_arch = p2020_setup_arch,
.init_IRQ = p2020_pic_init, .init_IRQ = p2020_pic_init,
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
...@@ -97,4 +79,3 @@ define_machine(p2020_rdb_pc) { ...@@ -97,4 +79,3 @@ define_machine(p2020_rdb_pc) {
.get_irq = mpic_get_irq, .get_irq = mpic_get_irq,
.progress = udbg_progress, .progress = udbg_progress,
}; };
#endif /* CONFIG_MPC85xx_RDB */
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