Commit 1bcea030 authored by Conor Dooley's avatar Conor Dooley Committed by Palmer Dabbelt

riscv: microchip: icicle: readability fixes

Fix the sort order of the status properties, remove some
extra whitespace in the mmc entry & add whitespace to the mac entry
containing the phys so that the dt is easier to read.
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20220509142610.128590-10-conor.dooley@microchip.comSigned-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent bc47b221
...@@ -64,8 +64,6 @@ &mmuart4 { ...@@ -64,8 +64,6 @@ &mmuart4 {
}; };
&mmc { &mmc {
status = "okay";
bus-width = <4>; bus-width = <4>;
disable-wp; disable-wp;
cap-sd-highspeed; cap-sd-highspeed;
...@@ -77,6 +75,7 @@ &mmc { ...@@ -77,6 +75,7 @@ &mmc {
sd-uhs-sdr25; sd-uhs-sdr25;
sd-uhs-sdr50; sd-uhs-sdr50;
sd-uhs-sdr104; sd-uhs-sdr104;
status = "okay";
}; };
&spi0 { &spi0 {
...@@ -106,16 +105,19 @@ &i2c2 { ...@@ -106,16 +105,19 @@ &i2c2 {
&mac0 { &mac0 {
phy-mode = "sgmii"; phy-mode = "sgmii";
phy-handle = <&phy0>; phy-handle = <&phy0>;
status = "okay";
}; };
&mac1 { &mac1 {
status = "okay";
phy-mode = "sgmii"; phy-mode = "sgmii";
phy-handle = <&phy1>; phy-handle = <&phy1>;
status = "okay";
phy1: ethernet-phy@9 { phy1: ethernet-phy@9 {
reg = <9>; reg = <9>;
ti,fifo-depth = <0x1>; ti,fifo-depth = <0x1>;
}; };
phy0: ethernet-phy@8 { phy0: ethernet-phy@8 {
reg = <8>; reg = <8>;
ti,fifo-depth = <0x1>; ti,fifo-depth = <0x1>;
......
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