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Commit 1e8853c6 authored by Sibi Sankar's avatar Sibi Sankar Committed by Bjorn Andersson
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arm64: dts: qcom: sc7280: Add cpu OPP tables 

Add OPP tables required to scale DDR/L3 per freq-domain on SC7280 SoCs.
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Reviewed-by: default avatarMatthias Kaehlcke <mka@chromium.org>
Signed-off-by: default avatarSibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644428757-25575-1-git-send-email-quic_sibis@quicinc.com
parent 8b93fbd9
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arch/arm64/boot/dts/qcom/sc7280.dtsi
View file @ 1e8853c6
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
#include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sc7280.h> #include <dt-bindings/clock/qcom,videocc-sc7280.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sc7280.h> #include <dt-bindings/interconnect/qcom,sc7280.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mailbox/qcom-ipcc.h> #include <dt-bindings/mailbox/qcom-ipcc.h>
...@@ -163,6 +164,9 @@ CPU0: cpu@0 { ...@@ -163,6 +164,9 @@ CPU0: cpu@0 {
&LITTLE_CPU_SLEEP_1 &LITTLE_CPU_SLEEP_1
&CLUSTER_SLEEP_0>; &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_0: l2-cache { L2_0: l2-cache {
...@@ -183,6 +187,9 @@ CPU1: cpu@100 { ...@@ -183,6 +187,9 @@ CPU1: cpu@100 {
&LITTLE_CPU_SLEEP_1 &LITTLE_CPU_SLEEP_1
&CLUSTER_SLEEP_0>; &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_100>; next-level-cache = <&L2_100>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_100: l2-cache { L2_100: l2-cache {
...@@ -200,6 +207,9 @@ CPU2: cpu@200 { ...@@ -200,6 +207,9 @@ CPU2: cpu@200 {
&LITTLE_CPU_SLEEP_1 &LITTLE_CPU_SLEEP_1
&CLUSTER_SLEEP_0>; &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_200>; next-level-cache = <&L2_200>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_200: l2-cache { L2_200: l2-cache {
...@@ -217,6 +227,9 @@ CPU3: cpu@300 { ...@@ -217,6 +227,9 @@ CPU3: cpu@300 {
&LITTLE_CPU_SLEEP_1 &LITTLE_CPU_SLEEP_1
&CLUSTER_SLEEP_0>; &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_300>; next-level-cache = <&L2_300>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
qcom,freq-domain = <&cpufreq_hw 0>; qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_300: l2-cache { L2_300: l2-cache {
...@@ -234,6 +247,9 @@ CPU4: cpu@400 { ...@@ -234,6 +247,9 @@ CPU4: cpu@400 {
&BIG_CPU_SLEEP_1 &BIG_CPU_SLEEP_1
&CLUSTER_SLEEP_0>; &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_400>; next-level-cache = <&L2_400>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
qcom,freq-domain = <&cpufreq_hw 1>; qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_400: l2-cache { L2_400: l2-cache {
...@@ -251,6 +267,9 @@ CPU5: cpu@500 { ...@@ -251,6 +267,9 @@ CPU5: cpu@500 {
&BIG_CPU_SLEEP_1 &BIG_CPU_SLEEP_1
&CLUSTER_SLEEP_0>; &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_500>; next-level-cache = <&L2_500>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
qcom,freq-domain = <&cpufreq_hw 1>; qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_500: l2-cache { L2_500: l2-cache {
...@@ -268,6 +287,9 @@ CPU6: cpu@600 { ...@@ -268,6 +287,9 @@ CPU6: cpu@600 {
&BIG_CPU_SLEEP_1 &BIG_CPU_SLEEP_1
&CLUSTER_SLEEP_0>; &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_600>; next-level-cache = <&L2_600>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
qcom,freq-domain = <&cpufreq_hw 1>; qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_600: l2-cache { L2_600: l2-cache {
...@@ -285,6 +307,9 @@ CPU7: cpu@700 { ...@@ -285,6 +307,9 @@ CPU7: cpu@700 {
&BIG_CPU_SLEEP_1 &BIG_CPU_SLEEP_1
&CLUSTER_SLEEP_0>; &CLUSTER_SLEEP_0>;
next-level-cache = <&L2_700>; next-level-cache = <&L2_700>;
operating-points-v2 = <&cpu7_opp_table>;
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
<&epss_l3 MASTER_EPSS_L3_APPS &epss_l3 SLAVE_EPSS_L3_SHARED>;
qcom,freq-domain = <&cpufreq_hw 2>; qcom,freq-domain = <&cpufreq_hw 2>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_700: l2-cache { L2_700: l2-cache {
...@@ -384,6 +409,211 @@ CLUSTER_SLEEP_0: cluster-sleep-0 { ...@@ -384,6 +409,211 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
}; };
}; };
cpu0_opp_table: cpu0-opp-table {
compatible = "operating-points-v2";
opp-shared;
cpu0_opp_300mhz: opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-peak-kBps = <800000 9600000>;
};
cpu0_opp_691mhz: opp-691200000 {
opp-hz = /bits/ 64 <691200000>;
opp-peak-kBps = <800000 17817600>;
};
cpu0_opp_806mhz: opp-806400000 {
opp-hz = /bits/ 64 <806400000>;
opp-peak-kBps = <800000 20889600>;
};
cpu0_opp_941mhz: opp-940800000 {
opp-hz = /bits/ 64 <940800000>;
opp-peak-kBps = <1804000 24576000>;
};
cpu0_opp_1152mhz: opp-1152000000 {
opp-hz = /bits/ 64 <1152000000>;
opp-peak-kBps = <2188000 27033600>;
};
cpu0_opp_1325mhz: opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
opp-peak-kBps = <2188000 33792000>;
};
cpu0_opp_1517mhz: opp-1516800000 {
opp-hz = /bits/ 64 <1516800000>;
opp-peak-kBps = <3072000 38092800>;
};
cpu0_opp_1651mhz: opp-1651200000 {
opp-hz = /bits/ 64 <1651200000>;
opp-peak-kBps = <3072000 41779200>;
};
cpu0_opp_1805mhz: opp-1804800000 {
opp-hz = /bits/ 64 <1804800000>;
opp-peak-kBps = <4068000 48537600>;
};
cpu0_opp_1958mhz: opp-1958400000 {
opp-hz = /bits/ 64 <1958400000>;
opp-peak-kBps = <4068000 48537600>;
};
cpu0_opp_2016mhz: opp-2016000000 {
opp-hz = /bits/ 64 <2016000000>;
opp-peak-kBps = <6220000 48537600>;
};
};
cpu4_opp_table: cpu4-opp-table {
compatible = "operating-points-v2";
opp-shared;
cpu4_opp_691mhz: opp-691200000 {
opp-hz = /bits/ 64 <691200000>;
opp-peak-kBps = <1804000 9600000>;
};
cpu4_opp_941mhz: opp-940800000 {
opp-hz = /bits/ 64 <940800000>;
opp-peak-kBps = <2188000 17817600>;
};
cpu4_opp_1229mhz: opp-1228800000 {
opp-hz = /bits/ 64 <1228800000>;
opp-peak-kBps = <4068000 24576000>;
};
cpu4_opp_1344mhz: opp-1344000000 {
opp-hz = /bits/ 64 <1344000000>;
opp-peak-kBps = <4068000 24576000>;
};
cpu4_opp_1517mhz: opp-1516800000 {
opp-hz = /bits/ 64 <1516800000>;
opp-peak-kBps = <4068000 24576000>;
};
cpu4_opp_1651mhz: opp-1651200000 {
opp-hz = /bits/ 64 <1651200000>;
opp-peak-kBps = <6220000 38092800>;
};
cpu4_opp_1901mhz: opp-1900800000 {
opp-hz = /bits/ 64 <1900800000>;
opp-peak-kBps = <6220000 44851200>;
};
cpu4_opp_2054mhz: opp-2054400000 {
opp-hz = /bits/ 64 <2054400000>;
opp-peak-kBps = <6220000 44851200>;
};
cpu4_opp_2112mhz: opp-2112000000 {
opp-hz = /bits/ 64 <2112000000>;
opp-peak-kBps = <6220000 44851200>;
};
cpu4_opp_2131mhz: opp-2131200000 {
opp-hz = /bits/ 64 <2131200000>;
opp-peak-kBps = <6220000 44851200>;
};
cpu4_opp_2208mhz: opp-2208000000 {
opp-hz = /bits/ 64 <2208000000>;
opp-peak-kBps = <6220000 44851200>;
};
cpu4_opp_2400mhz: opp-2400000000 {
opp-hz = /bits/ 64 <2400000000>;
opp-peak-kBps = <8532000 48537600>;
};
cpu4_opp_2611mhz: opp-2611200000 {
opp-hz = /bits/ 64 <2611200000>;
opp-peak-kBps = <8532000 48537600>;
};
};
cpu7_opp_table: cpu7-opp-table {
compatible = "operating-points-v2";
opp-shared;
cpu7_opp_806mhz: opp-806400000 {
opp-hz = /bits/ 64 <806400000>;
opp-peak-kBps = <1804000 9600000>;
};
cpu7_opp_1056mhz: opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
opp-peak-kBps = <2188000 17817600>;
};
cpu7_opp_1325mhz: opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
opp-peak-kBps = <4068000 24576000>;
};
cpu7_opp_1517mhz: opp-1516800000 {
opp-hz = /bits/ 64 <1516800000>;
opp-peak-kBps = <4068000 24576000>;
};
cpu7_opp_1766mhz: opp-1766400000 {
opp-hz = /bits/ 64 <1766400000>;
opp-peak-kBps = <6220000 38092800>;
};
cpu7_opp_1862mhz: opp-1862400000 {
opp-hz = /bits/ 64 <1862400000>;
opp-peak-kBps = <6220000 38092800>;
};
cpu7_opp_2035mhz: opp-2035200000 {
opp-hz = /bits/ 64 <2035200000>;
opp-peak-kBps = <6220000 38092800>;
};
cpu7_opp_2112mhz: opp-2112000000 {
opp-hz = /bits/ 64 <2112000000>;
opp-peak-kBps = <6220000 44851200>;
};
cpu7_opp_2208mhz: opp-2208000000 {
opp-hz = /bits/ 64 <2208000000>;
opp-peak-kBps = <6220000 44851200>;
};
cpu7_opp_2381mhz: opp-2380800000 {
opp-hz = /bits/ 64 <2380800000>;
opp-peak-kBps = <6832000 44851200>;
};
cpu7_opp_2400mhz: opp-2400000000 {
opp-hz = /bits/ 64 <2400000000>;
opp-peak-kBps = <8532000 48537600>;
};
cpu7_opp_2515mhz: opp-2515200000 {
opp-hz = /bits/ 64 <2515200000>;
opp-peak-kBps = <8532000 48537600>;
};
cpu7_opp_2707mhz: opp-2707200000 {
opp-hz = /bits/ 64 <2707200000>;
opp-peak-kBps = <8532000 48537600>;
};
cpu7_opp_3014mhz: opp-3014400000 {
opp-hz = /bits/ 64 <3014400000>;
opp-peak-kBps = <8532000 48537600>;
};
};
memory@80000000 { memory@80000000 {
device_type = "memory"; device_type = "memory";
/* We expect the bootloader to fill in the size */ /* We expect the bootloader to fill in the size */
......
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