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Commit 1fdbcfa9 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Mark Brown
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ASoC: q6dsp: q6afe-dai: add support to Codec DMA ports 

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200910101732.23484-9-srinivas.kandagatla@linaro.orgSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 0c3e35fc
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sound/soc/qcom/qdsp6/q6afe-dai.c
View file @ 1fdbcfa9
......@@ -55,6 +55,48 @@
.remove = msm_dai_q6_dai_remove, \
}
#define Q6AFE_CDC_DMA_RX_DAI(did) { \
.playback = { \
.stream_name = #did" Playback", \
.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
SNDRV_PCM_RATE_176400, \
.formats = SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S24_LE | \
SNDRV_PCM_FMTBIT_S32_LE, \
.channels_min = 1, \
.channels_max = 8, \
.rate_min = 8000, \
.rate_max = 176400, \
}, \
.name = #did, \
.ops = &q6dma_ops, \
.id = did, \
.probe = msm_dai_q6_dai_probe, \
.remove = msm_dai_q6_dai_remove, \
}
#define Q6AFE_CDC_DMA_TX_DAI(did) { \
.capture = { \
.stream_name = #did" Capture", \
.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
SNDRV_PCM_RATE_176400, \
.formats = SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S24_LE | \
SNDRV_PCM_FMTBIT_S32_LE, \
.channels_min = 1, \
.channels_max = 8, \
.rate_min = 8000, \
.rate_max = 176400, \
}, \
.name = #did, \
.ops = &q6dma_ops, \
.id = did, \
.probe = msm_dai_q6_dai_probe, \
.remove = msm_dai_q6_dai_remove, \
}
struct q6afe_dai_priv_data {
uint32_t sd_line_mask;
uint32_t sync_mode;
......@@ -307,6 +349,90 @@ static int q6tdm_hw_params(struct snd_pcm_substream *substream,
return 0;
}
static int q6dma_set_channel_map(struct snd_soc_dai *dai,
unsigned int tx_num, unsigned int *tx_ch_mask,
unsigned int rx_num, unsigned int *rx_ch_mask)
{
struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
int ch_mask;
int rc = 0;
switch (dai->id) {
case WSA_CODEC_DMA_TX_0:
case WSA_CODEC_DMA_TX_1:
case WSA_CODEC_DMA_TX_2:
case VA_CODEC_DMA_TX_0:
case VA_CODEC_DMA_TX_1:
case VA_CODEC_DMA_TX_2:
case TX_CODEC_DMA_TX_0:
case TX_CODEC_DMA_TX_1:
case TX_CODEC_DMA_TX_2:
case TX_CODEC_DMA_TX_3:
case TX_CODEC_DMA_TX_4:
case TX_CODEC_DMA_TX_5:
if (!tx_ch_mask) {
dev_err(dai->dev, "tx slot not found\n");
return -EINVAL;
}
if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
dev_err(dai->dev, "invalid tx num %d\n",
tx_num);
return -EINVAL;
}
ch_mask = *tx_ch_mask;
break;
case WSA_CODEC_DMA_RX_0:
case WSA_CODEC_DMA_RX_1:
case RX_CODEC_DMA_RX_0:
case RX_CODEC_DMA_RX_1:
case RX_CODEC_DMA_RX_2:
case RX_CODEC_DMA_RX_3:
case RX_CODEC_DMA_RX_4:
case RX_CODEC_DMA_RX_5:
case RX_CODEC_DMA_RX_6:
case RX_CODEC_DMA_RX_7:
/* rx */
if (!rx_ch_mask) {
dev_err(dai->dev, "rx slot not found\n");
return -EINVAL;
}
if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
dev_err(dai->dev, "invalid rx num %d\n",
rx_num);
return -EINVAL;
}
ch_mask = *rx_ch_mask;
break;
default:
dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
__func__, dai->id);
return -EINVAL;
}
cfg->active_channels_mask = ch_mask;
return rc;
}
static int q6dma_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
cfg->bit_width = params_width(params);
cfg->sample_rate = params_rate(params);
cfg->num_channels = params_channels(params);
return 0;
}
static void q6afe_dai_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
......@@ -362,6 +488,10 @@ static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
q6afe_tdm_port_prepare(dai_data->port[dai->id],
&dai_data->port_config[dai->id].tdm);
break;
case WSA_CODEC_DMA_RX_0 ... RX_CODEC_DMA_RX_7:
q6afe_cdc_dma_port_prepare(dai_data->port[dai->id],
&dai_data->port_config[dai->id].dma_cfg);
break;
default:
return -EINVAL;
}
......@@ -430,6 +560,7 @@ static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai,
freq, dir);
case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
case Q6AFE_LPASS_CLK_ID_WSA_CORE_MCLK ... Q6AFE_LPASS_CLK_ID_VA_CORE_2X_MCLK:
return q6afe_port_set_sysclk(port, clk_id,
Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
Q6AFE_LPASS_CLK_ROOT_DEFAULT,
......@@ -562,6 +693,29 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
{"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
{"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
{"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
{"WSA_CODEC_DMA_RX_0 Playback", NULL, "WSA_CODEC_DMA_RX_0"},
{"WSA_CODEC_DMA_TX_0", NULL, "WSA_CODEC_DMA_TX_0 Capture"},
{"WSA_CODEC_DMA_RX_1 Playback", NULL, "WSA_CODEC_DMA_RX_1"},
{"WSA_CODEC_DMA_TX_1", NULL, "WSA_CODEC_DMA_TX_1 Capture"},
{"WSA_CODEC_DMA_TX_2", NULL, "WSA_CODEC_DMA_TX_2 Capture"},
{"VA_CODEC_DMA_TX_0", NULL, "VA_CODEC_DMA_TX_0 Capture"},
{"VA_CODEC_DMA_TX_1", NULL, "VA_CODEC_DMA_TX_1 Capture"},
{"VA_CODEC_DMA_TX_2", NULL, "VA_CODEC_DMA_TX_2 Capture"},
{"RX_CODEC_DMA_RX_0 Playback", NULL, "RX_CODEC_DMA_RX_0"},
{"TX_CODEC_DMA_TX_0", NULL, "TX_CODEC_DMA_TX_0 Capture"},
{"RX_CODEC_DMA_RX_1 Playback", NULL, "RX_CODEC_DMA_RX_1"},
{"TX_CODEC_DMA_TX_1", NULL, "TX_CODEC_DMA_TX_1 Capture"},
{"RX_CODEC_DMA_RX_2 Playback", NULL, "RX_CODEC_DMA_RX_2"},
{"TX_CODEC_DMA_TX_2", NULL, "TX_CODEC_DMA_TX_2 Capture"},
{"RX_CODEC_DMA_RX_3 Playback", NULL, "RX_CODEC_DMA_RX_3"},
{"TX_CODEC_DMA_TX_3", NULL, "TX_CODEC_DMA_TX_3 Capture"},
{"RX_CODEC_DMA_RX_4 Playback", NULL, "RX_CODEC_DMA_RX_4"},
{"TX_CODEC_DMA_TX_4", NULL, "TX_CODEC_DMA_TX_4 Capture"},
{"RX_CODEC_DMA_RX_5 Playback", NULL, "RX_CODEC_DMA_RX_5"},
{"TX_CODEC_DMA_TX_5", NULL, "TX_CODEC_DMA_TX_5 Capture"},
{"RX_CODEC_DMA_RX_6 Playback", NULL, "RX_CODEC_DMA_RX_6"},
{"RX_CODEC_DMA_RX_7 Playback", NULL, "RX_CODEC_DMA_RX_7"},
};
static const struct snd_soc_dai_ops q6hdmi_ops = {
......@@ -594,6 +748,14 @@ static const struct snd_soc_dai_ops q6tdm_ops = {
.hw_params = q6tdm_hw_params,
};
static const struct snd_soc_dai_ops q6dma_ops = {
.prepare = q6afe_dai_prepare,
.shutdown = q6afe_dai_shutdown,
.set_sysclk = q6afe_mi2s_set_sysclk,
.set_channel_map = q6dma_set_channel_map,
.hw_params = q6dma_hw_params,
};
static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
{
struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
......@@ -1128,6 +1290,28 @@ static struct snd_soc_dai_driver q6afe_dais[] = {
.probe = msm_dai_q6_dai_probe,
.remove = msm_dai_q6_dai_remove,
},
Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),
Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),
Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_1),
Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_2),
Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_0),
Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_1),
Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_2),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_0),
Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_0),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_1),
Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_1),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_2),
Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_2),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_3),
Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_3),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_4),
Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_4),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_5),
Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
};
static int q6afe_of_xlate_dai_name(struct snd_soc_component *component,
......@@ -1350,6 +1534,51 @@ static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_7", NULL,
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("DISPLAY_PORT_RX", "NULL", 0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_0", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_0", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_1", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_1", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_2", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_0", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_1", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_2", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_0", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_0", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_1", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_1", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_2", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_2", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_3", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_3", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_4", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_4", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_5", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_5", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_6", "NULL",
0, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_7", "NULL",
0, SND_SOC_NOPM, 0, 0),
};
static const struct snd_soc_component_driver q6afe_dai_component = {
......
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