Commit 2051877c authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "This finally removes the CLK_IS_ROOT flag by picking up the last few
  stragglers that didn't get merged by anyone this time around.

  Better to do it now than wait for another one to pop up.  There's also
  a minor maintainers update and a Kconfig fix"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: nxp: Select MFD_SYSCON for creg driver
  MAINTAINERS: Add file patterns for clock device tree bindings
  clk: Remove CLK_IS_ROOT flag
  clk: microchip: Remove CLK_IS_ROOT
  powerpc/512x: clk: Remove CLK_IS_ROOT
  vexpress/spc: Remove CLK_IS_ROOT
parents 43c082e7 72ad679a
...@@ -3086,6 +3086,7 @@ M: Stephen Boyd <sboyd@codeaurora.org> ...@@ -3086,6 +3086,7 @@ M: Stephen Boyd <sboyd@codeaurora.org>
L: linux-clk@vger.kernel.org L: linux-clk@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/clock/
F: drivers/clk/ F: drivers/clk/
X: drivers/clk/clkdev.c X: drivers/clk/clkdev.c
F: include/linux/clk-pr* F: include/linux/clk-pr*
......
...@@ -547,7 +547,7 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev) ...@@ -547,7 +547,7 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
init.name = dev_name(cpu_dev); init.name = dev_name(cpu_dev);
init.ops = &clk_spc_ops; init.ops = &clk_spc_ops;
init.flags = CLK_IS_ROOT | CLK_GET_RATE_NOCACHE; init.flags = CLK_GET_RATE_NOCACHE;
init.num_parents = 0; init.num_parents = 0;
return devm_clk_register(cpu_dev, &spc->hw); return devm_clk_register(cpu_dev, &spc->hw);
......
...@@ -221,7 +221,7 @@ static bool soc_has_mclk_mux0_canin(void) ...@@ -221,7 +221,7 @@ static bool soc_has_mclk_mux0_canin(void)
/* convenience wrappers around the common clk API */ /* convenience wrappers around the common clk API */
static inline struct clk *mpc512x_clk_fixed(const char *name, int rate) static inline struct clk *mpc512x_clk_fixed(const char *name, int rate)
{ {
return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
} }
static inline struct clk *mpc512x_clk_factor( static inline struct clk *mpc512x_clk_factor(
......
...@@ -175,6 +175,7 @@ config COMMON_CLK_KEYSTONE ...@@ -175,6 +175,7 @@ config COMMON_CLK_KEYSTONE
config COMMON_CLK_NXP config COMMON_CLK_NXP
def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
select REGMAP_MMIO if ARCH_LPC32XX select REGMAP_MMIO if ARCH_LPC32XX
select MFD_SYSCON if ARCH_LPC18XX
---help--- ---help---
Support for clock providers on NXP platforms. Support for clock providers on NXP platforms.
......
...@@ -180,15 +180,15 @@ static int pic32mzda_clk_probe(struct platform_device *pdev) ...@@ -180,15 +180,15 @@ static int pic32mzda_clk_probe(struct platform_device *pdev)
/* register fixed rate clocks */ /* register fixed rate clocks */
clks[POSCCLK] = clk_register_fixed_rate(&pdev->dev, "posc_clk", NULL, clks[POSCCLK] = clk_register_fixed_rate(&pdev->dev, "posc_clk", NULL,
CLK_IS_ROOT, 24000000); 0, 24000000);
clks[FRCCLK] = clk_register_fixed_rate(&pdev->dev, "frc_clk", NULL, clks[FRCCLK] = clk_register_fixed_rate(&pdev->dev, "frc_clk", NULL,
CLK_IS_ROOT, 8000000); 0, 8000000);
clks[BFRCCLK] = clk_register_fixed_rate(&pdev->dev, "bfrc_clk", NULL, clks[BFRCCLK] = clk_register_fixed_rate(&pdev->dev, "bfrc_clk", NULL,
CLK_IS_ROOT, 8000000); 0, 8000000);
clks[LPRCCLK] = clk_register_fixed_rate(&pdev->dev, "lprc_clk", NULL, clks[LPRCCLK] = clk_register_fixed_rate(&pdev->dev, "lprc_clk", NULL,
CLK_IS_ROOT, 32000); 0, 32000);
clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL, clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL,
CLK_IS_ROOT, 24000000); 0, 24000000);
/* fixed rate (optional) clock */ /* fixed rate (optional) clock */
if (of_find_property(np, "microchip,pic32mzda-sosc", NULL)) { if (of_find_property(np, "microchip,pic32mzda-sosc", NULL)) {
pr_info("pic32-clk: dt requests SOSC.\n"); pr_info("pic32-clk: dt requests SOSC.\n");
......
...@@ -25,7 +25,7 @@ ...@@ -25,7 +25,7 @@
#define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */ #define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */ #define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */ #define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */
#define CLK_IS_ROOT BIT(4) /* Deprecated: Don't use */ /* unused */
#define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a to_clk_foo() */ #define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a to_clk_foo() */
#define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */ #define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */
#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */ #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
......
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