Commit 206b7edc authored by Imre Deak's avatar Imre Deak

drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLL

The types of PLLs used for HDMI/DP on HSW are WRPLL/LCPLL accordingly,
so use these names to align better with the rest of WRPLL/LCPLL function
names elsewhere.
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200226203455.23032-9-imre.deak@intel.com
parent c039b63a
...@@ -849,7 +849,7 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */, ...@@ -849,7 +849,7 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */,
} }
static struct intel_shared_dpll * static struct intel_shared_dpll *
hsw_ddi_hdmi_get_dpll(struct intel_atomic_state *state, hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
struct intel_crtc *crtc) struct intel_crtc *crtc)
{ {
struct intel_crtc_state *crtc_state = struct intel_crtc_state *crtc_state =
...@@ -925,7 +925,7 @@ static int hsw_ddi_calc_wrpll_link(struct drm_i915_private *dev_priv, ...@@ -925,7 +925,7 @@ static int hsw_ddi_calc_wrpll_link(struct drm_i915_private *dev_priv,
} }
static struct intel_shared_dpll * static struct intel_shared_dpll *
hsw_ddi_dp_get_dpll(struct intel_crtc_state *crtc_state) hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)
{ {
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
struct intel_shared_dpll *pll; struct intel_shared_dpll *pll;
...@@ -968,9 +968,9 @@ static bool hsw_get_dpll(struct intel_atomic_state *state, ...@@ -968,9 +968,9 @@ static bool hsw_get_dpll(struct intel_atomic_state *state,
sizeof(crtc_state->dpll_hw_state)); sizeof(crtc_state->dpll_hw_state));
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
pll = hsw_ddi_hdmi_get_dpll(state, crtc); pll = hsw_ddi_wrpll_get_dpll(state, crtc);
} else if (intel_crtc_has_dp_encoder(crtc_state)) { } else if (intel_crtc_has_dp_encoder(crtc_state)) {
pll = hsw_ddi_dp_get_dpll(crtc_state); pll = hsw_ddi_lcpll_get_dpll(crtc_state);
} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) { } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) {
if (WARN_ON(crtc_state->port_clock / 2 != 135000)) if (WARN_ON(crtc_state->port_clock / 2 != 135000))
return false; return false;
......
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