Commit 20dd0373 authored by Wolfram Sang's avatar Wolfram Sang Committed by Ulf Hansson

mmc: host: tmio: SDIO_STATUS_QUIRK is rather SDIO_STATUS_SETBITS

QUIRK sounds like there is something wrong, but actually there are just
some bits which need to be 1. Rename it to be more clear.
Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent e4f38eb1
...@@ -641,10 +641,8 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev) ...@@ -641,10 +641,8 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
*/ */
mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL; mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
/* /* All SDHI have SDIO status bits which must be 1 */
* All SDHI need SDIO_INFO1 reserved bit mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS;
*/
mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
ret = tmio_mmc_host_probe(host, mmc_data); ret = tmio_mmc_host_probe(host, mmc_data);
if (ret < 0) if (ret < 0)
......
...@@ -723,7 +723,7 @@ static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) ...@@ -723,7 +723,7 @@ static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
sdio_status = status & ~TMIO_SDIO_MASK_ALL; sdio_status = status & ~TMIO_SDIO_MASK_ALL;
if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK) if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
sdio_status |= 6; sdio_status |= 6;
sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
......
...@@ -94,10 +94,8 @@ ...@@ -94,10 +94,8 @@
*/ */
#define TMIO_MMC_HAVE_CMD12_CTRL (1 << 7) #define TMIO_MMC_HAVE_CMD12_CTRL (1 << 7)
/* /* Controller has some SDIO status bits which must be 1 */
* Some controllers needs to set 1 on SDIO status reserved bits #define TMIO_MMC_SDIO_STATUS_SETBITS (1 << 8)
*/
#define TMIO_MMC_SDIO_STATUS_QUIRK (1 << 8)
/* /*
* Some controllers have a 32-bit wide data port register * Some controllers have a 32-bit wide data port register
......
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