Commit 20ed715e authored by Andrzej Hajda's avatar Andrzej Hajda Committed by Inki Dae

drm/exynos/fimc: fix source buffer registers

FIMC in default mode of operation uses only one input buffer,
but the driver used also second buffer, as a result only the
first frame was processed correctly. The patch fixes it.
Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: default avatarJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent 56442d83
...@@ -715,24 +715,24 @@ static int fimc_src_set_addr(struct device *dev, ...@@ -715,24 +715,24 @@ static int fimc_src_set_addr(struct device *dev,
case IPP_BUF_ENQUEUE: case IPP_BUF_ENQUEUE:
config = &property->config[EXYNOS_DRM_OPS_SRC]; config = &property->config[EXYNOS_DRM_OPS_SRC];
fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_Y], fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_Y],
EXYNOS_CIIYSA(buf_id)); EXYNOS_CIIYSA0);
if (config->fmt == DRM_FORMAT_YVU420) { if (config->fmt == DRM_FORMAT_YVU420) {
fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_CR], fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_CR],
EXYNOS_CIICBSA(buf_id)); EXYNOS_CIICBSA0);
fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_CB], fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_CB],
EXYNOS_CIICRSA(buf_id)); EXYNOS_CIICRSA0);
} else { } else {
fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_CB], fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_CB],
EXYNOS_CIICBSA(buf_id)); EXYNOS_CIICBSA0);
fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_CR], fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_CR],
EXYNOS_CIICRSA(buf_id)); EXYNOS_CIICRSA0);
} }
break; break;
case IPP_BUF_DEQUEUE: case IPP_BUF_DEQUEUE:
fimc_write(ctx, 0x0, EXYNOS_CIIYSA(buf_id)); fimc_write(ctx, 0x0, EXYNOS_CIIYSA0);
fimc_write(ctx, 0x0, EXYNOS_CIICBSA(buf_id)); fimc_write(ctx, 0x0, EXYNOS_CIICBSA0);
fimc_write(ctx, 0x0, EXYNOS_CIICRSA(buf_id)); fimc_write(ctx, 0x0, EXYNOS_CIICRSA0);
break; break;
default: default:
/* bypass */ /* bypass */
......
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