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Commit 21e70778 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
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bnxt_en: Update firmware interface to 1.10.2.63 

The main changes are firmware live patch support and 2 additional FEC
standard counters.

Add the matching FEC counters to ethtool counter array.  Firmware older
than 220 does not return the proper size of the extended RX counters so
we need to cap it at the smaller legacy size.  Otherwise the new FEC
counters may show up with garbage values.
Reviewed-by: default avatarEdwin Peer <edwin.peer@broadcom.com>
Signed-off-by: default avatarMichael Chan <michael.chan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 188876db
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Showing with 156 additions and 8 deletions
drivers/net/ethernet/broadcom/bnxt/bnxt.c
View file @ 21e70778
......@@ -8210,6 +8210,10 @@ static int bnxt_hwrm_port_qstats_ext(struct bnxt *bp, u8 flags)
if (!rc) {
bp->fw_rx_stats_ext_size =
le16_to_cpu(resp_qs->rx_stat_size) / 8;
if (BNXT_FW_MAJ(bp) < 220 &&
bp->fw_rx_stats_ext_size > BNXT_RX_STATS_EXT_NUM_LEGACY)
bp->fw_rx_stats_ext_size = BNXT_RX_STATS_EXT_NUM_LEGACY;
bp->fw_tx_stats_ext_size = tx_stat_size ?
le16_to_cpu(resp_qs->tx_stat_size) / 8 : 0;
} else {
......
drivers/net/ethernet/broadcom/bnxt/bnxt.h
View file @ 21e70778
......@@ -2174,6 +2174,9 @@ struct bnxt {
#define BNXT_RX_STATS_EXT_OFFSET(counter) \
(offsetof(struct rx_port_stats_ext, counter) / 8)
#define BNXT_RX_STATS_EXT_NUM_LEGACY \
BNXT_RX_STATS_EXT_OFFSET(rx_fec_corrected_blocks)
#define BNXT_TX_STATS_EXT_OFFSET(counter) \
(offsetof(struct tx_port_stats_ext, counter) / 8)
......
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c
View file @ 21e70778
......@@ -427,6 +427,8 @@ static const struct {
BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks),
BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks),
};
static const struct {
......
drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h
View file @ 21e70778
......@@ -532,8 +532,8 @@ struct hwrm_err_output {
#define HWRM_VERSION_MAJOR 1
#define HWRM_VERSION_MINOR 10
#define HWRM_VERSION_UPDATE 2
#define HWRM_VERSION_RSVD 52
#define HWRM_VERSION_STR "1.10.2.52"
#define HWRM_VERSION_RSVD 63
#define HWRM_VERSION_STR "1.10.2.63"
/* hwrm_ver_get_input (size:192b/24B) */
struct hwrm_ver_get_input {
......@@ -1587,6 +1587,8 @@ struct hwrm_func_qcaps_output {
#define FUNC_QCAPS_RESP_FLAGS_EXT_DFLT_VLAN_TPID_PCP_SUPPORTED 0x200000UL
#define FUNC_QCAPS_RESP_FLAGS_EXT_KTLS_SUPPORTED 0x400000UL
#define FUNC_QCAPS_RESP_FLAGS_EXT_EP_RATE_CONTROL 0x800000UL
#define FUNC_QCAPS_RESP_FLAGS_EXT_MIN_BW_SUPPORTED 0x1000000UL
#define FUNC_QCAPS_RESP_FLAGS_EXT_TX_COAL_CMPL_CAP 0x2000000UL
u8 max_schqs;
u8 mpc_chnls_cap;
#define FUNC_QCAPS_RESP_MPC_CHNLS_CAP_TCE 0x1UL
......@@ -1956,6 +1958,18 @@ struct hwrm_func_cfg_output {
u8 valid;
};
/* hwrm_func_cfg_cmd_err (size:64b/8B) */
struct hwrm_func_cfg_cmd_err {
u8 code;
#define FUNC_CFG_CMD_ERR_CODE_UNKNOWN 0x0UL
#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_BW_RANGE 0x1UL
#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_MORE_THAN_MAX 0x2UL
#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_BW_UNSUPPORTED 0x3UL
#define FUNC_CFG_CMD_ERR_CODE_PARTITION_BW_PERCENT 0x4UL
#define FUNC_CFG_CMD_ERR_CODE_LAST FUNC_CFG_CMD_ERR_CODE_PARTITION_BW_PERCENT
u8 unused_0[7];
};
/* hwrm_func_qstats_input (size:192b/24B) */
struct hwrm_func_qstats_input {
__le16 req_type;
......@@ -3601,7 +3615,15 @@ struct hwrm_port_phy_qcfg_output {
#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR4 0x1dUL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR4 0x1eUL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4 0x1fUL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_LAST PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4
#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASECR 0x20UL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASESR 0x21UL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASELR 0x22UL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASEER 0x23UL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR2 0x24UL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR2 0x25UL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR2 0x26UL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2 0x27UL
#define PORT_PHY_QCFG_RESP_PHY_TYPE_LAST PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2
u8 media_type;
#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_UNKNOWN 0x0UL
#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP 0x1UL
......@@ -4040,7 +4062,7 @@ struct tx_port_stats_ext {
__le64 pfc_pri7_tx_transitions;
};
/* rx_port_stats_ext (size:3648b/456B) */
/* rx_port_stats_ext (size:3776b/472B) */
struct rx_port_stats_ext {
__le64 link_down_events;
__le64 continuous_pause_events;
......@@ -4099,6 +4121,8 @@ struct rx_port_stats_ext {
__le64 rx_discard_packets_cos5;
__le64 rx_discard_packets_cos6;
__le64 rx_discard_packets_cos7;
__le64 rx_fec_corrected_blocks;
__le64 rx_fec_uncorrectable_blocks;
};
/* hwrm_port_qstats_ext_input (size:320b/40B) */
......@@ -4372,7 +4396,10 @@ struct hwrm_port_phy_qcaps_output {
#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_50G 0x1UL
#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_100G 0x2UL
#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_200G 0x4UL
u8 unused_0[3];
__le16 flags2;
#define PORT_PHY_QCAPS_RESP_FLAGS2_PAUSE_UNSUPPORTED 0x1UL
#define PORT_PHY_QCAPS_RESP_FLAGS2_PFC_UNSUPPORTED 0x2UL
u8 unused_0[1];
u8 valid;
};
......@@ -6076,6 +6103,11 @@ struct hwrm_vnic_qcaps_output {
#define VNIC_QCAPS_RESP_FLAGS_VIRTIO_NET_VNIC_ALLOC_CAP 0x800UL
#define VNIC_QCAPS_RESP_FLAGS_METADATA_FORMAT_CAP 0x1000UL
#define VNIC_QCAPS_RESP_FLAGS_RSS_STRICT_HASH_TYPE_CAP 0x2000UL
#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_TYPE_DELTA_CAP 0x4000UL
#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_FUNCTION_TOEPLITZ_CAP 0x8000UL
#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_FUNCTION_XOR_CAP 0x10000UL
#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_FUNCTION_CHKSM_CAP 0x20000UL
#define VNIC_QCAPS_RESP_FLAGS_RSS_IPV6_FLOW_LABEL_CAP 0x40000UL
__le16 max_aggs_supported;
u8 unused_1[5];
u8 valid;
......@@ -6206,7 +6238,15 @@ struct hwrm_vnic_rss_cfg_input {
__le64 ring_grp_tbl_addr;
__le64 hash_key_tbl_addr;
__le16 rss_ctx_idx;
u8 unused_1[6];
u8 flags;
#define VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_INCLUDE 0x1UL
#define VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_EXCLUDE 0x2UL
u8 rss_hash_function;
#define VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_TOEPLITZ 0x0UL
#define VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_XOR 0x1UL
#define VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_CHECKSUM 0x2UL
#define VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_LAST VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_CHECKSUM
u8 unused_1[4];
};
/* hwrm_vnic_rss_cfg_output (size:128b/16B) */
......@@ -6331,7 +6371,24 @@ struct hwrm_ring_alloc_input {
#define RING_ALLOC_REQ_RING_TYPE_RX_AGG 0x4UL
#define RING_ALLOC_REQ_RING_TYPE_NQ 0x5UL
#define RING_ALLOC_REQ_RING_TYPE_LAST RING_ALLOC_REQ_RING_TYPE_NQ
u8 unused_0;
u8 cmpl_coal_cnt;
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_OFF 0x0UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_4 0x1UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_8 0x2UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_12 0x3UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_16 0x4UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_24 0x5UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_32 0x6UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_48 0x7UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_64 0x8UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_96 0x9UL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_128 0xaUL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_192 0xbUL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_256 0xcUL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_320 0xdUL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_384 0xeUL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_MAX 0xfUL
#define RING_ALLOC_REQ_CMPL_COAL_CNT_LAST RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_MAX
__le16 flags;
#define RING_ALLOC_REQ_FLAGS_RX_SOP_PAD 0x1UL
__le64 page_tbl_addr;
......@@ -7099,6 +7156,7 @@ struct hwrm_cfa_ntuple_filter_alloc_input {
#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DEST_FID 0x8UL
#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_ARP_REPLY 0x10UL
#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DEST_RFS_RING_IDX 0x20UL
#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_NO_L2_CONTEXT 0x40UL
__le32 enables;
#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_L2_FILTER_ID 0x1UL
#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_ETHERTYPE 0x2UL
......@@ -7234,6 +7292,7 @@ struct hwrm_cfa_ntuple_filter_cfg_input {
__le32 flags;
#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_DEST_FID 0x1UL
#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_DEST_RFS_RING_IDX 0x2UL
#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_NO_L2_CONTEXT 0x4UL
__le64 ntuple_filter_id;
__le32 new_dst_id;
__le32 new_mirror_vnic_id;
......@@ -7834,11 +7893,11 @@ struct hwrm_cfa_adv_flow_mgnt_qcaps_output {
#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_TRUFLOW_CAPABLE 0x8000UL
#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_L2_FILTER_TRAFFIC_TYPE_L2_ROCE_SUPPORTED 0x10000UL
#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_LAG_SUPPORTED 0x20000UL
#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NTUPLE_FLOW_NO_L2CTX_SUPPORTED 0x40000UL
u8 unused_0[3];
u8 valid;
};
/* hwrm_tunnel_dst_port_query_input (size:192b/24B) */
struct hwrm_tunnel_dst_port_query_input {
__le16 req_type;
__le16 cmpl_ring;
......@@ -8414,6 +8473,86 @@ struct hwrm_fw_get_structured_data_cmd_err {
u8 unused_0[7];
};
/* hwrm_fw_livepatch_query_input (size:192b/24B) */
struct hwrm_fw_livepatch_query_input {
__le16 req_type;
__le16 cmpl_ring;
__le16 seq_id;
__le16 target_id;
__le64 resp_addr;
u8 fw_target;
#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_COMMON_FW 0x1UL
#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_SECURE_FW 0x2UL
#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_LAST FW_LIVEPATCH_QUERY_REQ_FW_TARGET_SECURE_FW
u8 unused_0[7];
};
/* hwrm_fw_livepatch_query_output (size:640b/80B) */
struct hwrm_fw_livepatch_query_output {
__le16 error_code;
__le16 req_type;
__le16 seq_id;
__le16 resp_len;
char install_ver[32];
char active_ver[32];
__le16 status_flags;
#define FW_LIVEPATCH_QUERY_RESP_STATUS_FLAGS_INSTALL 0x1UL
#define FW_LIVEPATCH_QUERY_RESP_STATUS_FLAGS_ACTIVE 0x2UL
u8 unused_0[5];
u8 valid;
};
/* hwrm_fw_livepatch_input (size:256b/32B) */
struct hwrm_fw_livepatch_input {
__le16 req_type;
__le16 cmpl_ring;
__le16 seq_id;
__le16 target_id;
__le64 resp_addr;
u8 opcode;
#define FW_LIVEPATCH_REQ_OPCODE_ACTIVATE 0x1UL
#define FW_LIVEPATCH_REQ_OPCODE_DEACTIVATE 0x2UL
#define FW_LIVEPATCH_REQ_OPCODE_LAST FW_LIVEPATCH_REQ_OPCODE_DEACTIVATE
u8 fw_target;
#define FW_LIVEPATCH_REQ_FW_TARGET_COMMON_FW 0x1UL
#define FW_LIVEPATCH_REQ_FW_TARGET_SECURE_FW 0x2UL
#define FW_LIVEPATCH_REQ_FW_TARGET_LAST FW_LIVEPATCH_REQ_FW_TARGET_SECURE_FW
u8 loadtype;
#define FW_LIVEPATCH_REQ_LOADTYPE_NVM_INSTALL 0x1UL
#define FW_LIVEPATCH_REQ_LOADTYPE_MEMORY_DIRECT 0x2UL
#define FW_LIVEPATCH_REQ_LOADTYPE_LAST FW_LIVEPATCH_REQ_LOADTYPE_MEMORY_DIRECT
u8 flags;
__le32 patch_len;
__le64 host_addr;
};
/* hwrm_fw_livepatch_output (size:128b/16B) */
struct hwrm_fw_livepatch_output {
__le16 error_code;
__le16 req_type;
__le16 seq_id;
__le16 resp_len;
u8 unused_0[7];
u8 valid;
};
/* hwrm_fw_livepatch_cmd_err (size:64b/8B) */
struct hwrm_fw_livepatch_cmd_err {
u8 code;
#define FW_LIVEPATCH_CMD_ERR_CODE_UNKNOWN 0x0UL
#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_OPCODE 0x1UL
#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_TARGET 0x2UL
#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_SUPPORTED 0x3UL
#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_INSTALLED 0x4UL
#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_PATCHED 0x5UL
#define FW_LIVEPATCH_CMD_ERR_CODE_AUTH_FAIL 0x6UL
#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_HEADER 0x7UL
#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_SIZE 0x8UL
#define FW_LIVEPATCH_CMD_ERR_CODE_ALREADY_PATCHED 0x9UL
#define FW_LIVEPATCH_CMD_ERR_CODE_LAST FW_LIVEPATCH_CMD_ERR_CODE_ALREADY_PATCHED
u8 unused_0[7];
};
/* hwrm_exec_fwd_resp_input (size:1024b/128B) */
struct hwrm_exec_fwd_resp_input {
__le16 req_type;
......
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