Commit 21ec757d authored by Romain Perier's avatar Romain Perier Committed by Herbert Xu

crypto: marvell/cesa - Improving code readability

When looking for available engines, the variable "engine" is
assigned to "&cesa->engines[i]" at the beginning of the for loop. Replacing
next occurences of "&cesa->engines[i]" by "engine" and in order to improve
readability.
Signed-off-by: default avatarRomain Perier <romain.perier@free-electrons.com>
Acked-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 55124425
...@@ -475,18 +475,18 @@ static int mv_cesa_probe(struct platform_device *pdev) ...@@ -475,18 +475,18 @@ static int mv_cesa_probe(struct platform_device *pdev)
engine->regs = cesa->regs + CESA_ENGINE_OFF(i); engine->regs = cesa->regs + CESA_ENGINE_OFF(i);
if (dram && cesa->caps->has_tdma) if (dram && cesa->caps->has_tdma)
mv_cesa_conf_mbus_windows(&cesa->engines[i], dram); mv_cesa_conf_mbus_windows(engine, dram);
writel(0, cesa->engines[i].regs + CESA_SA_INT_STATUS); writel(0, engine->regs + CESA_SA_INT_STATUS);
writel(CESA_SA_CFG_STOP_DIG_ERR, writel(CESA_SA_CFG_STOP_DIG_ERR,
cesa->engines[i].regs + CESA_SA_CFG); engine->regs + CESA_SA_CFG);
writel(engine->sram_dma & CESA_SA_SRAM_MSK, writel(engine->sram_dma & CESA_SA_SRAM_MSK,
cesa->engines[i].regs + CESA_SA_DESC_P0); engine->regs + CESA_SA_DESC_P0);
ret = devm_request_threaded_irq(dev, irq, NULL, mv_cesa_int, ret = devm_request_threaded_irq(dev, irq, NULL, mv_cesa_int,
IRQF_ONESHOT, IRQF_ONESHOT,
dev_name(&pdev->dev), dev_name(&pdev->dev),
&cesa->engines[i]); engine);
if (ret) if (ret)
goto err_cleanup; goto err_cleanup;
} }
......
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