powerpc: Add TBI PHY node to first MDIO bus

Systems which use the fsl_pq_mdio driver need to specify an
address for TBI PHY transactions such that the address does
not conflict with any PHYs on the bus (all transactions to
that address are directed to the onboard TBI PHY). The driver
used to scan for a free address if no address was specified,
however this ran into issues when the PHY Lib was fixed so
that all MDIO transactions were protected by a mutex. As it
is, the code was meant to serve as a transitional tool until
the device trees were all updated to specify the TBI address.

The best fix for the mutex issue was to remove the scanning code,
but it turns out some of the newer SoCs have started to omit
the tbi-phy node when SGMII is not being used. As such, these
devices will now fail unless we add a tbi-phy node to the first
mdio controller.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

arch/powerpc/boot/dts/p1010rdb.dtsi

@@ -194,6 +194,11 @@ phy2: ethernet-phy@2 {
 			interrupts = <2 1 0 0>;
 			reg = <0x2>;
 		};
+
+		tbi-phy@3 {
+			device-type = "tbi-phy";
+			reg = <0x3>;
+		};
 	};
 
 	mdio@25000 {

arch/powerpc/boot/dts/p1020rdb.dtsi

@@ -214,6 +214,11 @@ phy1: ethernet-phy@1 {
 			interrupts = <2 1>;
 			reg = <0x1>;
 		};
+
+		tbi-phy@2 {
+			device_type = "tbi-phy";
+			reg = <0x2>;
+		};
 	};
 
 	mdio@25000 {

arch/powerpc/boot/dts/p1021mds.dts

@@ -165,6 +165,10 @@ phy1: ethernet-phy@1 {
 			phy4: ethernet-phy@4 {
 				reg = <0x4>;
 			};
+			tbi-phy@5 {
+				device_type = "tbi-phy";
+				reg = <0x5>;
+			};
 		};
 
 		mdio@25000 {

arch/powerpc/boot/dts/p1022ds.dts

@@ -207,6 +207,10 @@ phy1: ethernet-phy@1 {
 				interrupts = <9 1 0 0>;
 				reg = <0x2>;
 			};
+			tbi-phy@2 {
+				device_type = "tbi-phy";
+				reg = <0x2>;
+			};
 		};
 
 		ethernet@b0000 {

arch/powerpc/boot/dts/p2020rdb.dts

@@ -208,6 +208,10 @@ phy1: ethernet-phy@1 {
 				interrupts = <3 1 0 0>;
 				reg = <0x1>;
 			};
+			tbi-phy@2 {
+				device_type = "tbi-phy";
+				reg = <0x2>;
+			};
 		};
 
 		mdio@25520 {