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Commit 2283c85b authored by Connor McAdams's avatar Connor McAdams Committed by Takashi Iwai
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ALSA: hda/ca0132 - Add output set commands for AE-5 

This patch adds output selection commands for the AE-5.
Signed-off-by: default avatarConnor McAdams <conmanx360@gmail.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 746fc9de
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Showing with 70 additions and 10 deletions
sound/pci/hda/patch_ca0132.c
View file @ 2283c85b
...@@ -666,6 +666,29 @@ static const struct ct_dsp_volume_ctl ca0132_alt_vol_ctls[] = { ...@@ -666,6 +666,29 @@ static const struct ct_dsp_volume_ctl ca0132_alt_vol_ctls[] = {
} }
}; };
/* Values for ca0113_mmio_command_set for selecting output. */
#define AE5_CA0113_OUT_SET_COMMANDS 6
struct ae5_ca0113_output_set {
unsigned int group[AE5_CA0113_OUT_SET_COMMANDS];
unsigned int target[AE5_CA0113_OUT_SET_COMMANDS];
unsigned int vals[AE5_CA0113_OUT_SET_COMMANDS];
};
static const struct ae5_ca0113_output_set ae5_ca0113_output_presets[] = {
{ .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
.target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
.vals = { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f }
},
{ .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
.target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
.vals = { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 }
},
{ .group = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
.target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
.vals = { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f }
}
};
enum hda_cmd_vendor_io { enum hda_cmd_vendor_io {
/* for DspIO node */ /* for DspIO node */
VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000, VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
...@@ -4025,6 +4048,18 @@ static int ca0132_select_out(struct hda_codec *codec) ...@@ -4025,6 +4048,18 @@ static int ca0132_select_out(struct hda_codec *codec)
return err < 0 ? err : 0; return err < 0 ? err : 0;
} }
static void ae5_mmio_select_out(struct hda_codec *codec)
{
struct ca0132_spec *spec = codec->spec;
unsigned int i;
for (i = 0; i < AE5_CA0113_OUT_SET_COMMANDS; i++)
ca0113_mmio_command_set(codec,
ae5_ca0113_output_presets[spec->cur_out_type].group[i],
ae5_ca0113_output_presets[spec->cur_out_type].target[i],
ae5_ca0113_output_presets[spec->cur_out_type].vals[i]);
}
/* /*
* These are the commands needed to setup output on each of the different card * These are the commands needed to setup output on each of the different card
* types. * types.
...@@ -4032,6 +4067,7 @@ static int ca0132_select_out(struct hda_codec *codec) ...@@ -4032,6 +4067,7 @@ static int ca0132_select_out(struct hda_codec *codec)
static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec) static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec)
{ {
struct ca0132_spec *spec = codec->spec; struct ca0132_spec *spec = codec->spec;
unsigned int tmp;
switch (spec->cur_out_type) { switch (spec->cur_out_type) {
case SPEAKER_OUT: case SPEAKER_OUT:
...@@ -4040,16 +4076,24 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec) ...@@ -4040,16 +4076,24 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec)
ca0113_mmio_gpio_set(codec, 7, false); ca0113_mmio_gpio_set(codec, 7, false);
ca0113_mmio_gpio_set(codec, 4, true); ca0113_mmio_gpio_set(codec, 4, true);
ca0113_mmio_gpio_set(codec, 1, true); ca0113_mmio_gpio_set(codec, 1, true);
chipio_set_control_param(codec, 0x0D, 0x18); chipio_set_control_param(codec, 0x0d, 0x18);
break; break;
case QUIRK_R3DI: case QUIRK_R3DI:
chipio_set_control_param(codec, 0x0D, 0x24); chipio_set_control_param(codec, 0x0d, 0x24);
r3di_gpio_out_set(codec, R3DI_LINE_OUT); r3di_gpio_out_set(codec, R3DI_LINE_OUT);
break; break;
case QUIRK_R3D: case QUIRK_R3D:
chipio_set_control_param(codec, 0x0D, 0x24); chipio_set_control_param(codec, 0x0d, 0x24);
ca0113_mmio_gpio_set(codec, 1, true); ca0113_mmio_gpio_set(codec, 1, true);
break; break;
case QUIRK_AE5:
ae5_mmio_select_out(codec);
tmp = FLOAT_ZERO;
dspio_set_uint_param(codec, 0x96, 0x29, tmp);
dspio_set_uint_param(codec, 0x96, 0x2a, tmp);
chipio_set_control_param(codec, 0x0d, 0xa4);
chipio_write(codec, 0x18b03c, 0x00000012);
break;
} }
break; break;
case HEADPHONE_OUT: case HEADPHONE_OUT:
...@@ -4058,16 +4102,24 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec) ...@@ -4058,16 +4102,24 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec)
ca0113_mmio_gpio_set(codec, 7, true); ca0113_mmio_gpio_set(codec, 7, true);
ca0113_mmio_gpio_set(codec, 4, true); ca0113_mmio_gpio_set(codec, 4, true);
ca0113_mmio_gpio_set(codec, 1, false); ca0113_mmio_gpio_set(codec, 1, false);
chipio_set_control_param(codec, 0x0D, 0x12); chipio_set_control_param(codec, 0x0d, 0x12);
break; break;
case QUIRK_R3DI: case QUIRK_R3DI:
chipio_set_control_param(codec, 0x0D, 0x21); chipio_set_control_param(codec, 0x0d, 0x21);
r3di_gpio_out_set(codec, R3DI_HEADPHONE_OUT); r3di_gpio_out_set(codec, R3DI_HEADPHONE_OUT);
break; break;
case QUIRK_R3D: case QUIRK_R3D:
chipio_set_control_param(codec, 0x0D, 0x21); chipio_set_control_param(codec, 0x0d, 0x21);
ca0113_mmio_gpio_set(codec, 0x1, false); ca0113_mmio_gpio_set(codec, 0x1, false);
break; break;
case QUIRK_AE5:
ae5_mmio_select_out(codec);
tmp = FLOAT_ONE;
dspio_set_uint_param(codec, 0x96, 0x29, tmp);
dspio_set_uint_param(codec, 0x96, 0x2a, tmp);
chipio_set_control_param(codec, 0x0d, 0xa1);
chipio_write(codec, 0x18b03c, 0x00000012);
break;
} }
break; break;
case SURROUND_OUT: case SURROUND_OUT:
...@@ -4076,15 +4128,23 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec) ...@@ -4076,15 +4128,23 @@ static void ca0132_alt_select_out_quirk_handler(struct hda_codec *codec)
ca0113_mmio_gpio_set(codec, 7, false); ca0113_mmio_gpio_set(codec, 7, false);
ca0113_mmio_gpio_set(codec, 4, true); ca0113_mmio_gpio_set(codec, 4, true);
ca0113_mmio_gpio_set(codec, 1, true); ca0113_mmio_gpio_set(codec, 1, true);
chipio_set_control_param(codec, 0x0D, 0x18); chipio_set_control_param(codec, 0x0d, 0x18);
break; break;
case QUIRK_R3DI: case QUIRK_R3DI:
chipio_set_control_param(codec, 0x0D, 0x24); chipio_set_control_param(codec, 0x0d, 0x24);
r3di_gpio_out_set(codec, R3DI_LINE_OUT); r3di_gpio_out_set(codec, R3DI_LINE_OUT);
break; break;
case QUIRK_R3D: case QUIRK_R3D:
ca0113_mmio_gpio_set(codec, 1, true); ca0113_mmio_gpio_set(codec, 1, true);
chipio_set_control_param(codec, 0x0D, 0x24); chipio_set_control_param(codec, 0x0d, 0x24);
break;
case QUIRK_AE5:
ae5_mmio_select_out(codec);
tmp = FLOAT_ZERO;
dspio_set_uint_param(codec, 0x96, 0x29, tmp);
dspio_set_uint_param(codec, 0x96, 0x2a, tmp);
chipio_set_control_param(codec, 0x0d, 0xa4);
chipio_write(codec, 0x18b03c, 0x00000012);
break; break;
} }
break; break;
...@@ -4230,7 +4290,7 @@ static int ca0132_alt_select_out(struct hda_codec *codec) ...@@ -4230,7 +4290,7 @@ static int ca0132_alt_select_out(struct hda_codec *codec)
break; break;
} }
/* run through the output dsp commands for line-out */ /* run through the output dsp commands for the selected output. */
for (i = 0; i < alt_out_presets[spec->cur_out_type].commands; i++) { for (i = 0; i < alt_out_presets[spec->cur_out_type].commands; i++) {
err = dspio_set_uint_param(codec, err = dspio_set_uint_param(codec,
alt_out_presets[spec->cur_out_type].mids[i], alt_out_presets[spec->cur_out_type].mids[i],
......
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