Commit 23618f7f authored by Tony Lindgren's avatar Tony Lindgren

Merge branch 'for_3.2/voltage-cleanup' of git://gitorious.org/khilman/linux-omap-pm into voltage

parents ceb1c532 ee7fbba6
...@@ -90,8 +90,9 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ ...@@ -90,8 +90,9 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \
# OMAP voltage domains # OMAP voltage domains
ifeq ($(CONFIG_PM),y) ifeq ($(CONFIG_PM),y)
voltagedomain-common := voltage.o voltagedomain-common := voltage.o vc.o vp.o
obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \
voltagedomains2xxx_data.o
obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \
voltagedomains3xxx_data.o voltagedomains3xxx_data.o
obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \
......
...@@ -38,6 +38,7 @@ ...@@ -38,6 +38,7 @@
#include "io.h" #include "io.h"
#include <plat/omap-pm.h> #include <plat/omap-pm.h>
#include "voltage.h"
#include "powerdomain.h" #include "powerdomain.h"
#include "clockdomain.h" #include "clockdomain.h"
...@@ -341,18 +342,22 @@ void __init omap2_init_common_infrastructure(void) ...@@ -341,18 +342,22 @@ void __init omap2_init_common_infrastructure(void)
u8 postsetup_state; u8 postsetup_state;
if (cpu_is_omap242x()) { if (cpu_is_omap242x()) {
omap2xxx_voltagedomains_init();
omap242x_powerdomains_init(); omap242x_powerdomains_init();
omap242x_clockdomains_init(); omap242x_clockdomains_init();
omap2420_hwmod_init(); omap2420_hwmod_init();
} else if (cpu_is_omap243x()) { } else if (cpu_is_omap243x()) {
omap2xxx_voltagedomains_init();
omap243x_powerdomains_init(); omap243x_powerdomains_init();
omap243x_clockdomains_init(); omap243x_clockdomains_init();
omap2430_hwmod_init(); omap2430_hwmod_init();
} else if (cpu_is_omap34xx()) { } else if (cpu_is_omap34xx()) {
omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init(); omap3xxx_powerdomains_init();
omap3xxx_clockdomains_init(); omap3xxx_clockdomains_init();
omap3xxx_hwmod_init(); omap3xxx_hwmod_init();
} else if (cpu_is_omap44xx()) { } else if (cpu_is_omap44xx()) {
omap44xx_voltagedomains_init();
omap44xx_powerdomains_init(); omap44xx_powerdomains_init();
omap44xx_clockdomains_init(); omap44xx_clockdomains_init();
omap44xx_hwmod_init(); omap44xx_hwmod_init();
......
...@@ -2542,7 +2542,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { ...@@ -2542,7 +2542,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
.name = "sr1_hwmod", .name = "sr1_hwmod",
.class = &omap34xx_smartreflex_hwmod_class, .class = &omap34xx_smartreflex_hwmod_class,
.main_clk = "sr1_fck", .main_clk = "sr1_fck",
.vdd_name = "mpu", .vdd_name = "mpu_iva",
.prcm = { .prcm = {
.omap2 = { .omap2 = {
.prcm_reg_id = 1, .prcm_reg_id = 1,
...@@ -2561,7 +2561,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { ...@@ -2561,7 +2561,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
.name = "sr1_hwmod", .name = "sr1_hwmod",
.class = &omap36xx_smartreflex_hwmod_class, .class = &omap36xx_smartreflex_hwmod_class,
.main_clk = "sr1_fck", .main_clk = "sr1_fck",
.vdd_name = "mpu", .vdd_name = "mpu_iva",
.prcm = { .prcm = {
.omap2 = { .omap2 = {
.prcm_reg_id = 1, .prcm_reg_id = 1,
......
...@@ -42,8 +42,11 @@ ...@@ -42,8 +42,11 @@
#define OMAP4_SRI2C_SLAVE_ADDR 0x12 #define OMAP4_SRI2C_SLAVE_ADDR 0x12
#define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
#define OMAP4_VDD_MPU_SR_CMD_REG 0x56
#define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B
#define OMAP4_VDD_IVA_SR_CMD_REG 0x5C
#define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61
#define OMAP4_VDD_CORE_SR_CMD_REG 0x62
#define OMAP4_VP_CONFIG_ERROROFFSET 0x00 #define OMAP4_VP_CONFIG_ERROROFFSET 0x00
#define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01
...@@ -95,6 +98,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) ...@@ -95,6 +98,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel)
is_offset_valid = true; is_offset_valid = true;
} }
if (!vsel)
return 0;
/* /*
* There is no specific formula for voltage to vsel * There is no specific formula for voltage to vsel
* conversion above 1.3V. There are special hardcoded * conversion above 1.3V. There are special hardcoded
...@@ -106,9 +111,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) ...@@ -106,9 +111,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel)
return 1350000; return 1350000;
if (smps_offset & 0x8) if (smps_offset & 0x8)
return ((((vsel - 1) * 125) + 7000)) * 100; return ((((vsel - 1) * 1266) + 70900)) * 10;
else else
return ((((vsel - 1) * 125) + 6000)) * 100; return ((((vsel - 1) * 1266) + 60770)) * 10;
} }
static u8 twl6030_uv_to_vsel(unsigned long uv) static u8 twl6030_uv_to_vsel(unsigned long uv)
...@@ -127,6 +132,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) ...@@ -127,6 +132,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv)
is_offset_valid = true; is_offset_valid = true;
} }
if (!uv)
return 0x00;
/* /*
* There is no specific formula for voltage to vsel * There is no specific formula for voltage to vsel
* conversion above 1.3V. There are special hardcoded * conversion above 1.3V. There are special hardcoded
...@@ -134,16 +141,21 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) ...@@ -134,16 +141,21 @@ static u8 twl6030_uv_to_vsel(unsigned long uv)
* hardcoding only for 1.35 V which is used for 1GH OPP for * hardcoding only for 1.35 V which is used for 1GH OPP for
* OMAP4430. * OMAP4430.
*/ */
if (uv == 1350000) if (uv > twl6030_vsel_to_uv(0x39)) {
if (uv == 1350000)
return 0x3A;
pr_err("%s:OUT OF RANGE! non mapped vsel for %ld Vs max %ld\n",
__func__, uv, twl6030_vsel_to_uv(0x39));
return 0x3A; return 0x3A;
}
if (smps_offset & 0x8) if (smps_offset & 0x8)
return DIV_ROUND_UP(uv - 700000, 12500) + 1; return DIV_ROUND_UP(uv - 709000, 12660) + 1;
else else
return DIV_ROUND_UP(uv - 600000, 12500) + 1; return DIV_ROUND_UP(uv - 607700, 12660) + 1;
} }
static struct omap_volt_pmic_info omap3_mpu_volt_info = { static struct omap_voltdm_pmic omap3_mpu_pmic = {
.slew_rate = 4000, .slew_rate = 4000,
.step_size = 12500, .step_size = 12500,
.on_volt = 1200000, .on_volt = 1200000,
...@@ -158,12 +170,13 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { ...@@ -158,12 +170,13 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = {
.vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
.pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG, .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG,
.i2c_high_speed = true,
.vsel_to_uv = twl4030_vsel_to_uv, .vsel_to_uv = twl4030_vsel_to_uv,
.uv_to_vsel = twl4030_uv_to_vsel, .uv_to_vsel = twl4030_uv_to_vsel,
}; };
static struct omap_volt_pmic_info omap3_core_volt_info = { static struct omap_voltdm_pmic omap3_core_pmic = {
.slew_rate = 4000, .slew_rate = 4000,
.step_size = 12500, .step_size = 12500,
.on_volt = 1200000, .on_volt = 1200000,
...@@ -178,18 +191,19 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { ...@@ -178,18 +191,19 @@ static struct omap_volt_pmic_info omap3_core_volt_info = {
.vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
.pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG, .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG,
.i2c_high_speed = true,
.vsel_to_uv = twl4030_vsel_to_uv, .vsel_to_uv = twl4030_vsel_to_uv,
.uv_to_vsel = twl4030_uv_to_vsel, .uv_to_vsel = twl4030_uv_to_vsel,
}; };
static struct omap_volt_pmic_info omap4_mpu_volt_info = { static struct omap_voltdm_pmic omap4_mpu_pmic = {
.slew_rate = 4000, .slew_rate = 4000,
.step_size = 12500, .step_size = 12660,
.on_volt = 1350000, .on_volt = 1375000,
.onlp_volt = 1350000, .onlp_volt = 1375000,
.ret_volt = 837500, .ret_volt = 830000,
.off_volt = 600000, .off_volt = 0,
.volt_setup_time = 0, .volt_setup_time = 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
...@@ -198,18 +212,20 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { ...@@ -198,18 +212,20 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = {
.vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
.cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG,
.i2c_high_speed = true,
.vsel_to_uv = twl6030_vsel_to_uv, .vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel, .uv_to_vsel = twl6030_uv_to_vsel,
}; };
static struct omap_volt_pmic_info omap4_iva_volt_info = { static struct omap_voltdm_pmic omap4_iva_pmic = {
.slew_rate = 4000, .slew_rate = 4000,
.step_size = 12500, .step_size = 12660,
.on_volt = 1100000, .on_volt = 1188000,
.onlp_volt = 1100000, .onlp_volt = 1188000,
.ret_volt = 837500, .ret_volt = 830000,
.off_volt = 600000, .off_volt = 0,
.volt_setup_time = 0, .volt_setup_time = 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
...@@ -218,18 +234,20 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { ...@@ -218,18 +234,20 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = {
.vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
.cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG,
.i2c_high_speed = true,
.vsel_to_uv = twl6030_vsel_to_uv, .vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel, .uv_to_vsel = twl6030_uv_to_vsel,
}; };
static struct omap_volt_pmic_info omap4_core_volt_info = { static struct omap_voltdm_pmic omap4_core_pmic = {
.slew_rate = 4000, .slew_rate = 4000,
.step_size = 12500, .step_size = 12660,
.on_volt = 1100000, .on_volt = 1200000,
.onlp_volt = 1100000, .onlp_volt = 1200000,
.ret_volt = 837500, .ret_volt = 830000,
.off_volt = 600000, .off_volt = 0,
.volt_setup_time = 0, .volt_setup_time = 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
...@@ -238,7 +256,8 @@ static struct omap_volt_pmic_info omap4_core_volt_info = { ...@@ -238,7 +256,8 @@ static struct omap_volt_pmic_info omap4_core_volt_info = {
.vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG, .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG,
.cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG,
.vsel_to_uv = twl6030_vsel_to_uv, .vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel, .uv_to_vsel = twl6030_uv_to_vsel,
}; };
...@@ -250,14 +269,14 @@ int __init omap4_twl_init(void) ...@@ -250,14 +269,14 @@ int __init omap4_twl_init(void)
if (!cpu_is_omap44xx()) if (!cpu_is_omap44xx())
return -ENODEV; return -ENODEV;
voltdm = omap_voltage_domain_lookup("mpu"); voltdm = voltdm_lookup("mpu");
omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic);
voltdm = omap_voltage_domain_lookup("iva"); voltdm = voltdm_lookup("iva");
omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); omap_voltage_register_pmic(voltdm, &omap4_iva_pmic);
voltdm = omap_voltage_domain_lookup("core"); voltdm = voltdm_lookup("core");
omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); omap_voltage_register_pmic(voltdm, &omap4_core_pmic);
return 0; return 0;
} }
...@@ -270,10 +289,10 @@ int __init omap3_twl_init(void) ...@@ -270,10 +289,10 @@ int __init omap3_twl_init(void)
return -ENODEV; return -ENODEV;
if (cpu_is_omap3630()) { if (cpu_is_omap3630()) {
omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
} }
/* /*
...@@ -288,11 +307,11 @@ int __init omap3_twl_init(void) ...@@ -288,11 +307,11 @@ int __init omap3_twl_init(void)
if (!twl_sr_enable_autoinit) if (!twl_sr_enable_autoinit)
omap3_twl_set_sr_bit(true); omap3_twl_set_sr_bit(true);
voltdm = omap_voltage_domain_lookup("mpu"); voltdm = voltdm_lookup("mpu_iva");
omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic);
voltdm = omap_voltage_domain_lookup("core"); voltdm = voltdm_lookup("core");
omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); omap_voltage_register_pmic(voltdm, &omap3_core_pmic);
return 0; return 0;
} }
......
...@@ -181,7 +181,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, ...@@ -181,7 +181,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
goto exit; goto exit;
} }
voltdm = omap_voltage_domain_lookup(vdd_name); voltdm = voltdm_lookup(vdd_name);
if (IS_ERR(voltdm)) { if (IS_ERR(voltdm)) {
printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n",
__func__, vdd_name); __func__, vdd_name);
...@@ -212,7 +212,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, ...@@ -212,7 +212,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
goto exit; goto exit;
} }
omap_voltage_scale_vdd(voltdm, bootup_volt); voltdm_scale(voltdm, bootup_volt);
return 0; return 0;
exit: exit:
...@@ -226,7 +226,7 @@ static void __init omap3_init_voltages(void) ...@@ -226,7 +226,7 @@ static void __init omap3_init_voltages(void)
if (!cpu_is_omap34xx()) if (!cpu_is_omap34xx())
return; return;
omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev); omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev);
omap2_set_init_voltage("core", "l3_ick", l3_dev); omap2_set_init_voltage("core", "l3_ick", l3_dev);
} }
......
...@@ -77,6 +77,7 @@ static struct powerdomain *_pwrdm_lookup(const char *name) ...@@ -77,6 +77,7 @@ static struct powerdomain *_pwrdm_lookup(const char *name)
static int _pwrdm_register(struct powerdomain *pwrdm) static int _pwrdm_register(struct powerdomain *pwrdm)
{ {
int i; int i;
struct voltagedomain *voltdm;
if (!pwrdm || !pwrdm->name) if (!pwrdm || !pwrdm->name)
return -EINVAL; return -EINVAL;
...@@ -91,6 +92,16 @@ static int _pwrdm_register(struct powerdomain *pwrdm) ...@@ -91,6 +92,16 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
if (_pwrdm_lookup(pwrdm->name)) if (_pwrdm_lookup(pwrdm->name))
return -EEXIST; return -EEXIST;
voltdm = voltdm_lookup(pwrdm->voltdm.name);
if (!voltdm) {
pr_err("powerdomain: %s: voltagedomain %s does not exist\n",
pwrdm->name, pwrdm->voltdm.name);
return -EINVAL;
}
pwrdm->voltdm.ptr = voltdm;
INIT_LIST_HEAD(&pwrdm->voltdm_node);
voltdm_add_pwrdm(voltdm, pwrdm);
list_add(&pwrdm->node, &pwrdm_list); list_add(&pwrdm->node, &pwrdm_list);
/* Initialize the powerdomain's state counter */ /* Initialize the powerdomain's state counter */
...@@ -426,6 +437,18 @@ int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, ...@@ -426,6 +437,18 @@ int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
return ret; return ret;
} }
/**
* pwrdm_get_voltdm - return a ptr to the voltdm that this pwrdm resides in
* @pwrdm: struct powerdomain *
*
* Return a pointer to the struct voltageomain that the specified powerdomain
* @pwrdm exists in.
*/
struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm)
{
return pwrdm->voltdm.ptr;
}
/** /**
* pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain
* @pwrdm: struct powerdomain * * @pwrdm: struct powerdomain *
......
...@@ -24,6 +24,8 @@ ...@@ -24,6 +24,8 @@
#include <plat/cpu.h> #include <plat/cpu.h>
#include "voltage.h"
/* Powerdomain basic power states */ /* Powerdomain basic power states */
#define PWRDM_POWER_OFF 0x0 #define PWRDM_POWER_OFF 0x0
#define PWRDM_POWER_RET 0x1 #define PWRDM_POWER_RET 0x1
...@@ -78,6 +80,7 @@ struct powerdomain; ...@@ -78,6 +80,7 @@ struct powerdomain;
/** /**
* struct powerdomain - OMAP powerdomain * struct powerdomain - OMAP powerdomain
* @name: Powerdomain name * @name: Powerdomain name
* @voltdm: voltagedomain containing this powerdomain
* @prcm_offs: the address offset from CM_BASE/PRM_BASE * @prcm_offs: the address offset from CM_BASE/PRM_BASE
* @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
* @pwrsts: Possible powerdomain power states * @pwrsts: Possible powerdomain power states
...@@ -88,6 +91,7 @@ struct powerdomain; ...@@ -88,6 +91,7 @@ struct powerdomain;
* @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
* @pwrdm_clkdms: Clockdomains in this powerdomain * @pwrdm_clkdms: Clockdomains in this powerdomain
* @node: list_head linking all powerdomains * @node: list_head linking all powerdomains
* @voltdm_node: list_head linking all powerdomains in a voltagedomain
* @state: * @state:
* @state_counter: * @state_counter:
* @timer: * @timer:
...@@ -97,6 +101,10 @@ struct powerdomain; ...@@ -97,6 +101,10 @@ struct powerdomain;
*/ */
struct powerdomain { struct powerdomain {
const char *name; const char *name;
union {
const char *name;
struct voltagedomain *ptr;
} voltdm;
const s16 prcm_offs; const s16 prcm_offs;
const u8 pwrsts; const u8 pwrsts;
const u8 pwrsts_logic_ret; const u8 pwrsts_logic_ret;
...@@ -107,6 +115,7 @@ struct powerdomain { ...@@ -107,6 +115,7 @@ struct powerdomain {
const u8 prcm_partition; const u8 prcm_partition;
struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
struct list_head node; struct list_head node;
struct list_head voltdm_node;
int state; int state;
unsigned state_counter[PWRDM_MAX_PWRSTS]; unsigned state_counter[PWRDM_MAX_PWRSTS];
unsigned ret_logic_off_counter; unsigned ret_logic_off_counter;
...@@ -176,6 +185,7 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); ...@@ -176,6 +185,7 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
int (*fn)(struct powerdomain *pwrdm, int (*fn)(struct powerdomain *pwrdm,
struct clockdomain *clkdm)); struct clockdomain *clkdm));
struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm);
int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
......
/* /*
* OMAP2 and OMAP3 powerdomain control * OMAP2 and OMAP3 powerdomain control
* *
* Copyright (C) 2009-2010 Texas Instruments, Inc. * Copyright (C) 2009-2011 Texas Instruments, Inc.
* Copyright (C) 2007-2009 Nokia Corporation * Copyright (C) 2007-2009 Nokia Corporation
* *
* Derived from mach-omap2/powerdomain.c written by Paul Walmsley * Derived from mach-omap2/powerdomain.c written by Paul Walmsley
......
...@@ -54,10 +54,12 @@ struct powerdomain gfx_omap2_pwrdm = { ...@@ -54,10 +54,12 @@ struct powerdomain gfx_omap2_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, /* MEMONSTATE */ [0] = PWRSTS_ON, /* MEMONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
struct powerdomain wkup_omap2_pwrdm = { struct powerdomain wkup_omap2_pwrdm = {
.name = "wkup_pwrdm", .name = "wkup_pwrdm",
.prcm_offs = WKUP_MOD, .prcm_offs = WKUP_MOD,
.pwrsts = PWRSTS_ON, .pwrsts = PWRSTS_ON,
.voltdm = { .name = "wakeup" },
}; };
...@@ -37,6 +37,7 @@ static struct powerdomain dsp_pwrdm = { ...@@ -37,6 +37,7 @@ static struct powerdomain dsp_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, [0] = PWRSTS_ON,
}, },
.voltdm = { .name = "core" },
}; };
static struct powerdomain mpu_24xx_pwrdm = { static struct powerdomain mpu_24xx_pwrdm = {
...@@ -51,6 +52,7 @@ static struct powerdomain mpu_24xx_pwrdm = { ...@@ -51,6 +52,7 @@ static struct powerdomain mpu_24xx_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, [0] = PWRSTS_ON,
}, },
.voltdm = { .name = "core" },
}; };
static struct powerdomain core_24xx_pwrdm = { static struct powerdomain core_24xx_pwrdm = {
...@@ -68,6 +70,7 @@ static struct powerdomain core_24xx_pwrdm = { ...@@ -68,6 +70,7 @@ static struct powerdomain core_24xx_pwrdm = {
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
[2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
...@@ -89,6 +92,7 @@ static struct powerdomain mdm_pwrdm = { ...@@ -89,6 +92,7 @@ static struct powerdomain mdm_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, /* MEMONSTATE */ [0] = PWRSTS_ON, /* MEMONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
/* /*
......
...@@ -51,6 +51,7 @@ static struct powerdomain iva2_pwrdm = { ...@@ -51,6 +51,7 @@ static struct powerdomain iva2_pwrdm = {
[2] = PWRSTS_OFF_ON, [2] = PWRSTS_OFF_ON,
[3] = PWRSTS_ON, [3] = PWRSTS_ON,
}, },
.voltdm = { .name = "mpu_iva" },
}; };
static struct powerdomain mpu_3xxx_pwrdm = { static struct powerdomain mpu_3xxx_pwrdm = {
...@@ -66,6 +67,7 @@ static struct powerdomain mpu_3xxx_pwrdm = { ...@@ -66,6 +67,7 @@ static struct powerdomain mpu_3xxx_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_OFF_ON, [0] = PWRSTS_OFF_ON,
}, },
.voltdm = { .name = "mpu_iva" },
}; };
/* /*
...@@ -92,6 +94,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { ...@@ -92,6 +94,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
static struct powerdomain core_3xxx_es3_1_pwrdm = { static struct powerdomain core_3xxx_es3_1_pwrdm = {
...@@ -113,6 +116,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = { ...@@ -113,6 +116,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
static struct powerdomain dss_pwrdm = { static struct powerdomain dss_pwrdm = {
...@@ -127,6 +131,7 @@ static struct powerdomain dss_pwrdm = { ...@@ -127,6 +131,7 @@ static struct powerdomain dss_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, /* MEMONSTATE */ [0] = PWRSTS_ON, /* MEMONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
/* /*
...@@ -147,6 +152,7 @@ static struct powerdomain sgx_pwrdm = { ...@@ -147,6 +152,7 @@ static struct powerdomain sgx_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, /* MEMONSTATE */ [0] = PWRSTS_ON, /* MEMONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
static struct powerdomain cam_pwrdm = { static struct powerdomain cam_pwrdm = {
...@@ -161,6 +167,7 @@ static struct powerdomain cam_pwrdm = { ...@@ -161,6 +167,7 @@ static struct powerdomain cam_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, /* MEMONSTATE */ [0] = PWRSTS_ON, /* MEMONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
static struct powerdomain per_pwrdm = { static struct powerdomain per_pwrdm = {
...@@ -175,11 +182,13 @@ static struct powerdomain per_pwrdm = { ...@@ -175,11 +182,13 @@ static struct powerdomain per_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, /* MEMONSTATE */ [0] = PWRSTS_ON, /* MEMONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
static struct powerdomain emu_pwrdm = { static struct powerdomain emu_pwrdm = {
.name = "emu_pwrdm", .name = "emu_pwrdm",
.prcm_offs = OMAP3430_EMU_MOD, .prcm_offs = OMAP3430_EMU_MOD,
.voltdm = { .name = "core" },
}; };
static struct powerdomain neon_pwrdm = { static struct powerdomain neon_pwrdm = {
...@@ -187,6 +196,7 @@ static struct powerdomain neon_pwrdm = { ...@@ -187,6 +196,7 @@ static struct powerdomain neon_pwrdm = {
.prcm_offs = OMAP3430_NEON_MOD, .prcm_offs = OMAP3430_NEON_MOD,
.pwrsts = PWRSTS_OFF_RET_ON, .pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_RET, .pwrsts_logic_ret = PWRSTS_RET,
.voltdm = { .name = "mpu_iva" },
}; };
static struct powerdomain usbhost_pwrdm = { static struct powerdomain usbhost_pwrdm = {
...@@ -208,31 +218,37 @@ static struct powerdomain usbhost_pwrdm = { ...@@ -208,31 +218,37 @@ static struct powerdomain usbhost_pwrdm = {
.pwrsts_mem_on = { .pwrsts_mem_on = {
[0] = PWRSTS_ON, /* MEMONSTATE */ [0] = PWRSTS_ON, /* MEMONSTATE */
}, },
.voltdm = { .name = "core" },
}; };
static struct powerdomain dpll1_pwrdm = { static struct powerdomain dpll1_pwrdm = {
.name = "dpll1_pwrdm", .name = "dpll1_pwrdm",
.prcm_offs = MPU_MOD, .prcm_offs = MPU_MOD,
.voltdm = { .name = "mpu_iva" },
}; };
static struct powerdomain dpll2_pwrdm = { static struct powerdomain dpll2_pwrdm = {
.name = "dpll2_pwrdm", .name = "dpll2_pwrdm",
.prcm_offs = OMAP3430_IVA2_MOD, .prcm_offs = OMAP3430_IVA2_MOD,
.voltdm = { .name = "mpu_iva" },
}; };
static struct powerdomain dpll3_pwrdm = { static struct powerdomain dpll3_pwrdm = {
.name = "dpll3_pwrdm", .name = "dpll3_pwrdm",
.prcm_offs = PLL_MOD, .prcm_offs = PLL_MOD,
.voltdm = { .name = "core" },
}; };
static struct powerdomain dpll4_pwrdm = { static struct powerdomain dpll4_pwrdm = {
.name = "dpll4_pwrdm", .name = "dpll4_pwrdm",
.prcm_offs = PLL_MOD, .prcm_offs = PLL_MOD,
.voltdm = { .name = "core" },
}; };
static struct powerdomain dpll5_pwrdm = { static struct powerdomain dpll5_pwrdm = {
.name = "dpll5_pwrdm", .name = "dpll5_pwrdm",
.prcm_offs = PLL_MOD, .prcm_offs = PLL_MOD,
.voltdm = { .name = "core" },
}; };
/* As powerdomains are added or removed above, this list must also be changed */ /* As powerdomains are added or removed above, this list must also be changed */
......
...@@ -33,6 +33,7 @@ ...@@ -33,6 +33,7 @@
/* core_44xx_pwrdm: CORE power domain */ /* core_44xx_pwrdm: CORE power domain */
static struct powerdomain core_44xx_pwrdm = { static struct powerdomain core_44xx_pwrdm = {
.name = "core_pwrdm", .name = "core_pwrdm",
.voltdm = { .name = "core" },
.prcm_offs = OMAP4430_PRM_CORE_INST, .prcm_offs = OMAP4430_PRM_CORE_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_RET_ON, .pwrsts = PWRSTS_RET_ON,
...@@ -58,6 +59,7 @@ static struct powerdomain core_44xx_pwrdm = { ...@@ -58,6 +59,7 @@ static struct powerdomain core_44xx_pwrdm = {
/* gfx_44xx_pwrdm: 3D accelerator power domain */ /* gfx_44xx_pwrdm: 3D accelerator power domain */
static struct powerdomain gfx_44xx_pwrdm = { static struct powerdomain gfx_44xx_pwrdm = {
.name = "gfx_pwrdm", .name = "gfx_pwrdm",
.voltdm = { .name = "core" },
.prcm_offs = OMAP4430_PRM_GFX_INST, .prcm_offs = OMAP4430_PRM_GFX_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON, .pwrsts = PWRSTS_OFF_ON,
...@@ -74,6 +76,7 @@ static struct powerdomain gfx_44xx_pwrdm = { ...@@ -74,6 +76,7 @@ static struct powerdomain gfx_44xx_pwrdm = {
/* abe_44xx_pwrdm: Audio back end power domain */ /* abe_44xx_pwrdm: Audio back end power domain */
static struct powerdomain abe_44xx_pwrdm = { static struct powerdomain abe_44xx_pwrdm = {
.name = "abe_pwrdm", .name = "abe_pwrdm",
.voltdm = { .name = "iva" },
.prcm_offs = OMAP4430_PRM_ABE_INST, .prcm_offs = OMAP4430_PRM_ABE_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON, .pwrsts = PWRSTS_OFF_RET_ON,
...@@ -93,6 +96,7 @@ static struct powerdomain abe_44xx_pwrdm = { ...@@ -93,6 +96,7 @@ static struct powerdomain abe_44xx_pwrdm = {
/* dss_44xx_pwrdm: Display subsystem power domain */ /* dss_44xx_pwrdm: Display subsystem power domain */
static struct powerdomain dss_44xx_pwrdm = { static struct powerdomain dss_44xx_pwrdm = {
.name = "dss_pwrdm", .name = "dss_pwrdm",
.voltdm = { .name = "core" },
.prcm_offs = OMAP4430_PRM_DSS_INST, .prcm_offs = OMAP4430_PRM_DSS_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON, .pwrsts = PWRSTS_OFF_RET_ON,
...@@ -110,6 +114,7 @@ static struct powerdomain dss_44xx_pwrdm = { ...@@ -110,6 +114,7 @@ static struct powerdomain dss_44xx_pwrdm = {
/* tesla_44xx_pwrdm: Tesla processor power domain */ /* tesla_44xx_pwrdm: Tesla processor power domain */
static struct powerdomain tesla_44xx_pwrdm = { static struct powerdomain tesla_44xx_pwrdm = {
.name = "tesla_pwrdm", .name = "tesla_pwrdm",
.voltdm = { .name = "iva" },
.prcm_offs = OMAP4430_PRM_TESLA_INST, .prcm_offs = OMAP4430_PRM_TESLA_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON, .pwrsts = PWRSTS_OFF_RET_ON,
...@@ -131,6 +136,7 @@ static struct powerdomain tesla_44xx_pwrdm = { ...@@ -131,6 +136,7 @@ static struct powerdomain tesla_44xx_pwrdm = {
/* wkup_44xx_pwrdm: Wake-up power domain */ /* wkup_44xx_pwrdm: Wake-up power domain */
static struct powerdomain wkup_44xx_pwrdm = { static struct powerdomain wkup_44xx_pwrdm = {
.name = "wkup_pwrdm", .name = "wkup_pwrdm",
.voltdm = { .name = "wakeup" },
.prcm_offs = OMAP4430_PRM_WKUP_INST, .prcm_offs = OMAP4430_PRM_WKUP_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_ON, .pwrsts = PWRSTS_ON,
...@@ -146,6 +152,7 @@ static struct powerdomain wkup_44xx_pwrdm = { ...@@ -146,6 +152,7 @@ static struct powerdomain wkup_44xx_pwrdm = {
/* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */ /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */
static struct powerdomain cpu0_44xx_pwrdm = { static struct powerdomain cpu0_44xx_pwrdm = {
.name = "cpu0_pwrdm", .name = "cpu0_pwrdm",
.voltdm = { .name = "mpu" },
.prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST,
.prcm_partition = OMAP4430_PRCM_MPU_PARTITION, .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON, .pwrsts = PWRSTS_OFF_RET_ON,
...@@ -162,6 +169,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { ...@@ -162,6 +169,7 @@ static struct powerdomain cpu0_44xx_pwrdm = {
/* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */ /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */
static struct powerdomain cpu1_44xx_pwrdm = { static struct powerdomain cpu1_44xx_pwrdm = {
.name = "cpu1_pwrdm", .name = "cpu1_pwrdm",
.voltdm = { .name = "mpu" },
.prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST,
.prcm_partition = OMAP4430_PRCM_MPU_PARTITION, .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON, .pwrsts = PWRSTS_OFF_RET_ON,
...@@ -178,6 +186,7 @@ static struct powerdomain cpu1_44xx_pwrdm = { ...@@ -178,6 +186,7 @@ static struct powerdomain cpu1_44xx_pwrdm = {
/* emu_44xx_pwrdm: Emulation power domain */ /* emu_44xx_pwrdm: Emulation power domain */
static struct powerdomain emu_44xx_pwrdm = { static struct powerdomain emu_44xx_pwrdm = {
.name = "emu_pwrdm", .name = "emu_pwrdm",
.voltdm = { .name = "wakeup" },
.prcm_offs = OMAP4430_PRM_EMU_INST, .prcm_offs = OMAP4430_PRM_EMU_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON, .pwrsts = PWRSTS_OFF_ON,
...@@ -193,6 +202,7 @@ static struct powerdomain emu_44xx_pwrdm = { ...@@ -193,6 +202,7 @@ static struct powerdomain emu_44xx_pwrdm = {
/* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */ /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */
static struct powerdomain mpu_44xx_pwrdm = { static struct powerdomain mpu_44xx_pwrdm = {
.name = "mpu_pwrdm", .name = "mpu_pwrdm",
.voltdm = { .name = "mpu" },
.prcm_offs = OMAP4430_PRM_MPU_INST, .prcm_offs = OMAP4430_PRM_MPU_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_RET_ON, .pwrsts = PWRSTS_RET_ON,
...@@ -213,6 +223,7 @@ static struct powerdomain mpu_44xx_pwrdm = { ...@@ -213,6 +223,7 @@ static struct powerdomain mpu_44xx_pwrdm = {
/* ivahd_44xx_pwrdm: IVA-HD power domain */ /* ivahd_44xx_pwrdm: IVA-HD power domain */
static struct powerdomain ivahd_44xx_pwrdm = { static struct powerdomain ivahd_44xx_pwrdm = {
.name = "ivahd_pwrdm", .name = "ivahd_pwrdm",
.voltdm = { .name = "iva" },
.prcm_offs = OMAP4430_PRM_IVAHD_INST, .prcm_offs = OMAP4430_PRM_IVAHD_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_RET_ON, .pwrsts = PWRSTS_OFF_RET_ON,
...@@ -236,6 +247,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { ...@@ -236,6 +247,7 @@ static struct powerdomain ivahd_44xx_pwrdm = {
/* cam_44xx_pwrdm: Camera subsystem power domain */ /* cam_44xx_pwrdm: Camera subsystem power domain */
static struct powerdomain cam_44xx_pwrdm = { static struct powerdomain cam_44xx_pwrdm = {
.name = "cam_pwrdm", .name = "cam_pwrdm",
.voltdm = { .name = "core" },
.prcm_offs = OMAP4430_PRM_CAM_INST, .prcm_offs = OMAP4430_PRM_CAM_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON, .pwrsts = PWRSTS_OFF_ON,
...@@ -252,6 +264,7 @@ static struct powerdomain cam_44xx_pwrdm = { ...@@ -252,6 +264,7 @@ static struct powerdomain cam_44xx_pwrdm = {
/* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */
static struct powerdomain l3init_44xx_pwrdm = { static struct powerdomain l3init_44xx_pwrdm = {
.name = "l3init_pwrdm", .name = "l3init_pwrdm",
.voltdm = { .name = "core" },
.prcm_offs = OMAP4430_PRM_L3INIT_INST, .prcm_offs = OMAP4430_PRM_L3INIT_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_RET_ON, .pwrsts = PWRSTS_RET_ON,
...@@ -269,6 +282,7 @@ static struct powerdomain l3init_44xx_pwrdm = { ...@@ -269,6 +282,7 @@ static struct powerdomain l3init_44xx_pwrdm = {
/* l4per_44xx_pwrdm: Target peripherals power domain */ /* l4per_44xx_pwrdm: Target peripherals power domain */
static struct powerdomain l4per_44xx_pwrdm = { static struct powerdomain l4per_44xx_pwrdm = {
.name = "l4per_pwrdm", .name = "l4per_pwrdm",
.voltdm = { .name = "core" },
.prcm_offs = OMAP4430_PRM_L4PER_INST, .prcm_offs = OMAP4430_PRM_L4PER_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_RET_ON, .pwrsts = PWRSTS_RET_ON,
...@@ -291,6 +305,7 @@ static struct powerdomain l4per_44xx_pwrdm = { ...@@ -291,6 +305,7 @@ static struct powerdomain l4per_44xx_pwrdm = {
*/ */
static struct powerdomain always_on_core_44xx_pwrdm = { static struct powerdomain always_on_core_44xx_pwrdm = {
.name = "always_on_core_pwrdm", .name = "always_on_core_pwrdm",
.voltdm = { .name = "core" },
.prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_ON, .pwrsts = PWRSTS_ON,
...@@ -299,6 +314,7 @@ static struct powerdomain always_on_core_44xx_pwrdm = { ...@@ -299,6 +314,7 @@ static struct powerdomain always_on_core_44xx_pwrdm = {
/* cefuse_44xx_pwrdm: Customer efuse controller power domain */ /* cefuse_44xx_pwrdm: Customer efuse controller power domain */
static struct powerdomain cefuse_44xx_pwrdm = { static struct powerdomain cefuse_44xx_pwrdm = {
.name = "cefuse_pwrdm", .name = "cefuse_pwrdm",
.voltdm = { .name = "core" },
.prcm_offs = OMAP4430_PRM_CEFUSE_INST, .prcm_offs = OMAP4430_PRM_CEFUSE_INST,
.prcm_partition = OMAP4430_PRM_PARTITION, .prcm_partition = OMAP4430_PRM_PARTITION,
.pwrsts = PWRSTS_OFF_ON, .pwrsts = PWRSTS_OFF_ON,
......
...@@ -20,6 +20,8 @@ ...@@ -20,6 +20,8 @@
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/prcm.h> #include <plat/prcm.h>
#include "vp.h"
#include "prm2xxx_3xxx.h" #include "prm2xxx_3xxx.h"
#include "cm2xxx_3xxx.h" #include "cm2xxx_3xxx.h"
#include "prm-regbits-24xx.h" #include "prm-regbits-24xx.h"
...@@ -156,3 +158,57 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) ...@@ -156,3 +158,57 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
} }
/* PRM VP */
/*
* struct omap3_vp - OMAP3 VP register access description.
* @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
*/
struct omap3_vp {
u32 tranxdone_status;
};
static struct omap3_vp omap3_vp[] = {
[OMAP3_VP_VDD_MPU_ID] = {
.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
},
[OMAP3_VP_VDD_CORE_ID] = {
.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
},
};
#define MAX_VP_ID ARRAY_SIZE(omap3_vp);
u32 omap3_prm_vp_check_txdone(u8 vp_id)
{
struct omap3_vp *vp = &omap3_vp[vp_id];
u32 irqstatus;
irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
return irqstatus & vp->tranxdone_status;
}
void omap3_prm_vp_clear_txdone(u8 vp_id)
{
struct omap3_vp *vp = &omap3_vp[vp_id];
omap2_prm_write_mod_reg(vp->tranxdone_status,
OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
}
u32 omap3_prm_vcvp_read(u8 offset)
{
return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset);
}
void omap3_prm_vcvp_write(u32 val, u8 offset)
{
omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset);
}
u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
{
return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
}
...@@ -303,7 +303,19 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); ...@@ -303,7 +303,19 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
/* OMAP3-specific VP functions */
u32 omap3_prm_vp_check_txdone(u8 vp_id);
void omap3_prm_vp_clear_txdone(u8 vp_id);
/*
* OMAP3 access functions for voltage controller (VC) and
* voltage proccessor (VP) in the PRM.
*/
extern u32 omap3_prm_vcvp_read(u8 offset);
extern void omap3_prm_vcvp_write(u32 val, u8 offset);
extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
#endif /* CONFIG_ARCH_OMAP4 */ #endif /* CONFIG_ARCH_OMAP4 */
#endif #endif
/* /*
......
...@@ -21,8 +21,11 @@ ...@@ -21,8 +21,11 @@
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/prcm.h> #include <plat/prcm.h>
#include "vp.h"
#include "prm44xx.h" #include "prm44xx.h"
#include "prm-regbits-44xx.h" #include "prm-regbits-44xx.h"
#include "prcm44xx.h"
#include "prminst44xx.h"
/* PRM low-level functions */ /* PRM low-level functions */
...@@ -50,3 +53,71 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) ...@@ -50,3 +53,71 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
return v; return v;
} }
/* PRM VP */
/*
* struct omap4_vp - OMAP4 VP register access description.
* @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
* @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
*/
struct omap4_vp {
u32 irqstatus_mpu;
u32 tranxdone_status;
};
static struct omap4_vp omap4_vp[] = {
[OMAP4_VP_VDD_MPU_ID] = {
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
.tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
},
[OMAP4_VP_VDD_IVA_ID] = {
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
.tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
},
[OMAP4_VP_VDD_CORE_ID] = {
.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
.tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
},
};
u32 omap4_prm_vp_check_txdone(u8 vp_id)
{
struct omap4_vp *vp = &omap4_vp[vp_id];
u32 irqstatus;
irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
OMAP4430_PRM_OCP_SOCKET_INST,
vp->irqstatus_mpu);
return irqstatus & vp->tranxdone_status;
}
void omap4_prm_vp_clear_txdone(u8 vp_id)
{
struct omap4_vp *vp = &omap4_vp[vp_id];
omap4_prminst_write_inst_reg(vp->tranxdone_status,
OMAP4430_PRM_PARTITION,
OMAP4430_PRM_OCP_SOCKET_INST,
vp->irqstatus_mpu);
};
u32 omap4_prm_vcvp_read(u8 offset)
{
return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
OMAP4430_PRM_DEVICE_INST, offset);
}
void omap4_prm_vcvp_write(u32 val, u8 offset)
{
omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION,
OMAP4430_PRM_DEVICE_INST, offset);
}
u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
{
return omap4_prminst_rmw_inst_reg_bits(mask, bits,
OMAP4430_PRM_PARTITION,
OMAP4430_PRM_DEVICE_INST,
offset);
}
...@@ -751,6 +751,18 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); ...@@ -751,6 +751,18 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
/* OMAP4-specific VP functions */
u32 omap4_prm_vp_check_txdone(u8 vp_id);
void omap4_prm_vp_clear_txdone(u8 vp_id);
/*
* OMAP4 access functions for voltage controller (VC) and
* voltage proccessor (VP) in the PRM.
*/
extern u32 omap4_prm_vcvp_read(u8 offset);
extern void omap4_prm_vcvp_write(u32 val, u8 offset);
extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
# endif # endif
#endif #endif
...@@ -15,7 +15,7 @@ ...@@ -15,7 +15,7 @@
static int sr_class3_enable(struct voltagedomain *voltdm) static int sr_class3_enable(struct voltagedomain *voltdm)
{ {
unsigned long volt = omap_voltage_get_nom_volt(voltdm); unsigned long volt = voltdm_get_voltage(voltdm);
if (!volt) { if (!volt) {
pr_warning("%s: Curr voltage unknown. Cannot enable sr_%s\n", pr_warning("%s: Curr voltage unknown. Cannot enable sr_%s\n",
...@@ -32,7 +32,7 @@ static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset) ...@@ -32,7 +32,7 @@ static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset)
omap_vp_disable(voltdm); omap_vp_disable(voltdm);
sr_disable(voltdm); sr_disable(voltdm);
if (is_volt_reset) if (is_volt_reset)
omap_voltage_reset(voltdm); voltdm_reset(voltdm);
return 0; return 0;
} }
......
...@@ -62,6 +62,7 @@ static LIST_HEAD(sr_list); ...@@ -62,6 +62,7 @@ static LIST_HEAD(sr_list);
static struct omap_sr_class_data *sr_class; static struct omap_sr_class_data *sr_class;
static struct omap_sr_pmic_data *sr_pmic_data; static struct omap_sr_pmic_data *sr_pmic_data;
static struct dentry *sr_dbg_dir;
static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
{ {
...@@ -826,9 +827,10 @@ static int __init omap_sr_probe(struct platform_device *pdev) ...@@ -826,9 +827,10 @@ static int __init omap_sr_probe(struct platform_device *pdev)
struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
struct omap_sr_data *pdata = pdev->dev.platform_data; struct omap_sr_data *pdata = pdev->dev.platform_data;
struct resource *mem, *irq; struct resource *mem, *irq;
struct dentry *vdd_dbg_dir, *nvalue_dir; struct dentry *nvalue_dir;
struct omap_volt_data *volt_data; struct omap_volt_data *volt_data;
int i, ret = 0; int i, ret = 0;
char *name;
if (!sr_info) { if (!sr_info) {
dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
...@@ -899,18 +901,25 @@ static int __init omap_sr_probe(struct platform_device *pdev) ...@@ -899,18 +901,25 @@ static int __init omap_sr_probe(struct platform_device *pdev)
} }
dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
if (!sr_dbg_dir) {
sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
if (!sr_dbg_dir) {
ret = PTR_ERR(sr_dbg_dir);
pr_err("%s:sr debugfs dir creation failed(%d)\n",
__func__, ret);
goto err_iounmap;
}
}
/* name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
* If the voltage domain debugfs directory is not created, do if (!name) {
* not try to create rest of the debugfs entries. dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n",
*/ __func__);
vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); ret = -ENOMEM;
if (!vdd_dbg_dir) {
ret = -EINVAL;
goto err_iounmap; goto err_iounmap;
} }
sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); kfree(name);
if (IS_ERR(sr_info->dbg_dir)) { if (IS_ERR(sr_info->dbg_dir)) {
dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
__func__); __func__);
......
...@@ -102,7 +102,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) ...@@ -102,7 +102,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
sr_data->senn_mod = 0x1; sr_data->senn_mod = 0x1;
sr_data->senp_mod = 0x1; sr_data->senp_mod = 0x1;
sr_data->voltdm = omap_voltage_domain_lookup(oh->vdd_name); sr_data->voltdm = voltdm_lookup(oh->vdd_name);
if (IS_ERR(sr_data->voltdm)) { if (IS_ERR(sr_data->voltdm)) {
pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
__func__, oh->vdd_name); __func__, oh->vdd_name);
......
This diff is collapsed.
...@@ -19,12 +19,12 @@ ...@@ -19,12 +19,12 @@
#include <linux/kernel.h> #include <linux/kernel.h>
struct voltagedomain;
/** /**
* struct omap_vc_common_data - per-VC register/bitfield data * struct omap_vc_common - per-VC register/bitfield data
* @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
* @valid: VALID bitmask in PRM_VC_BYPASS_VAL register * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
* @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
* @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
* @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
* @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
* @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
...@@ -33,15 +33,16 @@ ...@@ -33,15 +33,16 @@
* @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
* @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
* @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
* @i2c_cfg_reg: I2C configuration register offset
* @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
* @i2c_mcode_mask: MCODE field mask for I2C config register
* *
* XXX One of cmd_on_mask and cmd_on_shift are not needed * XXX One of cmd_on_mask and cmd_on_shift are not needed
* XXX VALID should probably be a shift, not a mask * XXX VALID should probably be a shift, not a mask
*/ */
struct omap_vc_common_data { struct omap_vc_common {
u32 cmd_on_mask; u32 cmd_on_mask;
u32 valid; u32 valid;
u8 smps_sa_reg;
u8 smps_volra_reg;
u8 bypass_val_reg; u8 bypass_val_reg;
u8 data_shift; u8 data_shift;
u8 slaveaddr_shift; u8 slaveaddr_shift;
...@@ -50,34 +51,75 @@ struct omap_vc_common_data { ...@@ -50,34 +51,75 @@ struct omap_vc_common_data {
u8 cmd_onlp_shift; u8 cmd_onlp_shift;
u8 cmd_ret_shift; u8 cmd_ret_shift;
u8 cmd_off_shift; u8 cmd_off_shift;
u8 i2c_cfg_reg;
u8 i2c_cfg_hsen_mask;
u8 i2c_mcode_mask;
}; };
/* omap_vc_channel.flags values */
#define OMAP_VC_CHANNEL_DEFAULT BIT(0)
#define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1)
/** /**
* struct omap_vc_instance_data - VC per-instance data * struct omap_vc_channel - VC per-instance data
* @vc_common: pointer to VC common data for this platform * @i2c_slave_addr: I2C slave address of PMIC for this VC channel
* @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register * @volt_reg_addr: voltage configuration register address
* @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register * @cmd_reg_addr: command configuration register address
* @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register * @setup_time: setup time (in sys_clk cycles) of regulator for this channel
* @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register * @cfg_channel: current value of VC channel configuration register
* @i2c_high_speed: whether or not to use I2C high-speed mode
* *
* XXX It is not necessary to have both a *_mask and a *_shift - * @common: pointer to VC common data for this platform
* remove one * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
* @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
* @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register
* @cmdval_reg: register for on/ret/off voltage level values for this channel
* @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
* @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
* @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start
* @cfg_channel_reg: VC channel configuration register
* @cfg_channel_sa_shift: bit shift for slave address cfg_channel register
* @flags: VC channel-specific flags (optional)
*/ */
struct omap_vc_instance_data { struct omap_vc_channel {
const struct omap_vc_common_data *vc_common; /* channel state */
u16 i2c_slave_addr;
u16 volt_reg_addr;
u16 cmd_reg_addr;
u16 setup_time;
u8 cfg_channel;
bool i2c_high_speed;
/* register access data */
const struct omap_vc_common *common;
u32 smps_sa_mask; u32 smps_sa_mask;
u32 smps_volra_mask; u32 smps_volra_mask;
u32 smps_cmdra_mask;
u8 cmdval_reg; u8 cmdval_reg;
u8 smps_sa_shift; u8 smps_sa_reg;
u8 smps_volra_shift; u8 smps_volra_reg;
u8 smps_cmdra_reg;
u8 cfg_channel_reg;
u8 cfg_channel_sa_shift;
u8 flags;
}; };
extern struct omap_vc_instance_data omap3_vc1_data; extern struct omap_vc_channel omap3_vc_mpu;
extern struct omap_vc_instance_data omap3_vc2_data; extern struct omap_vc_channel omap3_vc_core;
extern struct omap_vc_channel omap4_vc_mpu;
extern struct omap_vc_channel omap4_vc_iva;
extern struct omap_vc_channel omap4_vc_core;
extern struct omap_vc_instance_data omap4_vc_mpu_data; void omap_vc_init_channel(struct voltagedomain *voltdm);
extern struct omap_vc_instance_data omap4_vc_iva_data; int omap_vc_pre_scale(struct voltagedomain *voltdm,
extern struct omap_vc_instance_data omap4_vc_core_data; unsigned long target_volt,
u8 *target_vsel, u8 *current_vsel);
void omap_vc_post_scale(struct voltagedomain *voltdm,
unsigned long target_volt,
u8 target_vsel, u8 current_vsel);
int omap_vc_bypass_scale(struct voltagedomain *voltdm,
unsigned long target_volt);
#endif #endif
...@@ -29,9 +29,7 @@ ...@@ -29,9 +29,7 @@
* VC data common to 34xx/36xx chips * VC data common to 34xx/36xx chips
* XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
*/ */
static struct omap_vc_common_data omap3_vc_common = { static struct omap_vc_common omap3_vc_common = {
.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
.data_shift = OMAP3430_DATA_SHIFT, .data_shift = OMAP3430_DATA_SHIFT,
.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
...@@ -42,22 +40,33 @@ static struct omap_vc_common_data omap3_vc_common = { ...@@ -42,22 +40,33 @@ static struct omap_vc_common_data omap3_vc_common = {
.cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT,
.cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT,
.cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT,
.i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK,
.i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET,
.i2c_mcode_mask = OMAP3430_MCODE_MASK,
}; };
struct omap_vc_instance_data omap3_vc1_data = { struct omap_vc_channel omap3_vc_mpu = {
.vc_common = &omap3_vc_common, .common = &omap3_vc_common,
.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
.smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
.cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT,
.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
.smps_volra_shift = OMAP3430_VOLRA0_SHIFT,
.smps_volra_mask = OMAP3430_VOLRA0_MASK, .smps_volra_mask = OMAP3430_VOLRA0_MASK,
.smps_cmdra_mask = OMAP3430_CMDRA0_MASK,
.cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT,
}; };
struct omap_vc_instance_data omap3_vc2_data = { struct omap_vc_channel omap3_vc_core = {
.vc_common = &omap3_vc_common, .common = &omap3_vc_common,
.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
.smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
.cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT,
.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
.smps_volra_shift = OMAP3430_VOLRA1_SHIFT,
.smps_volra_mask = OMAP3430_VOLRA1_MASK, .smps_volra_mask = OMAP3430_VOLRA1_MASK,
.smps_cmdra_mask = OMAP3430_CMDRA1_MASK,
.cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT,
}; };
...@@ -30,9 +30,7 @@ ...@@ -30,9 +30,7 @@
* VC data common to 44xx chips * VC data common to 44xx chips
* XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
*/ */
static const struct omap_vc_common_data omap4_vc_common = { static const struct omap_vc_common omap4_vc_common = {
.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,
.data_shift = OMAP4430_DATA_SHIFT, .data_shift = OMAP4430_DATA_SHIFT,
.slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT, .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT,
...@@ -43,33 +41,49 @@ static const struct omap_vc_common_data omap4_vc_common = { ...@@ -43,33 +41,49 @@ static const struct omap_vc_common_data omap4_vc_common = {
.cmd_onlp_shift = OMAP4430_ONLP_SHIFT, .cmd_onlp_shift = OMAP4430_ONLP_SHIFT,
.cmd_ret_shift = OMAP4430_RET_SHIFT, .cmd_ret_shift = OMAP4430_RET_SHIFT,
.cmd_off_shift = OMAP4430_OFF_SHIFT, .cmd_off_shift = OMAP4430_OFF_SHIFT,
.i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET,
.i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK,
.i2c_mcode_mask = OMAP4430_HSMCODE_MASK,
}; };
/* VC instance data for each controllable voltage line */ /* VC instance data for each controllable voltage line */
struct omap_vc_instance_data omap4_vc_mpu_data = { struct omap_vc_channel omap4_vc_mpu = {
.vc_common = &omap4_vc_common, .flags = OMAP_VC_CHANNEL_DEFAULT | OMAP_VC_CHANNEL_CFG_MUTANT,
.common = &omap4_vc_common,
.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
.smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET,
.cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET,
.smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT,
.smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK,
.smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT,
.smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK,
.smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK,
.cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT,
}; };
struct omap_vc_instance_data omap4_vc_iva_data = { struct omap_vc_channel omap4_vc_iva = {
.vc_common = &omap4_vc_common, .common = &omap4_vc_common,
.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
.smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET,
.cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET,
.smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT,
.smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK,
.smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT,
.smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK,
.smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK,
.cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT,
}; };
struct omap_vc_instance_data omap4_vc_core_data = { struct omap_vc_channel omap4_vc_core = {
.vc_common = &omap4_vc_common, .common = &omap4_vc_common,
.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
.smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET,
.cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET,
.smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT,
.smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK,
.smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT,
.smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK,
.smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK,
.cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT,
}; };
This diff is collapsed.
...@@ -19,6 +19,8 @@ ...@@ -19,6 +19,8 @@
#include "vc.h" #include "vc.h"
#include "vp.h" #include "vp.h"
struct powerdomain;
/* XXX document */ /* XXX document */
#define VOLTSCALE_VPFORCEUPDATE 1 #define VOLTSCALE_VPFORCEUPDATE 1
#define VOLTSCALE_VCBYPASS 2 #define VOLTSCALE_VCBYPASS 2
...@@ -32,29 +34,60 @@ ...@@ -32,29 +34,60 @@
#define OMAP3_VOLTSETUP2 0xff #define OMAP3_VOLTSETUP2 0xff
/** /**
* struct omap_vfsm_instance_data - per-voltage manager FSM register/bitfield * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield
* data * data
* @voltsetup_mask: SETUP_TIME* bitmask in the PRM_VOLTSETUP* register * @voltsetup_mask: SETUP_TIME* bitmask in the PRM_VOLTSETUP* register
* @voltsetup_reg: register offset of PRM_VOLTSETUP from PRM base * @voltsetup_reg: register offset of PRM_VOLTSETUP from PRM base
* @voltsetup_shift: SETUP_TIME* field shift in the PRM_VOLTSETUP* register
* *
* XXX What about VOLTOFFSET/VOLTCTRL? * XXX What about VOLTOFFSET/VOLTCTRL?
* XXX It is not necessary to have both a _mask and a _shift for the same
* bitfield - remove one!
*/ */
struct omap_vfsm_instance_data { struct omap_vfsm_instance {
u32 voltsetup_mask; u32 voltsetup_mask;
u8 voltsetup_reg; u8 voltsetup_reg;
u8 voltsetup_shift;
}; };
/** /**
* struct voltagedomain - omap voltage domain global structure. * struct voltagedomain - omap voltage domain global structure.
* @name: Name of the voltage domain which can be used as a unique * @name: Name of the voltage domain which can be used as a unique identifier.
* identifier. * @scalable: Whether or not this voltage domain is scalable
* @node: list_head linking all voltage domains
* @pwrdm_list: list_head linking all powerdomains in this voltagedomain
* @vc: pointer to VC channel associated with this voltagedomain
* @vp: pointer to VP associated with this voltagedomain
* @read: read a VC/VP register
* @write: write a VC/VP register
* @read: read-modify-write a VC/VP register
* @sys_clk: system clock name/frequency, used for various timing calculations
* @scale: function used to scale the voltage of the voltagedomain
* @nominal_volt: current nominal voltage for this voltage domain
* @volt_data: voltage table having the distinct voltages supported
* by the domain and other associated per voltage data.
*/ */
struct voltagedomain { struct voltagedomain {
char *name; char *name;
bool scalable;
struct list_head node;
struct list_head pwrdm_list;
struct omap_vc_channel *vc;
const struct omap_vfsm_instance *vfsm;
struct omap_vp_instance *vp;
struct omap_voltdm_pmic *pmic;
/* VC/VP register access functions: SoC specific */
u32 (*read) (u8 offset);
void (*write) (u32 val, u8 offset);
u32 (*rmw)(u32 mask, u32 bits, u8 offset);
union {
const char *name;
u32 rate;
} sys_clk;
int (*scale) (struct voltagedomain *voltdm,
unsigned long target_volt);
u32 nominal_volt;
struct omap_volt_data *volt_data;
}; };
/** /**
...@@ -77,13 +110,18 @@ struct omap_volt_data { ...@@ -77,13 +110,18 @@ struct omap_volt_data {
}; };
/** /**
* struct omap_volt_pmic_info - PMIC specific data required by voltage driver. * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
* @slew_rate: PMIC slew rate (in uv/us) * @slew_rate: PMIC slew rate (in uv/us)
* @step_size: PMIC voltage step size (in uv) * @step_size: PMIC voltage step size (in uv)
* @i2c_slave_addr: I2C slave address of PMIC
* @volt_reg_addr: voltage configuration register address
* @cmd_reg_addr: command (on, on-LP, ret, off) configuration register address
* @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC
* @i2c_mcode: master code value for I2C high-speed preamble transmission
* @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV.
* @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value.
*/ */
struct omap_volt_pmic_info { struct omap_voltdm_pmic {
int slew_rate; int slew_rate;
int step_size; int step_size;
u32 on_volt; u32 on_volt;
...@@ -91,81 +129,34 @@ struct omap_volt_pmic_info { ...@@ -91,81 +129,34 @@ struct omap_volt_pmic_info {
u32 ret_volt; u32 ret_volt;
u32 off_volt; u32 off_volt;
u16 volt_setup_time; u16 volt_setup_time;
u16 i2c_slave_addr;
u16 volt_reg_addr;
u16 cmd_reg_addr;
u8 vp_erroroffset; u8 vp_erroroffset;
u8 vp_vstepmin; u8 vp_vstepmin;
u8 vp_vstepmax; u8 vp_vstepmax;
u8 vp_vddmin; u8 vp_vddmin;
u8 vp_vddmax; u8 vp_vddmax;
u8 vp_timeout_us; u8 vp_timeout_us;
u8 i2c_slave_addr; bool i2c_high_speed;
u8 pmic_reg; u8 i2c_mcode;
unsigned long (*vsel_to_uv) (const u8 vsel); unsigned long (*vsel_to_uv) (const u8 vsel);
u8 (*uv_to_vsel) (unsigned long uV); u8 (*uv_to_vsel) (unsigned long uV);
}; };
/**
* omap_vdd_info - Per Voltage Domain info
*
* @volt_data : voltage table having the distinct voltages supported
* by the domain and other associated per voltage data.
* @pmic_info : pmic specific parameters which should be populted by
* the pmic drivers.
* @vp_data : the register values, shifts, masks for various
* vp registers
* @vp_rt_data : VP data derived at runtime, not predefined
* @vc_data : structure containing various various vc registers,
* shifts, masks etc.
* @vfsm : voltage manager FSM data
* @voltdm : pointer to the voltage domain structure
* @debug_dir : debug directory for this voltage domain.
* @curr_volt : current voltage for this vdd.
* @vp_enabled : flag to keep track of whether vp is enabled or not
* @volt_scale : API to scale the voltage of the vdd.
*/
struct omap_vdd_info {
struct omap_volt_data *volt_data;
struct omap_volt_pmic_info *pmic_info;
struct omap_vp_instance_data *vp_data;
struct omap_vp_runtime_data vp_rt_data;
struct omap_vc_instance_data *vc_data;
const struct omap_vfsm_instance_data *vfsm;
struct voltagedomain voltdm;
struct dentry *debug_dir;
u32 curr_volt;
bool vp_enabled;
u32 (*read_reg) (u16 mod, u8 offset);
void (*write_reg) (u32 val, u16 mod, u8 offset);
int (*volt_scale) (struct omap_vdd_info *vdd,
unsigned long target_volt);
};
unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm);
void omap_vp_enable(struct voltagedomain *voltdm);
void omap_vp_disable(struct voltagedomain *voltdm);
int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
unsigned long target_volt);
void omap_voltage_reset(struct voltagedomain *voltdm);
void omap_voltage_get_volttable(struct voltagedomain *voltdm, void omap_voltage_get_volttable(struct voltagedomain *voltdm,
struct omap_volt_data **volt_data); struct omap_volt_data **volt_data);
struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
unsigned long volt); unsigned long volt);
unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm);
struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm);
int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_mod,
struct omap_vdd_info *omap_vdd_array[],
u8 omap_vdd_count);
#ifdef CONFIG_PM #ifdef CONFIG_PM
int omap_voltage_register_pmic(struct voltagedomain *voltdm, int omap_voltage_register_pmic(struct voltagedomain *voltdm,
struct omap_volt_pmic_info *pmic_info); struct omap_voltdm_pmic *pmic);
void omap_change_voltscale_method(struct voltagedomain *voltdm, void omap_change_voltscale_method(struct voltagedomain *voltdm,
int voltscale_method); int voltscale_method);
/* API to get the voltagedomain pointer */
struct voltagedomain *omap_voltage_domain_lookup(char *name);
int omap_voltage_late_init(void); int omap_voltage_late_init(void);
#else #else
static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm,
struct omap_volt_pmic_info *pmic_info) struct omap_voltdm_pmic *pmic)
{ {
return -EINVAL; return -EINVAL;
} }
...@@ -175,10 +166,21 @@ static inline int omap_voltage_late_init(void) ...@@ -175,10 +166,21 @@ static inline int omap_voltage_late_init(void)
{ {
return -EINVAL; return -EINVAL;
} }
static inline struct voltagedomain *omap_voltage_domain_lookup(char *name)
{
return ERR_PTR(-EINVAL);
}
#endif #endif
extern void omap2xxx_voltagedomains_init(void);
extern void omap3xxx_voltagedomains_init(void);
extern void omap44xx_voltagedomains_init(void);
struct voltagedomain *voltdm_lookup(const char *name);
void voltdm_init(struct voltagedomain **voltdm_list);
int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm);
int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user),
void *user);
int voltdm_for_each_pwrdm(struct voltagedomain *voltdm,
int (*fn)(struct voltagedomain *voltdm,
struct powerdomain *pwrdm));
int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt);
void voltdm_reset(struct voltagedomain *voltdm);
unsigned long voltdm_get_voltage(struct voltagedomain *voltdm);
#endif #endif
/*
* OMAP3 voltage domain data
*
* Copyright (C) 2011 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include "voltage.h"
static struct voltagedomain omap2_voltdm_core = {
.name = "core",
};
static struct voltagedomain omap2_voltdm_wkup = {
.name = "wakeup",
};
static struct voltagedomain *voltagedomains_omap2[] __initdata = {
&omap2_voltdm_core,
&omap2_voltdm_wkup,
NULL,
};
void __init omap2xxx_voltagedomains_init(void)
{
voltdm_init(voltagedomains_omap2);
}
...@@ -31,65 +31,70 @@ ...@@ -31,65 +31,70 @@
* VDD data * VDD data
*/ */
static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { static const struct omap_vfsm_instance omap3_vdd1_vfsm = {
.voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET,
.voltsetup_shift = OMAP3430_SETUP_TIME1_SHIFT,
.voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK,
}; };
static struct omap_vdd_info omap3_vdd1_info = { static const struct omap_vfsm_instance omap3_vdd2_vfsm = {
.vp_data = &omap3_vp1_data,
.vc_data = &omap3_vc1_data,
.vfsm = &omap3_vdd1_vfsm_data,
.voltdm = {
.name = "mpu",
},
};
static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = {
.voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET,
.voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT,
.voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK,
}; };
static struct omap_vdd_info omap3_vdd2_info = { static struct voltagedomain omap3_voltdm_mpu = {
.vp_data = &omap3_vp2_data, .name = "mpu_iva",
.vc_data = &omap3_vc2_data, .scalable = true,
.vfsm = &omap3_vdd2_vfsm_data, .read = omap3_prm_vcvp_read,
.voltdm = { .write = omap3_prm_vcvp_write,
.name = "core", .rmw = omap3_prm_vcvp_rmw,
}, .vc = &omap3_vc_mpu,
.vfsm = &omap3_vdd1_vfsm,
.vp = &omap3_vp_mpu,
}; };
/* OMAP3 VDD structures */ static struct voltagedomain omap3_voltdm_core = {
static struct omap_vdd_info *omap3_vdd_info[] = { .name = "core",
&omap3_vdd1_info, .scalable = true,
&omap3_vdd2_info, .read = omap3_prm_vcvp_read,
.write = omap3_prm_vcvp_write,
.rmw = omap3_prm_vcvp_rmw,
.vc = &omap3_vc_core,
.vfsm = &omap3_vdd2_vfsm,
.vp = &omap3_vp_core,
}; };
/* OMAP3 specific voltage init functions */ static struct voltagedomain omap3_voltdm_wkup = {
static int __init omap3xxx_voltage_early_init(void) .name = "wakeup",
{ };
s16 prm_mod = OMAP3430_GR_MOD;
s16 prm_irqst_ocp_mod = OCP_MOD;
if (!cpu_is_omap34xx()) static struct voltagedomain *voltagedomains_omap3[] __initdata = {
return 0; &omap3_voltdm_mpu,
&omap3_voltdm_core,
&omap3_voltdm_wkup,
NULL,
};
static const char *sys_clk_name __initdata = "sys_ck";
void __init omap3xxx_voltagedomains_init(void)
{
struct voltagedomain *voltdm;
int i;
/* /*
* XXX Will depend on the process, validation, and binning * XXX Will depend on the process, validation, and binning
* for the currently-running IC * for the currently-running IC
*/ */
if (cpu_is_omap3630()) { if (cpu_is_omap3630()) {
omap3_vdd1_info.volt_data = omap36xx_vddmpu_volt_data; omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
omap3_vdd2_info.volt_data = omap36xx_vddcore_volt_data; omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
} else { } else {
omap3_vdd1_info.volt_data = omap34xx_vddmpu_volt_data; omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
} }
return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++)
omap3_vdd_info, voltdm->sys_clk.name = sys_clk_name;
ARRAY_SIZE(omap3_vdd_info));
voltdm_init(voltagedomains_omap3);
}; };
core_initcall(omap3xxx_voltage_early_init);
...@@ -32,71 +32,80 @@ ...@@ -32,71 +32,80 @@
#include "vc.h" #include "vc.h"
#include "vp.h" #include "vp.h"
static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = {
.voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET,
}; };
static struct omap_vdd_info omap4_vdd_mpu_info = { static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = {
.vp_data = &omap4_vp_mpu_data, .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET,
.vc_data = &omap4_vc_mpu_data,
.vfsm = &omap4_vdd_mpu_vfsm_data,
.voltdm = {
.name = "mpu",
},
}; };
static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { static const struct omap_vfsm_instance omap4_vdd_core_vfsm = {
.voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET,
}; };
static struct omap_vdd_info omap4_vdd_iva_info = { static struct voltagedomain omap4_voltdm_mpu = {
.vp_data = &omap4_vp_iva_data, .name = "mpu",
.vc_data = &omap4_vc_iva_data, .scalable = true,
.vfsm = &omap4_vdd_iva_vfsm_data, .read = omap4_prm_vcvp_read,
.voltdm = { .write = omap4_prm_vcvp_write,
.name = "iva", .rmw = omap4_prm_vcvp_rmw,
}, .vc = &omap4_vc_mpu,
.vfsm = &omap4_vdd_mpu_vfsm,
.vp = &omap4_vp_mpu,
}; };
static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { static struct voltagedomain omap4_voltdm_iva = {
.voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, .name = "iva",
.scalable = true,
.read = omap4_prm_vcvp_read,
.write = omap4_prm_vcvp_write,
.rmw = omap4_prm_vcvp_rmw,
.vc = &omap4_vc_iva,
.vfsm = &omap4_vdd_iva_vfsm,
.vp = &omap4_vp_iva,
}; };
static struct omap_vdd_info omap4_vdd_core_info = { static struct voltagedomain omap4_voltdm_core = {
.vp_data = &omap4_vp_core_data, .name = "core",
.vc_data = &omap4_vc_core_data, .scalable = true,
.vfsm = &omap4_vdd_core_vfsm_data, .read = omap4_prm_vcvp_read,
.voltdm = { .write = omap4_prm_vcvp_write,
.name = "core", .rmw = omap4_prm_vcvp_rmw,
}, .vc = &omap4_vc_core,
.vfsm = &omap4_vdd_core_vfsm,
.vp = &omap4_vp_core,
}; };
/* OMAP4 VDD structures */ static struct voltagedomain omap4_voltdm_wkup = {
static struct omap_vdd_info *omap4_vdd_info[] = { .name = "wakeup",
&omap4_vdd_mpu_info,
&omap4_vdd_iva_info,
&omap4_vdd_core_info,
}; };
/* OMAP4 specific voltage init functions */ static struct voltagedomain *voltagedomains_omap4[] __initdata = {
static int __init omap44xx_voltage_early_init(void) &omap4_voltdm_mpu,
{ &omap4_voltdm_iva,
s16 prm_mod = OMAP4430_PRM_DEVICE_INST; &omap4_voltdm_core,
s16 prm_irqst_ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST; &omap4_voltdm_wkup,
NULL,
};
static const char *sys_clk_name __initdata = "sys_clkin_ck";
if (!cpu_is_omap44xx()) void __init omap44xx_voltagedomains_init(void)
return 0; {
struct voltagedomain *voltdm;
int i;
/* /*
* XXX Will depend on the process, validation, and binning * XXX Will depend on the process, validation, and binning
* for the currently-running IC * for the currently-running IC
*/ */
omap4_vdd_mpu_info.volt_data = omap44xx_vdd_mpu_volt_data; omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data;
omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data;
omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data;
for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++)
voltdm->sys_clk.name = sys_clk_name;
return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, voltdm_init(voltagedomains_omap4);
omap4_vdd_info,
ARRAY_SIZE(omap4_vdd_info));
}; };
core_initcall(omap44xx_voltage_early_init);
#include <linux/kernel.h>
#include <linux/init.h>
#include <plat/common.h>
#include "voltage.h"
#include "vp.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"
#include "prm44xx.h"
static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
{
struct omap_vp_instance *vp = voltdm->vp;
u32 vpconfig;
char vsel;
vsel = voltdm->pmic->uv_to_vsel(volt);
vpconfig = voltdm->read(vp->vpconfig);
vpconfig &= ~(vp->common->vpconfig_initvoltage_mask |
vp->common->vpconfig_forceupdate |
vp->common->vpconfig_initvdd);
vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
voltdm->write(vpconfig, vp->vpconfig);
/* Trigger initVDD value copy to voltage processor */
voltdm->write((vpconfig | vp->common->vpconfig_initvdd),
vp->vpconfig);
/* Clear initVDD copy trigger bit */
voltdm->write(vpconfig, vp->vpconfig);
return vpconfig;
}
/* Generic voltage init functions */
void __init omap_vp_init(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp = voltdm->vp;
u32 val, sys_clk_rate, timeout, waittime;
u32 vddmin, vddmax, vstepmin, vstepmax;
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
__func__, voltdm->name);
return;
}
vp->enabled = false;
/* Divide to avoid overflow */
sys_clk_rate = voltdm->sys_clk.rate / 1000;
timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
vddmin = voltdm->pmic->vp_vddmin;
vddmax = voltdm->pmic->vp_vddmax;
waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
sys_clk_rate) / 1000;
vstepmin = voltdm->pmic->vp_vstepmin;
vstepmax = voltdm->pmic->vp_vstepmax;
/*
* VP_CONFIG: error gain is not set here, it will be updated
* on each scale, based on OPP.
*/
val = (voltdm->pmic->vp_erroroffset <<
__ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) |
vp->common->vpconfig_timeouten;
voltdm->write(val, vp->vpconfig);
/* VSTEPMIN */
val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) |
(vstepmin << vp->common->vstepmin_stepmin_shift);
voltdm->write(val, vp->vstepmin);
/* VSTEPMAX */
val = (vstepmax << vp->common->vstepmax_stepmax_shift) |
(waittime << vp->common->vstepmax_smpswaittimemax_shift);
voltdm->write(val, vp->vstepmax);
/* VLIMITTO */
val = (vddmax << vp->common->vlimitto_vddmax_shift) |
(vddmin << vp->common->vlimitto_vddmin_shift) |
(timeout << vp->common->vlimitto_timeout_shift);
voltdm->write(val, vp->vlimitto);
}
int omap_vp_update_errorgain(struct voltagedomain *voltdm,
unsigned long target_volt)
{
struct omap_volt_data *volt_data;
if (!voltdm->vp)
return -EINVAL;
/* Get volt_data corresponding to target_volt */
volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
if (IS_ERR(volt_data))
return -EINVAL;
/* Setting vp errorgain based on the voltage */
voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
volt_data->vp_errgain <<
__ffs(voltdm->vp->common->vpconfig_errorgain_mask),
voltdm->vp->vpconfig);
return 0;
}
/* VP force update method of voltage scaling */
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
unsigned long target_volt)
{
struct omap_vp_instance *vp = voltdm->vp;
u32 vpconfig;
u8 target_vsel, current_vsel;
int ret, timeout = 0;
ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
if (ret)
return ret;
/*
* Clear all pending TransactionDone interrupt/status. Typical latency
* is <3us
*/
while (timeout++ < VP_TRANXDONE_TIMEOUT) {
vp->common->ops->clear_txdone(vp->id);
if (!vp->common->ops->check_txdone(vp->id))
break;
udelay(1);
}
if (timeout >= VP_TRANXDONE_TIMEOUT) {
pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
"Voltage change aborted", __func__, voltdm->name);
return -ETIMEDOUT;
}
vpconfig = _vp_set_init_voltage(voltdm, target_volt);
/* Force update of voltage */
voltdm->write(vpconfig | vp->common->vpconfig_forceupdate,
voltdm->vp->vpconfig);
/*
* Wait for TransactionDone. Typical latency is <200us.
* Depends on SMPSWAITTIMEMIN/MAX and voltage change
*/
timeout = 0;
omap_test_timeout(vp->common->ops->check_txdone(vp->id),
VP_TRANXDONE_TIMEOUT, timeout);
if (timeout >= VP_TRANXDONE_TIMEOUT)
pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
"TRANXDONE never got set after the voltage update\n",
__func__, voltdm->name);
omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
/*
* Disable TransactionDone interrupt , clear all status, clear
* control registers
*/
timeout = 0;
while (timeout++ < VP_TRANXDONE_TIMEOUT) {
vp->common->ops->clear_txdone(vp->id);
if (!vp->common->ops->check_txdone(vp->id))
break;
udelay(1);
}
if (timeout >= VP_TRANXDONE_TIMEOUT)
pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
"to clear the TRANXDONE status\n",
__func__, voltdm->name);
/* Clear force bit */
voltdm->write(vpconfig, vp->vpconfig);
return 0;
}
/**
* omap_vp_enable() - API to enable a particular VP
* @voltdm: pointer to the VDD whose VP is to be enabled.
*
* This API enables a particular voltage processor. Needed by the smartreflex
* class drivers.
*/
void omap_vp_enable(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp;
u32 vpconfig, volt;
if (!voltdm || IS_ERR(voltdm)) {
pr_warning("%s: VDD specified does not exist!\n", __func__);
return;
}
vp = voltdm->vp;
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
__func__, voltdm->name);
return;
}
/* If VP is already enabled, do nothing. Return */
if (vp->enabled)
return;
volt = voltdm_get_voltage(voltdm);
if (!volt) {
pr_warning("%s: unable to find current voltage for %s\n",
__func__, voltdm->name);
return;
}
vpconfig = _vp_set_init_voltage(voltdm, volt);
/* Enable VP */
vpconfig |= vp->common->vpconfig_vpenable;
voltdm->write(vpconfig, vp->vpconfig);
vp->enabled = true;
}
/**
* omap_vp_disable() - API to disable a particular VP
* @voltdm: pointer to the VDD whose VP is to be disabled.
*
* This API disables a particular voltage processor. Needed by the smartreflex
* class drivers.
*/
void omap_vp_disable(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp;
u32 vpconfig;
int timeout;
if (!voltdm || IS_ERR(voltdm)) {
pr_warning("%s: VDD specified does not exist!\n", __func__);
return;
}
vp = voltdm->vp;
if (!voltdm->read || !voltdm->write) {
pr_err("%s: No read/write API for accessing vdd_%s regs\n",
__func__, voltdm->name);
return;
}
/* If VP is already disabled, do nothing. Return */
if (!vp->enabled) {
pr_warning("%s: Trying to disable VP for vdd_%s when"
"it is already disabled\n", __func__, voltdm->name);
return;
}
/* Disable VP */
vpconfig = voltdm->read(vp->vpconfig);
vpconfig &= ~vp->common->vpconfig_vpenable;
voltdm->write(vpconfig, vp->vpconfig);
/*
* Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
*/
omap_test_timeout((voltdm->read(vp->vstatus)),
VP_IDLE_TIMEOUT, timeout);
if (timeout >= VP_IDLE_TIMEOUT)
pr_warning("%s: vdd_%s idle timedout\n",
__func__, voltdm->name);
vp->enabled = false;
return;
}
...@@ -19,44 +19,60 @@ ...@@ -19,44 +19,60 @@
#include <linux/kernel.h> #include <linux/kernel.h>
struct voltagedomain;
/*
* Voltage Processor (VP) identifiers
*/
#define OMAP3_VP_VDD_MPU_ID 0
#define OMAP3_VP_VDD_CORE_ID 1
#define OMAP4_VP_VDD_CORE_ID 0
#define OMAP4_VP_VDD_IVA_ID 1
#define OMAP4_VP_VDD_MPU_ID 2
/* XXX document */ /* XXX document */
#define VP_IDLE_TIMEOUT 200 #define VP_IDLE_TIMEOUT 200
#define VP_TRANXDONE_TIMEOUT 300 #define VP_TRANXDONE_TIMEOUT 300
/**
* struct omap_vp_ops - per-VP operations
* @check_txdone: check for VP transaction done
* @clear_txdone: clear VP transaction done status
*/
struct omap_vp_ops {
u32 (*check_txdone)(u8 vp_id);
void (*clear_txdone)(u8 vp_id);
};
/** /**
* struct omap_vp_common_data - register data common to all VDDs * struct omap_vp_common - register data common to all VDDs
* @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg
* @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
* @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
* @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
* @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
* @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
* @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
* @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
* @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
* @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
* @vpconfig_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
* @vpconfig_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
* @vpconfig_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
* @vpconfig_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
* @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
* @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
* @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
* * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg
* XXX It it not necessary to have both a mask and a shift for the same
* bitfield - remove one
* XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix!
*/ */
struct omap_vp_common_data { struct omap_vp_common {
u32 vpconfig_erroroffset_mask;
u32 vpconfig_errorgain_mask; u32 vpconfig_errorgain_mask;
u32 vpconfig_initvoltage_mask; u32 vpconfig_initvoltage_mask;
u32 vpconfig_timeouten; u8 vpconfig_timeouten;
u32 vpconfig_initvdd; u8 vpconfig_initvdd;
u32 vpconfig_forceupdate; u8 vpconfig_forceupdate;
u32 vpconfig_vpenable; u8 vpconfig_vpenable;
u8 vpconfig_erroroffset_shift;
u8 vpconfig_errorgain_shift;
u8 vpconfig_initvoltage_shift;
u8 vstepmin_stepmin_shift; u8 vstepmin_stepmin_shift;
u8 vstepmin_smpswaittimemin_shift; u8 vstepmin_smpswaittimemin_shift;
u8 vstepmax_stepmax_shift; u8 vstepmax_stepmax_shift;
...@@ -64,80 +80,49 @@ struct omap_vp_common_data { ...@@ -64,80 +80,49 @@ struct omap_vp_common_data {
u8 vlimitto_vddmin_shift; u8 vlimitto_vddmin_shift;
u8 vlimitto_vddmax_shift; u8 vlimitto_vddmax_shift;
u8 vlimitto_timeout_shift; u8 vlimitto_timeout_shift;
}; u8 vpvoltage_mask;
/** const struct omap_vp_ops *ops;
* struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data
* @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM
* @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
*
* XXX prm_irqst_reg does not belong here
* XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a
* hardware bug
* XXX This structure is probably not needed
*/
struct omap_vp_prm_irqst_data {
u8 prm_irqst_reg;
u32 tranxdone_status;
}; };
/** /**
* struct omap_vp_instance_data - VP register offsets (per-VDD) * struct omap_vp_instance - VP register offsets (per-VDD)
* @vp_common: pointer to struct omap_vp_common_data * for this SoC * @common: pointer to struct omap_vp_common * for this SoC
* @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD
* @vpconfig: PRM_VP*_CONFIG reg offset from PRM start * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
* @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
* @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
* @vstatus: PRM_VP*_VSTATUS reg offset from PRM start * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
* @voltage: PRM_VP*_VOLTAGE reg offset from PRM start * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
* @id: Unique identifier for VP instance.
* @enabled: flag to keep track of whether vp is enabled or not
* *
* XXX vp_common is probably not needed since it is per-SoC * XXX vp_common is probably not needed since it is per-SoC
*/ */
struct omap_vp_instance_data { struct omap_vp_instance {
const struct omap_vp_common_data *vp_common; const struct omap_vp_common *common;
const struct omap_vp_prm_irqst_data *prm_irqst_data;
u8 vpconfig; u8 vpconfig;
u8 vstepmin; u8 vstepmin;
u8 vstepmax; u8 vstepmax;
u8 vlimitto; u8 vlimitto;
u8 vstatus; u8 vstatus;
u8 voltage; u8 voltage;
u8 id;
bool enabled;
}; };
/** extern struct omap_vp_instance omap3_vp_mpu;
* struct omap_vp_runtime_data - VP data populated at runtime by code extern struct omap_vp_instance omap3_vp_core;
* @vpconfig_erroroffset: value of ERROROFFSET bitfield in PRM_VP*_CONFIG
* @vpconfig_errorgain: value of ERRORGAIN bitfield in PRM_VP*_CONFIG
* @vstepmin_smpswaittimemin: value of SMPSWAITTIMEMIN bitfield in PRM_VP*_VSTEPMIN
* @vstepmax_smpswaittimemax: value of SMPSWAITTIMEMAX bitfield in PRM_VP*_VSTEPMAX
* @vlimitto_timeout: value of TIMEOUT bitfield in PRM_VP*_VLIMITTO
* @vstepmin_stepmin: value of VSTEPMIN bitfield in PRM_VP*_VSTEPMIN
* @vstepmax_stepmax: value of VSTEPMAX bitfield in PRM_VP*_VSTEPMAX
* @vlimitto_vddmin: value of VDDMIN bitfield in PRM_VP*_VLIMITTO
* @vlimitto_vddmax: value of VDDMAX bitfield in PRM_VP*_VLIMITTO
*
* XXX Is this structure really needed? Why not just program the
* device directly? They are in PRM space, therefore in the WKUP
* powerdomain, so register contents should not be lost in off-mode.
* XXX Some of these fields are incorrectly named, e.g., vstep*
*/
struct omap_vp_runtime_data {
u32 vpconfig_erroroffset;
u16 vpconfig_errorgain;
u16 vstepmin_smpswaittimemin;
u16 vstepmax_smpswaittimemax;
u16 vlimitto_timeout;
u8 vstepmin_stepmin;
u8 vstepmax_stepmax;
u8 vlimitto_vddmin;
u8 vlimitto_vddmax;
};
extern struct omap_vp_instance_data omap3_vp1_data; extern struct omap_vp_instance omap4_vp_mpu;
extern struct omap_vp_instance_data omap3_vp2_data; extern struct omap_vp_instance omap4_vp_iva;
extern struct omap_vp_instance omap4_vp_core;
extern struct omap_vp_instance_data omap4_vp_mpu_data; void omap_vp_init(struct voltagedomain *voltdm);
extern struct omap_vp_instance_data omap4_vp_iva_data; void omap_vp_enable(struct voltagedomain *voltdm);
extern struct omap_vp_instance_data omap4_vp_core_data; void omap_vp_disable(struct voltagedomain *voltdm);
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
unsigned long target_volt);
int omap_vp_update_errorgain(struct voltagedomain *voltdm,
unsigned long target_volt);
#endif #endif
...@@ -25,16 +25,20 @@ ...@@ -25,16 +25,20 @@
#include "voltage.h" #include "voltage.h"
#include "vp.h" #include "vp.h"
#include "prm2xxx_3xxx.h"
static const struct omap_vp_ops omap3_vp_ops = {
.check_txdone = omap3_prm_vp_check_txdone,
.clear_txdone = omap3_prm_vp_clear_txdone,
};
/* /*
* VP data common to 34xx/36xx chips * VP data common to 34xx/36xx chips
* XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file.
*/ */
static const struct omap_vp_common_data omap3_vp_common = { static const struct omap_vp_common omap3_vp_common = {
.vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, .vpconfig_erroroffset_mask = OMAP3430_ERROROFFSET_MASK,
.vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK,
.vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT,
.vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT,
.vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK, .vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK,
.vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK, .vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK,
.vpconfig_initvdd = OMAP3430_INITVDD_MASK, .vpconfig_initvdd = OMAP3430_INITVDD_MASK,
...@@ -47,36 +51,29 @@ static const struct omap_vp_common_data omap3_vp_common = { ...@@ -47,36 +51,29 @@ static const struct omap_vp_common_data omap3_vp_common = {
.vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT,
.vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT,
.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT,
}; .vpvoltage_mask = OMAP3430_VPVOLTAGE_MASK,
static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { .ops = &omap3_vp_ops,
.prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
}; };
struct omap_vp_instance_data omap3_vp1_data = { struct omap_vp_instance omap3_vp_mpu = {
.vp_common = &omap3_vp_common, .id = OMAP3_VP_VDD_MPU_ID,
.common = &omap3_vp_common,
.vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
.vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
.vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET, .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET,
.vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET, .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET,
.vstatus = OMAP3_PRM_VP1_STATUS_OFFSET, .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET,
.voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET,
.prm_irqst_data = &omap3_vp1_prm_irqst_data,
};
static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = {
.prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
}; };
struct omap_vp_instance_data omap3_vp2_data = { struct omap_vp_instance omap3_vp_core = {
.vp_common = &omap3_vp_common, .id = OMAP3_VP_VDD_CORE_ID,
.common = &omap3_vp_common,
.vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
.vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
.vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET, .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET,
.vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET, .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET,
.vstatus = OMAP3_PRM_VP2_STATUS_OFFSET, .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET,
.voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET, .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET,
.prm_irqst_data = &omap3_vp2_prm_irqst_data,
}; };
...@@ -27,15 +27,18 @@ ...@@ -27,15 +27,18 @@
#include "vp.h" #include "vp.h"
static const struct omap_vp_ops omap4_vp_ops = {
.check_txdone = omap4_prm_vp_check_txdone,
.clear_txdone = omap4_prm_vp_clear_txdone,
};
/* /*
* VP data common to 44xx chips * VP data common to 44xx chips
* XXX This stuff presumably belongs in the vp44xx.c or vp.c file. * XXX This stuff presumably belongs in the vp44xx.c or vp.c file.
*/ */
static const struct omap_vp_common_data omap4_vp_common = { static const struct omap_vp_common omap4_vp_common = {
.vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, .vpconfig_erroroffset_mask = OMAP4430_ERROROFFSET_MASK,
.vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK,
.vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT,
.vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT,
.vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK, .vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK,
.vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK, .vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK,
.vpconfig_initvdd = OMAP4430_INITVDD_MASK, .vpconfig_initvdd = OMAP4430_INITVDD_MASK,
...@@ -48,53 +51,39 @@ static const struct omap_vp_common_data omap4_vp_common = { ...@@ -48,53 +51,39 @@ static const struct omap_vp_common_data omap4_vp_common = {
.vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT,
.vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT,
.vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT,
.vpvoltage_mask = OMAP4430_VPVOLTAGE_MASK,
.ops = &omap4_vp_ops,
}; };
static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { struct omap_vp_instance omap4_vp_mpu = {
.prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .id = OMAP4_VP_VDD_MPU_ID,
.tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, .common = &omap4_vp_common,
};
struct omap_vp_instance_data omap4_vp_mpu_data = {
.vp_common = &omap4_vp_common,
.vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
.vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
.vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET, .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET,
.vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET, .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
.vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET, .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
.voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
.prm_irqst_data = &omap4_vp_mpu_prm_irqst_data,
}; };
static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { struct omap_vp_instance omap4_vp_iva = {
.prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .id = OMAP4_VP_VDD_IVA_ID,
.tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, .common = &omap4_vp_common,
};
struct omap_vp_instance_data omap4_vp_iva_data = {
.vp_common = &omap4_vp_common,
.vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
.vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
.vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET, .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET,
.vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET, .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
.vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET, .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
.voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
.prm_irqst_data = &omap4_vp_iva_prm_irqst_data,
};
static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = {
.prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
.tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
}; };
struct omap_vp_instance_data omap4_vp_core_data = { struct omap_vp_instance omap4_vp_core = {
.vp_common = &omap4_vp_common, .id = OMAP4_VP_VDD_CORE_ID,
.common = &omap4_vp_common,
.vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
.vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
.vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET, .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET,
.vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET, .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
.vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET, .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
.voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET, .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
.prm_irqst_data = &omap4_vp_core_prm_irqst_data,
}; };
...@@ -525,7 +525,6 @@ struct omap_hwmod { ...@@ -525,7 +525,6 @@ struct omap_hwmod {
char *clkdm_name; char *clkdm_name;
struct clockdomain *clkdm; struct clockdomain *clkdm;
char *vdd_name; char *vdd_name;
struct voltagedomain *voltdm;
struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
void *dev_attr; void *dev_attr;
......
/*
* OMAP Voltage Management Routines
*
* Copyright (C) 2011, Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_OMAP_VOLTAGE_H
#define __ARCH_ARM_OMAP_VOLTAGE_H
struct voltagedomain;
struct voltagedomain *voltdm_lookup(const char *name);
int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt);
unsigned long voltdm_get_voltage(struct voltagedomain *voltdm);
#endif
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