Commit 236e237f authored by Michael Chan's avatar Michael Chan Committed by Jakub Kicinski

bnxt_en: Add support for HWRM_FUNC_BACKING_STORE_CFG_V2 firmware calls

Newer chips starting with 57600 will use this new firmware HWRM call to
configure backing store memory.  Add this new call if it is supported
by the firmware.
Reviewed-by: default avatarHongguang Gao <hongguang.gao@broadcom.com>
Signed-off-by: default avatarMichael Chan <michael.chan@broadcom.com>
Link: https://lore.kernel.org/r/20231120234405.194542-9-michael.chan@broadcom.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 6a4d0774
...@@ -7670,6 +7670,71 @@ static int bnxt_setup_ctxm_pg_tbls(struct bnxt *bp, ...@@ -7670,6 +7670,71 @@ static int bnxt_setup_ctxm_pg_tbls(struct bnxt *bp,
return rc; return rc;
} }
static int bnxt_hwrm_func_backing_store_cfg_v2(struct bnxt *bp,
struct bnxt_ctx_mem_type *ctxm,
bool last)
{
struct hwrm_func_backing_store_cfg_v2_input *req;
u32 instance_bmap = ctxm->instance_bmap;
int i, j, rc = 0, n = 1;
__le32 *p;
if (!(ctxm->flags & BNXT_CTX_MEM_TYPE_VALID) || !ctxm->pg_info)
return 0;
if (instance_bmap)
n = hweight32(ctxm->instance_bmap);
else
instance_bmap = 1;
rc = hwrm_req_init(bp, req, HWRM_FUNC_BACKING_STORE_CFG_V2);
if (rc)
return rc;
hwrm_req_hold(bp, req);
req->type = cpu_to_le16(ctxm->type);
req->entry_size = cpu_to_le16(ctxm->entry_size);
req->subtype_valid_cnt = ctxm->split_entry_cnt;
for (i = 0, p = &req->split_entry_0; i < ctxm->split_entry_cnt; i++)
p[i] = cpu_to_le32(ctxm->split[i]);
for (i = 0, j = 0; j < n && !rc; i++) {
struct bnxt_ctx_pg_info *ctx_pg;
if (!(instance_bmap & (1 << i)))
continue;
req->instance = cpu_to_le16(i);
ctx_pg = &ctxm->pg_info[j++];
if (!ctx_pg->entries)
continue;
req->num_entries = cpu_to_le32(ctx_pg->entries);
bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,
&req->page_size_pbl_level,
&req->page_dir);
if (last && j == n)
req->flags =
cpu_to_le32(FUNC_BACKING_STORE_CFG_V2_REQ_FLAGS_BS_CFG_ALL_DONE);
rc = hwrm_req_send(bp, req);
}
hwrm_req_drop(bp, req);
return rc;
}
static int bnxt_backing_store_cfg_v2(struct bnxt *bp)
{
struct bnxt_ctx_mem_info *ctx = bp->ctx;
struct bnxt_ctx_mem_type *ctxm;
int rc = 0;
u16 type;
for (type = 0 ; type < BNXT_CTX_V2_MAX; type++) {
ctxm = &ctx->ctx_arr[type];
rc = bnxt_hwrm_func_backing_store_cfg_v2(bp, ctxm, ctxm->last);
if (rc)
return rc;
}
return 0;
}
void bnxt_free_ctx_mem(struct bnxt *bp) void bnxt_free_ctx_mem(struct bnxt *bp)
{ {
struct bnxt_ctx_mem_info *ctx = bp->ctx; struct bnxt_ctx_mem_info *ctx = bp->ctx;
...@@ -7804,7 +7869,11 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp) ...@@ -7804,7 +7869,11 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++) for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++)
ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_SP << i; ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_SP << i;
ena |= FUNC_BACKING_STORE_CFG_REQ_DFLT_ENABLES; ena |= FUNC_BACKING_STORE_CFG_REQ_DFLT_ENABLES;
rc = bnxt_hwrm_func_backing_store_cfg(bp, ena);
if (bp->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)
rc = bnxt_backing_store_cfg_v2(bp);
else
rc = bnxt_hwrm_func_backing_store_cfg(bp, ena);
if (rc) { if (rc) {
netdev_err(bp->dev, "Failed configuring context mem, rc = %d.\n", netdev_err(bp->dev, "Failed configuring context mem, rc = %d.\n",
rc); rc);
......
...@@ -1548,6 +1548,7 @@ struct bnxt_ctx_mem_type { ...@@ -1548,6 +1548,7 @@ struct bnxt_ctx_mem_type {
u16 type; u16 type;
u16 entry_size; u16 entry_size;
u32 flags; u32 flags;
#define BNXT_CTX_MEM_TYPE_VALID FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_TYPE_VALID
u32 instance_bmap; u32 instance_bmap;
u8 init_value; u8 init_value;
u8 entry_multiple; u8 entry_multiple;
......
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