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Commit 24c104b9 authored by Jeremy Higdon's avatar Jeremy Higdon Committed by James Bottomley
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[libata] Split up shared IO register locations into individual components 

Most ATA host controllers follow a standard layout for the
ATA shadow registers, where command/status, error/feature, and
devctl/altstatus share a single bus I/O address, because one register
of each pair is read-only, and the other is write-only.

On the Vitesse/Intel chip, all registers are given distinction bus I/O
addresses, which necessitates changing the libata data structures
to cope with this.  This simply involves storing a few more bus addresses.
parent c5d9af3e
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Showing with 37 additions and 18 deletions
drivers/scsi/libata-core.c
View file @ 24c104b9
......@@ -141,7 +141,7 @@ void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
}
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
outb(tf->hob_feature, ioaddr->error_addr);
outb(tf->hob_feature, ioaddr->feature_addr);
outb(tf->hob_nsect, ioaddr->nsect_addr);
outb(tf->hob_lbal, ioaddr->lbal_addr);
outb(tf->hob_lbam, ioaddr->lbam_addr);
......@@ -155,7 +155,7 @@ void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf)
}
if (is_addr) {
outb(tf->feature, ioaddr->error_addr);
outb(tf->feature, ioaddr->feature_addr);
outb(tf->nsect, ioaddr->nsect_addr);
outb(tf->lbal, ioaddr->lbal_addr);
outb(tf->lbam, ioaddr->lbam_addr);
......@@ -199,7 +199,7 @@ void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
}
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
writeb(tf->hob_feature, (void *) ioaddr->error_addr);
writeb(tf->hob_feature, (void *) ioaddr->feature_addr);
writeb(tf->hob_nsect, (void *) ioaddr->nsect_addr);
writeb(tf->hob_lbal, (void *) ioaddr->lbal_addr);
writeb(tf->hob_lbam, (void *) ioaddr->lbam_addr);
......@@ -213,7 +213,7 @@ void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
}
if (is_addr) {
writeb(tf->feature, (void *) ioaddr->error_addr);
writeb(tf->feature, (void *) ioaddr->feature_addr);
writeb(tf->nsect, (void *) ioaddr->nsect_addr);
writeb(tf->lbal, (void *) ioaddr->lbal_addr);
writeb(tf->lbam, (void *) ioaddr->lbam_addr);
......@@ -250,7 +250,7 @@ void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf)
{
DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
outb(tf->command, ap->ioaddr.cmdstat_addr);
outb(tf->command, ap->ioaddr.command_addr);
ata_pause(ap);
}
......@@ -271,7 +271,7 @@ void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
{
DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
writeb(tf->command, (void *) ap->ioaddr.cmdstat_addr);
writeb(tf->command, (void *) ap->ioaddr.command_addr);
ata_pause(ap);
}
......@@ -417,7 +417,7 @@ void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
*/
u8 ata_check_status_pio(struct ata_port *ap)
{
return inb(ap->ioaddr.cmdstat_addr);
return inb(ap->ioaddr.status_addr);
}
/**
......@@ -433,7 +433,7 @@ u8 ata_check_status_pio(struct ata_port *ap)
*/
u8 ata_check_status_mmio(struct ata_port *ap)
{
return readb((void *) ap->ioaddr.cmdstat_addr);
return readb((void *) ap->ioaddr.status_addr);
}
static const char * udma_str[] = {
......@@ -3026,12 +3026,14 @@ void ata_std_ports(struct ata_ioports *ioaddr)
{
ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
ioaddr->cmdstat_addr = ioaddr->cmd_addr + ATA_REG_CMD;
ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
}
/**
......@@ -3153,12 +3155,14 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
if (legacy_mode) {
probe_ent->port[0].cmd_addr = 0x1f0;
probe_ent->port[0].altstatus_addr =
probe_ent->port[0].ctl_addr = 0x3f6;
probe_ent->n_ports = 1;
probe_ent->irq = 14;
ata_std_ports(&probe_ent->port[0]);
probe_ent2->port[0].cmd_addr = 0x170;
probe_ent2->port[0].altstatus_addr =
probe_ent2->port[0].ctl_addr = 0x376;
probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8;
probe_ent2->n_ports = 1;
......@@ -3173,11 +3177,13 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
} else {
probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
ata_std_ports(&probe_ent->port[0]);
probe_ent->port[0].altstatus_addr =
probe_ent->port[0].ctl_addr =
pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
ata_std_ports(&probe_ent->port[1]);
probe_ent->port[1].altstatus_addr =
probe_ent->port[1].ctl_addr =
pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
......
drivers/scsi/sata_promise.c
View file @ 24c104b9
......@@ -1172,13 +1172,16 @@ static void pdc_sata_setup_port(struct ata_ioports *port, unsigned long base)
{
port->cmd_addr = base;
port->data_addr = base;
port->feature_addr =
port->error_addr = base + 0x4;
port->nsect_addr = base + 0x8;
port->lbal_addr = base + 0xc;
port->lbam_addr = base + 0x10;
port->lbah_addr = base + 0x14;
port->device_addr = base + 0x18;
port->cmdstat_addr = base + 0x1c;
port->command_addr =
port->status_addr = base + 0x1c;
port->altstatus_addr =
port->ctl_addr = base + 0x38;
}
......
drivers/scsi/sata_sil.c
View file @ 24c104b9
......@@ -360,12 +360,14 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
base = (unsigned long) mmio_base;
probe_ent->port[0].cmd_addr = base + SIL_IDE0_TF;
probe_ent->port[0].altstatus_addr =
probe_ent->port[0].ctl_addr = base + SIL_IDE0_CTL;
probe_ent->port[0].bmdma_addr = base + SIL_IDE0_BMDMA;
probe_ent->port[0].scr_addr = base + SIL_IDE0_SCR;
ata_std_ports(&probe_ent->port[0]);
probe_ent->port[1].cmd_addr = base + SIL_IDE1_TF;
probe_ent->port[1].altstatus_addr =
probe_ent->port[1].ctl_addr = base + SIL_IDE1_CTL;
probe_ent->port[1].bmdma_addr = base + SIL_IDE1_BMDMA;
probe_ent->port[1].scr_addr = base + SIL_IDE1_SCR;
......@@ -373,12 +375,14 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
if (ent->driver_data == sil_3114) {
probe_ent->port[2].cmd_addr = base + SIL_IDE2_TF;
probe_ent->port[2].altstatus_addr =
probe_ent->port[2].ctl_addr = base + SIL_IDE2_CTL;
probe_ent->port[2].bmdma_addr = base + SIL_IDE2_BMDMA;
probe_ent->port[2].scr_addr = base + SIL_IDE2_SCR;
ata_std_ports(&probe_ent->port[2]);
probe_ent->port[3].cmd_addr = base + SIL_IDE3_TF;
probe_ent->port[3].altstatus_addr =
probe_ent->port[3].ctl_addr = base + SIL_IDE3_CTL;
probe_ent->port[3].bmdma_addr = base + SIL_IDE3_BMDMA;
probe_ent->port[3].scr_addr = base + SIL_IDE3_SCR;
......
drivers/scsi/sata_svw.c
View file @ 24c104b9
......@@ -103,13 +103,13 @@ static void k2_sata_tf_load(struct ata_port *ap, struct ata_taskfile *tf)
ata_wait_idle(ap);
}
if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
writew(tf->feature | (((u16)tf->hob_feature) << 8), ioaddr->error_addr);
writew(tf->feature | (((u16)tf->hob_feature) << 8), ioaddr->feature_addr);
writew(tf->nsect | (((u16)tf->hob_nsect) << 8), ioaddr->nsect_addr);
writew(tf->lbal | (((u16)tf->hob_lbal) << 8), ioaddr->lbal_addr);
writew(tf->lbam | (((u16)tf->hob_lbam) << 8), ioaddr->lbam_addr);
writew(tf->lbah | (((u16)tf->hob_lbah) << 8), ioaddr->lbah_addr);
} else if (is_addr) {
writew(tf->feature, ioaddr->error_addr);
writew(tf->feature, ioaddr->feature_addr);
writew(tf->nsect, ioaddr->nsect_addr);
writew(tf->lbal, ioaddr->lbal_addr);
writew(tf->lbam, ioaddr->lbam_addr);
......@@ -146,7 +146,7 @@ static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
static u8 k2_stat_check_status(struct ata_port *ap)
{
return readl((void *) ap->ioaddr.cmdstat_addr);
return readl((void *) ap->ioaddr.status_addr);
}
static void k2_sata_set_piomode (struct ata_port *ap, struct ata_device *adev,
......@@ -261,13 +261,16 @@ static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base)
{
port->cmd_addr = base + K2_SATA_TF_CMD_OFFSET;
port->data_addr = base + K2_SATA_TF_DATA_OFFSET;
port->feature_addr =
port->error_addr = base + K2_SATA_TF_ERROR_OFFSET;
port->nsect_addr = base + K2_SATA_TF_NSECT_OFFSET;
port->lbal_addr = base + K2_SATA_TF_LBAL_OFFSET;
port->lbam_addr = base + K2_SATA_TF_LBAM_OFFSET;
port->lbah_addr = base + K2_SATA_TF_LBAH_OFFSET;
port->device_addr = base + K2_SATA_TF_DEVICE_OFFSET;
port->cmdstat_addr = base + K2_SATA_TF_CMDSTAT_OFFSET;
port->command_addr =
port->status_addr = base + K2_SATA_TF_CMDSTAT_OFFSET;
port->altstatus_addr =
port->ctl_addr = base + K2_SATA_TF_CTL_OFFSET;
port->bmdma_addr = base + K2_SATA_DMA_CMD_OFFSET;
port->scr_addr = base + K2_SATA_SCR_STATUS_OFFSET;
......
include/linux/libata.h
View file @ 24c104b9
......@@ -183,12 +183,15 @@ struct ata_ioports {
unsigned long cmd_addr;
unsigned long data_addr;
unsigned long error_addr;
unsigned long feature_addr;
unsigned long nsect_addr;
unsigned long lbal_addr;
unsigned long lbam_addr;
unsigned long lbah_addr;
unsigned long device_addr;
unsigned long cmdstat_addr;
unsigned long status_addr;
unsigned long command_addr;
unsigned long altstatus_addr;
unsigned long ctl_addr;
unsigned long bmdma_addr;
unsigned long scr_addr;
......@@ -465,8 +468,8 @@ static inline u8 ata_chk_status(struct ata_port *ap)
static inline u8 ata_altstatus(struct ata_port *ap)
{
if (ap->flags & ATA_FLAG_MMIO)
return readb(ap->ioaddr.ctl_addr);
return inb(ap->ioaddr.ctl_addr);
return readb(ap->ioaddr.altstatus_addr);
return inb(ap->ioaddr.altstatus_addr);
}
static inline void ata_pause(struct ata_port *ap)
......@@ -494,7 +497,7 @@ static inline u8 ata_wait_idle(struct ata_port *ap)
u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
if (status & (ATA_BUSY | ATA_DRQ)) {
unsigned long l = ap->ioaddr.cmdstat_addr;
unsigned long l = ap->ioaddr.status_addr;
printk(KERN_WARNING
"ATA: abnormal status 0x%X on port 0x%lX\n",
status, l);
......
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