Commit 2560d94e authored by Andy Walls's avatar Andy Walls Committed by Mauro Carvalho Chehab

V4L/DVB: cx23885, cx25840: Report the actual length of an IR Rx timeout event

Instead of reporting an IR Rx timeout event as a ridiculously
long space, report it as a space of the lenght of the timeout.

This partially fixes operation with LIRC without breaking
interoperation with the in kernel decoders.  The gaps lengths
reported to LIRC are still not real however.
Signed-off-by: default avatarAndy Walls <awalls@md.metrocast.net>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent ceb152ad
......@@ -46,12 +46,6 @@
static void convert_measurement(u32 x, struct ir_raw_event *y)
{
if (x == V4L2_SUBDEV_IR_PULSE_RX_SEQ_END) {
y->pulse = false;
y->duration = V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS;
return;
}
y->pulse = (x & V4L2_SUBDEV_IR_PULSE_LEVEL_MASK) ? true : false;
y->duration = x & V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS;
}
......
......@@ -675,15 +675,17 @@ static int cx23888_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count,
*num = n * sizeof(u32);
for (p = (u32 *) buf, i = 0; i < n; p++, i++) {
if ((*p & FIFO_RXTX_RTO) == FIFO_RXTX_RTO) {
*p = V4L2_SUBDEV_IR_PULSE_RX_SEQ_END;
/* Assume RTO was because of no IR light input */
u = 0;
v4l2_dbg(2, ir_888_debug, sd, "rx read: end of rx\n");
continue;
}
u = (*p & FIFO_RXTX_LVL) ? V4L2_SUBDEV_IR_PULSE_LEVEL_MASK : 0;
} else {
u = (*p & FIFO_RXTX_LVL)
? V4L2_SUBDEV_IR_PULSE_LEVEL_MASK : 0;
if (invert)
u = u ? 0 : V4L2_SUBDEV_IR_PULSE_LEVEL_MASK;
}
v = (u32) pulse_width_count_to_ns((u16) (*p & FIFO_RXTX),
divider);
......
......@@ -677,15 +677,17 @@ static int cx25840_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count,
*num = n * sizeof(u32);
for (p = (u32 *) buf, i = 0; i < n; p++, i++) {
if ((*p & FIFO_RXTX_RTO) == FIFO_RXTX_RTO) {
*p = V4L2_SUBDEV_IR_PULSE_RX_SEQ_END;
/* Assume RTO was because of no IR light input */
u = 0;
v4l2_dbg(2, ir_debug, sd, "rx read: end of rx\n");
continue;
}
u = (*p & FIFO_RXTX_LVL) ? V4L2_SUBDEV_IR_PULSE_LEVEL_MASK : 0;
} else {
u = (*p & FIFO_RXTX_LVL)
? V4L2_SUBDEV_IR_PULSE_LEVEL_MASK : 0;
if (invert)
u = u ? 0 : V4L2_SUBDEV_IR_PULSE_LEVEL_MASK;
}
v = (u32) pulse_width_count_to_ns((u16) (*p & FIFO_RXTX),
divider);
......
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