MIPS: dt: Explicitly specify native endian behaviour for syscon

On many MIPS systems the endianness of IP blocks is kept the same as
that of the CPU by the hardware.  This includes the system controllers
on these systems which are controlled via syscon which uses the regmap
API which used readl() and writel() to interact with the hardware,
meaning that all writes are converted to little endian when writing to
the hardware.  This caused a bad interaction with the regmap core in big
endian mode since it was not aware of the byte swapping and so ended up
performing little endian writes.

Unfortunately when this issue was noticed it was addressed by updating
the DT for the affected devices to specify them as little endian.  This
happened to work since it resulted in two endianness swaps which
cancelled each other out and gave little endian behaviour but meant that
the DT was clearly not accurately describing the hardware.

The intention of commit 29bb45f2 (regmap-mmio: Use native
endianness for read/write) was to fix this by making regmap default to
native endianness but this breaks most other MMIO users where the
hardware has a fixed endianness and the implementation uses the __raw
accessors which are not intended to be used outside of architecture
code.  Instead use the newly added native-endian DT property to say
exactly what we want for these systems.

Fixes: 29bb45f2 (regmap-mmio: Use native endianness for read/write)
Reported-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/boot/dts/brcm/bcm6328.dtsi

@@ -74,6 +74,7 @@ uart0: serial@10000100 {
 		timer: timer@10000040 {
 			compatible = "syscon";
 			reg = <0x10000040 0x2c>;
+			native-endian;
 		};
 
 		reboot {

arch/mips/boot/dts/brcm/bcm6368.dtsi

@@ -54,7 +54,7 @@ ubus {
 		periph_cntl: syscon@10000000 {
 			compatible = "syscon";
 			reg = <0x10000000 0x14>;
-			little-endian;
+			native-endian;
 		};
 
 		reboot: syscon-reboot@10000008 {

arch/mips/boot/dts/brcm/bcm7125.dtsi

@@ -98,6 +98,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x60c>;
+			native-endian;
 		};
 
 		reboot {

arch/mips/boot/dts/brcm/bcm7346.dtsi

@@ -118,6 +118,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
+			native-endian;
 		};
 
 		reboot {

arch/mips/boot/dts/brcm/bcm7358.dtsi

@@ -112,6 +112,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
+			native-endian;
 		};
 
 		reboot {

arch/mips/boot/dts/brcm/bcm7360.dtsi

@@ -112,6 +112,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
+			native-endian;
 		};
 
 		reboot {

arch/mips/boot/dts/brcm/bcm7362.dtsi

@@ -118,6 +118,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
+			native-endian;
 		};
 
 		reboot {

arch/mips/boot/dts/brcm/bcm7420.dtsi

@@ -99,6 +99,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x60c>;
+			native-endian;
 		};
 
 		reboot {

arch/mips/boot/dts/brcm/bcm7425.dtsi

@@ -100,6 +100,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
+			native-endian;
 		};
 
 		reboot {

arch/mips/boot/dts/brcm/bcm7435.dtsi

@@ -114,6 +114,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
 		sun_top_ctrl: syscon@404000 {
 			compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
 			reg = <0x404000 0x51c>;
+			native-endian;
 		};
 
 		reboot {