Commit 26652cd8 authored by Flora Cui's avatar Flora Cui Committed by Alex Deucher

drm/amdgpu: drop BOOLEAN define in display part

use bool directly
Signed-off-by: default avatarFlora Cui <flora.cui@amd.com>
Reviewed-by: default avatarGuchun Chen <guchun.chen@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 62f6b116
...@@ -810,7 +810,7 @@ pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int mhz) ...@@ -810,7 +810,7 @@ pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int mhz)
} }
static enum pp_smu_status pp_nv_set_pstate_handshake_support( static enum pp_smu_status pp_nv_set_pstate_handshake_support(
struct pp_smu *pp, BOOLEAN pstate_handshake_supported) struct pp_smu *pp, bool pstate_handshake_supported)
{ {
const struct dc_context *ctx = pp->dm; const struct dc_context *ctx = pp->dm;
struct amdgpu_device *adev = ctx->driver_context; struct amdgpu_device *adev = ctx->driver_context;
......
...@@ -30,8 +30,6 @@ ...@@ -30,8 +30,6 @@
* interface to PPLIB/SMU to setup clocks and pstate requirements on SoC * interface to PPLIB/SMU to setup clocks and pstate requirements on SoC
*/ */
typedef bool BOOLEAN;
enum pp_smu_ver { enum pp_smu_ver {
/* /*
* PP_SMU_INTERFACE_X should be interpreted as the interface defined * PP_SMU_INTERFACE_X should be interpreted as the interface defined
...@@ -240,7 +238,7 @@ struct pp_smu_funcs_nv { ...@@ -240,7 +238,7 @@ struct pp_smu_funcs_nv {
* DC hardware * DC hardware
*/ */
enum pp_smu_status (*set_pstate_handshake_support)(struct pp_smu *pp, enum pp_smu_status (*set_pstate_handshake_support)(struct pp_smu *pp,
BOOLEAN pstate_handshake_supported); bool pstate_handshake_supported);
}; };
#define PP_SMU_NUM_SOCCLK_DPM_LEVELS 8 #define PP_SMU_NUM_SOCCLK_DPM_LEVELS 8
......
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