Commit 26b8c07f authored by Jonas Gorski's avatar Jonas Gorski Committed by Ralf Baechle

MIPS: BCM63XX: setup the HSSPI clock rate

Properly set up the HSSPI clock rate depending on the SoC's PLL rate.
Signed-off-by: default avatarJonas Gorski <jogo@openwrt.org>
Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6177/
parent 0ebe8aae
...@@ -390,3 +390,21 @@ void clk_put(struct clk *clk) ...@@ -390,3 +390,21 @@ void clk_put(struct clk *clk)
} }
EXPORT_SYMBOL(clk_put); EXPORT_SYMBOL(clk_put);
#define HSSPI_PLL_HZ_6328 133333333
#define HSSPI_PLL_HZ_6362 400000000
static int __init bcm63xx_clk_init(void)
{
switch (bcm63xx_get_cpu_id()) {
case BCM6328_CPU_ID:
clk_hsspi.rate = HSSPI_PLL_HZ_6328;
break;
case BCM6362_CPU_ID:
clk_hsspi.rate = HSSPI_PLL_HZ_6362;
break;
}
return 0;
}
arch_initcall(bcm63xx_clk_init);
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment