Commit 26d9dd0d authored by Tomi Valkeinen's avatar Tomi Valkeinen

OMAP: DSS2: DISPC: rename manager related funcs

Rename dispc's manager related functions as follows:

- Remove prepending underscores, which were originally used to inform
  that the clocks needs to be enabled. This meaning is no longer valid.
- Prepend the functions with dispc_mgr_*
- Remove "channel" from the name, e.g. dispc_enable_channel ->
  dispc_mgr_enable

The idea is to group manager related functions so that it can be deduced
from the function name that it writes to manager spesific registers.

All dispc_mgr_* functions have enum omap_channel as the first parameter.
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent f0e5caab
This diff is collapsed.
......@@ -82,7 +82,7 @@ static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
if (r) {
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
return r;
......@@ -111,7 +111,7 @@ static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
if (r)
return r;
r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
if (r)
return r;
......@@ -131,7 +131,7 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
bool is_tft;
int r = 0;
dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
dssdev->panel.acbi, dssdev->panel.acb);
is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
......@@ -155,7 +155,7 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
t->pixel_clock = pck;
}
dispc_set_lcd_timings(dssdev->manager->id, t);
dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
return 0;
}
......@@ -166,11 +166,11 @@ static void dpi_basic_init(struct omap_dss_device *dssdev)
is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
dispc_set_parallel_interface_mode(dssdev->manager->id,
dispc_mgr_set_parallel_interface_mode(dssdev->manager->id,
OMAP_DSS_PARALLELMODE_BYPASS);
dispc_set_lcd_display_type(dssdev->manager->id, is_tft ?
dispc_mgr_set_lcd_display_type(dssdev->manager->id, is_tft ?
OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
dispc_set_tft_data_lines(dssdev->manager->id,
dispc_mgr_set_tft_data_lines(dssdev->manager->id,
dssdev->phy.dpi.data_lines);
}
......@@ -284,7 +284,7 @@ void dpi_set_timings(struct omap_dss_device *dssdev,
}
dpi_set_mode(dssdev);
dispc_go(dssdev->manager->id);
dispc_mgr_go(dssdev->manager->id);
dispc_runtime_put();
dss_runtime_put();
......
......@@ -1283,7 +1283,7 @@ static int dsi_calc_clock_rates(struct omap_dss_device *dssdev,
* with DSS_SYS_CLK source also */
cinfo->highfreq = 0;
} else {
cinfo->clkin = dispc_pclk_rate(dssdev->manager->id);
cinfo->clkin = dispc_mgr_pclk_rate(dssdev->manager->id);
if (cinfo->clkin < 32000000)
cinfo->highfreq = 0;
......@@ -3817,7 +3817,7 @@ int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
dss_setup_partial_planes(dssdev, x, y, w, h,
enlarge_update_area);
dispc_set_lcd_size(dssdev->manager->id, *w, *h);
dispc_mgr_set_lcd_size(dssdev->manager->id, *w, *h);
return 0;
}
......@@ -3871,14 +3871,15 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
return r;
}
dispc_set_lcd_display_type(dssdev->manager->id,
dispc_mgr_set_lcd_display_type(dssdev->manager->id,
OMAP_DSS_LCD_DISPLAY_TFT);
dispc_set_parallel_interface_mode(dssdev->manager->id,
dispc_mgr_set_parallel_interface_mode(dssdev->manager->id,
OMAP_DSS_PARALLELMODE_DSI);
dispc_enable_fifohandcheck(dssdev->manager->id, 1);
dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 1);
dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
dispc_mgr_set_tft_data_lines(dssdev->manager->id,
dssdev->ctrl.pixel_size);
{
struct omap_video_timings timings = {
......@@ -3890,7 +3891,7 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
.vbp = 0,
};
dispc_set_lcd_timings(dssdev->manager->id, &timings);
dispc_mgr_set_lcd_timings(dssdev->manager->id, &timings);
}
return 0;
......@@ -3952,7 +3953,7 @@ static int dsi_configure_dispc_clocks(struct omap_dss_device *dssdev)
return r;
}
r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
if (r) {
DSSERR("Failed to set dispc clocks\n");
return r;
......
......@@ -383,16 +383,16 @@ void dispc_disable_sidle(void);
void dispc_lcd_enable_signal_polarity(bool act_high);
void dispc_lcd_enable_signal(bool enable);
void dispc_pck_free_enable(bool enable);
void dispc_enable_fifohandcheck(enum omap_channel channel, bool enable);
void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
void dispc_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
void dispc_set_digit_size(u16 width, u16 height);
u32 dispc_ovl_get_fifo_size(enum omap_plane plane);
void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
void dispc_enable_fifomerge(bool enable);
u32 dispc_ovl_get_burst_size(enum omap_plane plane);
void dispc_enable_cpr(enum omap_channel channel, bool enable);
void dispc_set_cpr_coef(enum omap_channel channel,
void dispc_mgr_enable_cpr(enum omap_channel channel, bool enable);
void dispc_mgr_set_cpr_coef(enum omap_channel channel,
struct omap_dss_cpr_coefs *coefs);
void dispc_enable_gamma_table(bool enable);
......@@ -409,48 +409,48 @@ int dispc_ovl_setup(enum omap_plane plane,
enum omap_channel channel,
u32 puv_addr);
bool dispc_go_busy(enum omap_channel channel);
void dispc_go(enum omap_channel channel);
void dispc_enable_channel(enum omap_channel channel, bool enable);
bool dispc_is_channel_enabled(enum omap_channel channel);
bool dispc_mgr_go_busy(enum omap_channel channel);
void dispc_mgr_go(enum omap_channel channel);
void dispc_mgr_enable(enum omap_channel channel, bool enable);
bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
int dispc_ovl_enable(enum omap_plane plane, bool enable);
void dispc_ovl_enable_replication(enum omap_plane plane, bool enable);
void dispc_set_parallel_interface_mode(enum omap_channel channel,
void dispc_mgr_set_parallel_interface_mode(enum omap_channel channel,
enum omap_parallel_interface_mode mode);
void dispc_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
void dispc_set_lcd_display_type(enum omap_channel channel,
void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
void dispc_mgr_set_lcd_display_type(enum omap_channel channel,
enum omap_lcd_display_type type);
void dispc_set_loadmode(enum omap_dss_load_mode mode);
void dispc_set_default_color(enum omap_channel channel, u32 color);
u32 dispc_get_default_color(enum omap_channel channel);
void dispc_set_trans_key(enum omap_channel ch,
void dispc_mgr_set_default_color(enum omap_channel channel, u32 color);
u32 dispc_mgr_get_default_color(enum omap_channel channel);
void dispc_mgr_set_trans_key(enum omap_channel ch,
enum omap_dss_trans_key_type type,
u32 trans_key);
void dispc_get_trans_key(enum omap_channel ch,
void dispc_mgr_get_trans_key(enum omap_channel ch,
enum omap_dss_trans_key_type *type,
u32 *trans_key);
void dispc_enable_trans_key(enum omap_channel ch, bool enable);
void dispc_enable_alpha_blending(enum omap_channel ch, bool enable);
bool dispc_trans_key_enabled(enum omap_channel ch);
bool dispc_alpha_blending_enabled(enum omap_channel ch);
void dispc_mgr_enable_trans_key(enum omap_channel ch, bool enable);
void dispc_mgr_enable_alpha_blending(enum omap_channel ch, bool enable);
bool dispc_mgr_trans_key_enabled(enum omap_channel ch);
bool dispc_mgr_alpha_blending_enabled(enum omap_channel ch);
bool dispc_lcd_timings_ok(struct omap_video_timings *timings);
void dispc_set_lcd_timings(enum omap_channel channel,
void dispc_mgr_set_lcd_timings(enum omap_channel channel,
struct omap_video_timings *timings);
unsigned long dispc_fclk_rate(void);
unsigned long dispc_lclk_rate(enum omap_channel channel);
unsigned long dispc_pclk_rate(enum omap_channel channel);
void dispc_set_pol_freq(enum omap_channel channel,
unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
void dispc_mgr_set_pol_freq(enum omap_channel channel,
enum omap_panel_config config, u8 acbi, u8 acb);
void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
struct dispc_clock_info *cinfo);
int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
struct dispc_clock_info *cinfo);
int dispc_set_clock_div(enum omap_channel channel,
int dispc_mgr_set_clock_div(enum omap_channel channel,
struct dispc_clock_info *cinfo);
int dispc_get_clock_div(enum omap_channel channel,
int dispc_mgr_get_clock_div(enum omap_channel channel,
struct dispc_clock_info *cinfo);
......
......@@ -1116,7 +1116,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
if (r)
return r;
dispc_enable_channel(OMAP_DSS_CHANNEL_DIGIT, 0);
dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 0);
p = &dssdev->panel.timings;
......@@ -1173,7 +1173,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
dispc_set_digit_size(dssdev->panel.timings.x_res,
dssdev->panel.timings.y_res);
dispc_enable_channel(OMAP_DSS_CHANNEL_DIGIT, 1);
dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 1);
hdmi_wp_video_start(1);
......@@ -1185,7 +1185,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
static void hdmi_power_off(struct omap_dss_device *dssdev)
{
dispc_enable_channel(OMAP_DSS_CHANNEL_DIGIT, 0);
dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 0);
hdmi_wp_video_start(0);
hdmi_phy_off();
......
......@@ -970,13 +970,13 @@ static void configure_manager(enum omap_channel channel)
/* picking info from the cache */
mi = &dss_cache.manager_cache[channel].info;
dispc_set_default_color(channel, mi->default_color);
dispc_set_trans_key(channel, mi->trans_key_type, mi->trans_key);
dispc_enable_trans_key(channel, mi->trans_enabled);
dispc_enable_alpha_blending(channel, mi->alpha_enabled);
dispc_mgr_set_default_color(channel, mi->default_color);
dispc_mgr_set_trans_key(channel, mi->trans_key_type, mi->trans_key);
dispc_mgr_enable_trans_key(channel, mi->trans_enabled);
dispc_mgr_enable_alpha_blending(channel, mi->alpha_enabled);
if (dss_has_feature(FEAT_CPR)) {
dispc_enable_cpr(channel, mi->cpr_enable);
dispc_set_cpr_coef(channel, &mi->cpr_coefs);
dispc_mgr_enable_cpr(channel, mi->cpr_enable);
dispc_mgr_set_cpr_coef(channel, &mi->cpr_coefs);
}
}
......@@ -1000,7 +1000,7 @@ static int configure_dispc(void)
busy = false;
for (i = 0; i < num_mgrs; i++) {
mgr_busy[i] = dispc_go_busy(i);
mgr_busy[i] = dispc_mgr_go_busy(i);
mgr_go[i] = false;
}
......@@ -1061,7 +1061,7 @@ static int configure_dispc(void)
* always be turned off after frame, and new settings will be
* taken in to use at next update */
if (!mc->manual_update)
dispc_go(i);
dispc_mgr_go(i);
}
if (busy)
......@@ -1266,7 +1266,7 @@ static void dss_apply_irq_handler(void *data, u32 mask)
u32 irq_mask;
for (i = 0; i < num_mgrs; i++)
mgr_busy[i] = dispc_go_busy(i);
mgr_busy[i] = dispc_mgr_go_busy(i);
spin_lock(&dss_cache.lock);
......@@ -1288,7 +1288,7 @@ static void dss_apply_irq_handler(void *data, u32 mask)
/* re-read busy flags */
for (i = 0; i < num_mgrs; i++)
mgr_busy[i] = dispc_go_busy(i);
mgr_busy[i] = dispc_mgr_go_busy(i);
/* keep running as long as there are busy managers, so that
* we can collect overlay-applied information */
......@@ -1526,13 +1526,13 @@ static void omap_dss_mgr_get_info(struct omap_overlay_manager *mgr,
static int dss_mgr_enable(struct omap_overlay_manager *mgr)
{
dispc_enable_channel(mgr->id, 1);
dispc_mgr_enable(mgr->id, 1);
return 0;
}
static int dss_mgr_disable(struct omap_overlay_manager *mgr)
{
dispc_enable_channel(mgr->id, 0);
dispc_mgr_enable(mgr->id, 0);
return 0;
}
......
......@@ -309,9 +309,9 @@ static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
dispc_set_lcd_size(dssdev->manager->id, width, height);
dispc_mgr_set_lcd_size(dssdev->manager->id, width, height);
dispc_enable_channel(dssdev->manager->id, true);
dispc_mgr_enable(dssdev->manager->id, true);
rfbi.framedone_callback = callback;
rfbi.framedone_callback_data = data;
......@@ -784,7 +784,7 @@ int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
return -EINVAL;
dss_setup_partial_planes(dssdev, x, y, w, h, true);
dispc_set_lcd_size(dssdev->manager->id, *w, *h);
dispc_mgr_set_lcd_size(dssdev->manager->id, *w, *h);
return 0;
}
......@@ -865,13 +865,13 @@ int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
goto err1;
}
dispc_set_lcd_display_type(dssdev->manager->id,
dispc_mgr_set_lcd_display_type(dssdev->manager->id,
OMAP_DSS_LCD_DISPLAY_TFT);
dispc_set_parallel_interface_mode(dssdev->manager->id,
dispc_mgr_set_parallel_interface_mode(dssdev->manager->id,
OMAP_DSS_PARALLELMODE_RFBI);
dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
dispc_mgr_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
rfbi_configure(dssdev->phy.rfbi.channel,
dssdev->ctrl.pixel_size,
......
......@@ -35,13 +35,13 @@ static struct {
static void sdi_basic_init(struct omap_dss_device *dssdev)
{
dispc_set_parallel_interface_mode(dssdev->manager->id,
dispc_mgr_set_parallel_interface_mode(dssdev->manager->id,
OMAP_DSS_PARALLELMODE_BYPASS);
dispc_set_lcd_display_type(dssdev->manager->id,
dispc_mgr_set_lcd_display_type(dssdev->manager->id,
OMAP_DSS_LCD_DISPLAY_TFT);
dispc_set_tft_data_lines(dssdev->manager->id, 24);
dispc_mgr_set_tft_data_lines(dssdev->manager->id, 24);
dispc_lcd_enable_signal_polarity(1);
}
......@@ -83,7 +83,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
/* 15.5.9.1.2 */
dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF;
dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
dssdev->panel.acbi, dssdev->panel.acb);
r = dss_calc_clock_div(1, t->pixel_clock * 1000,
......@@ -106,13 +106,13 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
}
dispc_set_lcd_timings(dssdev->manager->id, t);
dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
r = dss_set_clock_div(&dss_cinfo);
if (r)
goto err_set_dss_clock_div;
r = dispc_set_clock_div(dssdev->manager->id, &dispc_cinfo);
r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
if (r)
goto err_set_dispc_clock_div;
......
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