Commit 26e942b7 authored by Rajkumar Manoharan's avatar Rajkumar Manoharan Committed by John W. Linville

ath9k_hw: remove MCI_STATE_CONT_* state

Signed-off-by: default avatarRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 6d97be48
......@@ -1191,15 +1191,6 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type)
AR_MCI_RX_REMOTE_SLEEP) ?
MCI_BT_SLEEP : MCI_BT_AWAKE;
break;
case MCI_STATE_CONT_RSSI_POWER:
value = MS(mci->cont_status, AR_MCI_CONT_RSSI_POWER);
break;
case MCI_STATE_CONT_PRIORITY:
value = MS(mci->cont_status, AR_MCI_CONT_RRIORITY);
break;
case MCI_STATE_CONT_TXRX:
value = MS(mci->cont_status, AR_MCI_CONT_TXRX);
break;
case MCI_STATE_SET_BT_SLEEP:
mci->bt_state = MCI_BT_SLEEP;
break;
......
......@@ -195,9 +195,6 @@ enum mci_state_type {
MCI_STATE_SET_BT_CAL,
MCI_STATE_LAST_SCHD_MSG_OFFSET,
MCI_STATE_REMOTE_SLEEP,
MCI_STATE_CONT_RSSI_POWER,
MCI_STATE_CONT_PRIORITY,
MCI_STATE_CONT_TXRX,
MCI_STATE_RESET_REQ_WAKE,
MCI_STATE_SEND_WLAN_COEX_VERSION,
MCI_STATE_SEND_VERSION_QUERY,
......
......@@ -517,22 +517,16 @@ void ath_mci_intr(struct ath_softc *sc)
mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {
int value_dbm = ar9003_mci_state(ah,
MCI_STATE_CONT_RSSI_POWER);
int value_dbm = MS(mci_hw->cont_status,
AR_MCI_CONT_RSSI_POWER);
mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;
if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX))
ath_dbg(common, MCI,
"MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n",
ar9003_mci_state(ah,
MCI_STATE_CONT_PRIORITY),
value_dbm);
else
ath_dbg(common, MCI,
"MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n",
ar9003_mci_state(ah,
MCI_STATE_CONT_PRIORITY),
"MCI CONT_INFO: (%s) pri = %d pwr = %d dBm\n",
MS(mci_hw->cont_status, AR_MCI_CONT_TXRX) ?
"tx" : "rx",
MS(mci_hw->cont_status, AR_MCI_CONT_PRIORITY),
value_dbm);
}
......
......@@ -2098,8 +2098,8 @@ enum {
#define AR_MCI_CONT_STATUS 0x1848
#define AR_MCI_CONT_RSSI_POWER 0x000000FF
#define AR_MCI_CONT_RSSI_POWER_S 0
#define AR_MCI_CONT_RRIORITY 0x0000FF00
#define AR_MCI_CONT_RRIORITY_S 8
#define AR_MCI_CONT_PRIORITY 0x0000FF00
#define AR_MCI_CONT_PRIORITY_S 8
#define AR_MCI_CONT_TXRX 0x00010000
#define AR_MCI_CONT_TXRX_S 16
......
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