Commit 27b500b7 authored by Jesse Zhang's avatar Jesse Zhang Committed by Alex Deucher

drm/amdgpu: remove dead code in atom_get_src_int

Since the range of align is 0~7, the expression is: align = (attr >> 3) & 7.
In the case of ATOM_ARG_IMM, the code cannot reach the default case.
So there is no need for "break".
Signed-off-by: default avatarJesse Zhang <Jesse.Zhang@amd.com>
Suggested-by: default avatarTim Huang <Tim.Huang@amd.com>
Reviewed-by: default avatarTim Huang <Tim.Huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 57a0d65b
...@@ -301,7 +301,7 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, ...@@ -301,7 +301,7 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
(*ptr) += 4; (*ptr) += 4;
if (print) if (print)
DEBUG("IMM 0x%08X\n", val); DEBUG("IMM 0x%08X\n", val);
return val; break;
case ATOM_SRC_WORD0: case ATOM_SRC_WORD0:
case ATOM_SRC_WORD8: case ATOM_SRC_WORD8:
case ATOM_SRC_WORD16: case ATOM_SRC_WORD16:
...@@ -309,7 +309,7 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, ...@@ -309,7 +309,7 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
(*ptr) += 2; (*ptr) += 2;
if (print) if (print)
DEBUG("IMM 0x%04X\n", val); DEBUG("IMM 0x%04X\n", val);
return val; break;
case ATOM_SRC_BYTE0: case ATOM_SRC_BYTE0:
case ATOM_SRC_BYTE8: case ATOM_SRC_BYTE8:
case ATOM_SRC_BYTE16: case ATOM_SRC_BYTE16:
...@@ -318,9 +318,9 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, ...@@ -318,9 +318,9 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
(*ptr)++; (*ptr)++;
if (print) if (print)
DEBUG("IMM 0x%02X\n", val); DEBUG("IMM 0x%02X\n", val);
return val; break;
} }
break; return val;
case ATOM_ARG_PLL: case ATOM_ARG_PLL:
idx = U8(*ptr); idx = U8(*ptr);
(*ptr)++; (*ptr)++;
......
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