Commit 27b54905 authored by Chris Blake's avatar Chris Blake Committed by Sasha Levin

PCI: Mark Atheros AR9485 and QCA9882 to avoid bus reset

[ Upstream commit 9ac0108c ]

Similar to the AR93xx series, the AR94xx and the Qualcomm QCA988x also have
the same quirk for the Bus Reset.

Fixes: c3e59ee4 ("PCI: Mark Atheros AR93xx to avoid bus reset")
Signed-off-by: default avatarChris Blake <chrisrblake93@gmail.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org  # v3.14+
Signed-off-by: default avatarSasha Levin <alexander.levin@verizon.com>
parent b3780073
...@@ -3108,13 +3108,15 @@ static void quirk_no_bus_reset(struct pci_dev *dev) ...@@ -3108,13 +3108,15 @@ static void quirk_no_bus_reset(struct pci_dev *dev)
} }
/* /*
* Atheros AR93xx chips do not behave after a bus reset. The device will * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset.
* throw a Link Down error on AER-capable systems and regardless of AER, * The device will throw a Link Down error on AER-capable systems and
* config space of the device is never accessible again and typically * regardless of AER, config space of the device is never accessible again
* causes the system to hang or reset when access is attempted. * and typically causes the system to hang or reset when access is attempted.
* http://www.spinics.net/lists/linux-pci/msg34797.html * http://www.spinics.net/lists/linux-pci/msg34797.html
*/ */
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
static void quirk_no_pm_reset(struct pci_dev *dev) static void quirk_no_pm_reset(struct pci_dev *dev)
{ {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment