Commit 2804b799 authored by Ezequiel Garcia's avatar Ezequiel Garcia Committed by Sean Paul

dt-bindings: display: rockchip: document VOP gamma LUT address

Add the register specifier description for an
optional gamma LUT address.
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Tested-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarEzequiel Garcia <ezequiel@collabora.com>
Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20191010194351.17940-2-ezequiel@collabora.com
parent 2636a517
...@@ -20,6 +20,10 @@ Required properties: ...@@ -20,6 +20,10 @@ Required properties:
"rockchip,rk3228-vop"; "rockchip,rk3228-vop";
"rockchip,rk3328-vop"; "rockchip,rk3328-vop";
- reg: Must contain one entry corresponding to the base address and length
of the register space. Can optionally contain a second entry
corresponding to the CRTC gamma LUT address.
- interrupts: should contain a list of all VOP IP block interrupts in the - interrupts: should contain a list of all VOP IP block interrupts in the
order: VSYNC, LCD_SYSTEM. The interrupt specifier order: VSYNC, LCD_SYSTEM. The interrupt specifier
format depends on the interrupt controller used. format depends on the interrupt controller used.
...@@ -48,7 +52,7 @@ Example: ...@@ -48,7 +52,7 @@ Example:
SoC specific DT entry: SoC specific DT entry:
vopb: vopb@ff930000 { vopb: vopb@ff930000 {
compatible = "rockchip,rk3288-vop"; compatible = "rockchip,rk3288-vop";
reg = <0xff930000 0x19c>; reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
......
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