Commit 2875125c authored by Tom St Denis's avatar Tom St Denis Committed by Alex Deucher

drm/amd/amdgpu: don't track state in UVD clockgating

There's no need to track CG state anymore.
Signed-off-by: default avatarTom St Denis <tom.stdenis@amd.com>
Reviewed-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7acc83d4
...@@ -959,21 +959,15 @@ static int uvd_v6_0_set_clockgating_state(void *handle, ...@@ -959,21 +959,15 @@ static int uvd_v6_0_set_clockgating_state(void *handle,
enum amd_clockgating_state state) enum amd_clockgating_state state)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
static int curstate = -1;
if (adev->asic_type == CHIP_FIJI ||
adev->asic_type == CHIP_POLARIS10)
uvd_v6_set_bypass_mode(adev, enable);
if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG)) if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG))
return 0; return 0;
if (curstate == state) if (adev->asic_type == CHIP_FIJI ||
return 0; adev->asic_type == CHIP_POLARIS10)
uvd_v6_set_bypass_mode(adev, state == AMD_CG_STATE_GATE ? true : false);
curstate = state; if (state == AMD_CG_STATE_GATE) {
if (enable) {
/* disable HW gating and enable Sw gating */ /* disable HW gating and enable Sw gating */
uvd_v6_0_set_sw_clock_gating(adev); uvd_v6_0_set_sw_clock_gating(adev);
} else { } else {
......
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