Commit 28eedd15 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'samsung-drivers-soc-pm-domains-4.11' of...

Merge tag 'samsung-drivers-soc-pm-domains-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

Pull "soc: samsung: pm_domains for v4.11" from Krzysztof Kozłowski:

Improve the PM domains driver for Exynos by displaying a user-friendly name of
power domain.  Till now, the name of node from DT was used which mostly is just
"power-domain".  We need more than that.

* tag 'samsung-drivers-soc-pm-domains-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: pm_domains: Read domain name from the new label property
  soc: samsung: pm_domains: Remove message about failed memory allocation
  soc: samsung: pm_domains: Remove unused name field
  soc: samsung: pm_domains: Use full names in subdomains registration log
parents 57ac4904 b13b2330
......@@ -13,6 +13,8 @@ Required Properties:
must be 0.
Optional Properties:
- label: Human readable string with domain name. Will be visible in userspace
to let user to distinguish between multiple domains in SoC.
- clocks: List of clock handles. The parent clocks of the input clocks to the
devices in this power domain are set to oscclk before power gating
and restored back after powering on a domain. This is required for
......@@ -39,6 +41,7 @@ Example:
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x10>;
#power-domain-cells = <0>;
label = "LCD0";
};
mfc_pd: power-domain@10044060 {
......@@ -47,6 +50,7 @@ Example:
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>;
clock-names = "oscclk", "clk0";
#power-domain-cells = <0>;
label = "MFC";
};
See Documentation/devicetree/bindings/power/power_domain.txt for description
......
......@@ -35,7 +35,6 @@ struct exynos_pm_domain_config {
*/
struct exynos_pm_domain {
void __iomem *base;
char const *name;
bool is_off;
struct generic_pm_domain pd;
struct clk *oscclk;
......@@ -70,7 +69,7 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
pd->pclk[i] = clk_get_parent(pd->clk[i]);
if (clk_set_parent(pd->clk[i], pd->oscclk))
pr_err("%s: error setting oscclk as parent to clock %d\n",
pd->name, i);
domain->name, i);
}
}
......@@ -101,7 +100,7 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
continue; /* Skip on first power up */
if (clk_set_parent(pd->clk[i], pd->pclk[i]))
pr_err("%s: error setting parent to clock%d\n",
pd->name, i);
domain->name, i);
}
}
......@@ -143,6 +142,15 @@ static const struct of_device_id exynos_pm_domain_of_match[] __initconst = {
{ },
};
static __init const char *exynos_get_domain_name(struct device_node *node)
{
const char *name;
if (of_property_read_string(node, "label", &name) < 0)
name = strrchr(node->full_name, '/') + 1;
return kstrdup_const(name, GFP_KERNEL);
}
static __init int exynos4_pm_init_power_domain(void)
{
struct device_node *np;
......@@ -157,20 +165,16 @@ static __init int exynos4_pm_init_power_domain(void)
pd = kzalloc(sizeof(*pd), GFP_KERNEL);
if (!pd) {
pr_err("%s: failed to allocate memory for domain\n",
__func__);
of_node_put(np);
return -ENOMEM;
}
pd->pd.name = kstrdup_const(strrchr(np->full_name, '/') + 1,
GFP_KERNEL);
pd->pd.name = exynos_get_domain_name(np);
if (!pd->pd.name) {
kfree(pd);
of_node_put(np);
return -ENOMEM;
}
pd->name = pd->pd.name;
pd->base = of_iomap(np, 0);
if (!pd->base) {
pr_warn("%s: failed to map memory\n", __func__);
......@@ -234,10 +238,10 @@ static __init int exynos4_pm_init_power_domain(void)
if (of_genpd_add_subdomain(&parent, &child))
pr_warn("%s failed to add subdomain: %s\n",
parent.np->name, child.np->name);
parent.np->full_name, child.np->full_name);
else
pr_info("%s has as child subdomain: %s.\n",
parent.np->name, child.np->name);
parent.np->full_name, child.np->full_name);
}
return 0;
......
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