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Commit 29139e4b authored by Lespiau, Damien's avatar Lespiau, Damien Committed by Dave Airlie
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drm/i915: Replace DRM_LOG_KMS() by DRM_DEBUG_KMS() 

There are only a few users of the DRM_LOG_KMS() macro. We can simplify
the DRM code a bit by replacing them by DRM_DEBUG_KMS().
Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent c7cc5124
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Showing with 39 additions and 39 deletions
drivers/gpu/drm/i915/dvo_ch7xxx.c
View file @ 29139e4b
...@@ -340,9 +340,9 @@ static void ch7xxx_dump_regs(struct intel_dvo_device *dvo) ...@@ -340,9 +340,9 @@ static void ch7xxx_dump_regs(struct intel_dvo_device *dvo)
for (i = 0; i < CH7xxx_NUM_REGS; i++) { for (i = 0; i < CH7xxx_NUM_REGS; i++) {
uint8_t val; uint8_t val;
if ((i % 8) == 0) if ((i % 8) == 0)
DRM_LOG_KMS("\n %02X: ", i); DRM_DEBUG_KMS("\n %02X: ", i);
ch7xxx_readb(dvo, i, &val); ch7xxx_readb(dvo, i, &val);
DRM_LOG_KMS("%02X ", val); DRM_DEBUG_KMS("%02X ", val);
} }
} }
......
drivers/gpu/drm/i915/dvo_ivch.c
View file @ 29139e4b
...@@ -377,41 +377,41 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo) ...@@ -377,41 +377,41 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo)
uint16_t val; uint16_t val;
ivch_read(dvo, VR00, &val); ivch_read(dvo, VR00, &val);
DRM_LOG_KMS("VR00: 0x%04x\n", val); DRM_DEBUG_KMS("VR00: 0x%04x\n", val);
ivch_read(dvo, VR01, &val); ivch_read(dvo, VR01, &val);
DRM_LOG_KMS("VR01: 0x%04x\n", val); DRM_DEBUG_KMS("VR01: 0x%04x\n", val);
ivch_read(dvo, VR30, &val); ivch_read(dvo, VR30, &val);
DRM_LOG_KMS("VR30: 0x%04x\n", val); DRM_DEBUG_KMS("VR30: 0x%04x\n", val);
ivch_read(dvo, VR40, &val); ivch_read(dvo, VR40, &val);
DRM_LOG_KMS("VR40: 0x%04x\n", val); DRM_DEBUG_KMS("VR40: 0x%04x\n", val);
/* GPIO registers */ /* GPIO registers */
ivch_read(dvo, VR80, &val); ivch_read(dvo, VR80, &val);
DRM_LOG_KMS("VR80: 0x%04x\n", val); DRM_DEBUG_KMS("VR80: 0x%04x\n", val);
ivch_read(dvo, VR81, &val); ivch_read(dvo, VR81, &val);
DRM_LOG_KMS("VR81: 0x%04x\n", val); DRM_DEBUG_KMS("VR81: 0x%04x\n", val);
ivch_read(dvo, VR82, &val); ivch_read(dvo, VR82, &val);
DRM_LOG_KMS("VR82: 0x%04x\n", val); DRM_DEBUG_KMS("VR82: 0x%04x\n", val);
ivch_read(dvo, VR83, &val); ivch_read(dvo, VR83, &val);
DRM_LOG_KMS("VR83: 0x%04x\n", val); DRM_DEBUG_KMS("VR83: 0x%04x\n", val);
ivch_read(dvo, VR84, &val); ivch_read(dvo, VR84, &val);
DRM_LOG_KMS("VR84: 0x%04x\n", val); DRM_DEBUG_KMS("VR84: 0x%04x\n", val);
ivch_read(dvo, VR85, &val); ivch_read(dvo, VR85, &val);
DRM_LOG_KMS("VR85: 0x%04x\n", val); DRM_DEBUG_KMS("VR85: 0x%04x\n", val);
ivch_read(dvo, VR86, &val); ivch_read(dvo, VR86, &val);
DRM_LOG_KMS("VR86: 0x%04x\n", val); DRM_DEBUG_KMS("VR86: 0x%04x\n", val);
ivch_read(dvo, VR87, &val); ivch_read(dvo, VR87, &val);
DRM_LOG_KMS("VR87: 0x%04x\n", val); DRM_DEBUG_KMS("VR87: 0x%04x\n", val);
ivch_read(dvo, VR88, &val); ivch_read(dvo, VR88, &val);
DRM_LOG_KMS("VR88: 0x%04x\n", val); DRM_DEBUG_KMS("VR88: 0x%04x\n", val);
/* Scratch register 0 - AIM Panel type */ /* Scratch register 0 - AIM Panel type */
ivch_read(dvo, VR8E, &val); ivch_read(dvo, VR8E, &val);
DRM_LOG_KMS("VR8E: 0x%04x\n", val); DRM_DEBUG_KMS("VR8E: 0x%04x\n", val);
/* Scratch register 1 - Status register */ /* Scratch register 1 - Status register */
ivch_read(dvo, VR8F, &val); ivch_read(dvo, VR8F, &val);
DRM_LOG_KMS("VR8F: 0x%04x\n", val); DRM_DEBUG_KMS("VR8F: 0x%04x\n", val);
} }
static void ivch_destroy(struct intel_dvo_device *dvo) static void ivch_destroy(struct intel_dvo_device *dvo)
......
drivers/gpu/drm/i915/dvo_ns2501.c
View file @ 29139e4b
...@@ -490,15 +490,15 @@ static void ns2501_dump_regs(struct intel_dvo_device *dvo) ...@@ -490,15 +490,15 @@ static void ns2501_dump_regs(struct intel_dvo_device *dvo)
uint8_t val; uint8_t val;
ns2501_readb(dvo, NS2501_FREQ_LO, &val); ns2501_readb(dvo, NS2501_FREQ_LO, &val);
DRM_LOG_KMS("NS2501_FREQ_LO: 0x%02x\n", val); DRM_DEBUG_KMS("NS2501_FREQ_LO: 0x%02x\n", val);
ns2501_readb(dvo, NS2501_FREQ_HI, &val); ns2501_readb(dvo, NS2501_FREQ_HI, &val);
DRM_LOG_KMS("NS2501_FREQ_HI: 0x%02x\n", val); DRM_DEBUG_KMS("NS2501_FREQ_HI: 0x%02x\n", val);
ns2501_readb(dvo, NS2501_REG8, &val); ns2501_readb(dvo, NS2501_REG8, &val);
DRM_LOG_KMS("NS2501_REG8: 0x%02x\n", val); DRM_DEBUG_KMS("NS2501_REG8: 0x%02x\n", val);
ns2501_readb(dvo, NS2501_REG9, &val); ns2501_readb(dvo, NS2501_REG9, &val);
DRM_LOG_KMS("NS2501_REG9: 0x%02x\n", val); DRM_DEBUG_KMS("NS2501_REG9: 0x%02x\n", val);
ns2501_readb(dvo, NS2501_REGC, &val); ns2501_readb(dvo, NS2501_REGC, &val);
DRM_LOG_KMS("NS2501_REGC: 0x%02x\n", val); DRM_DEBUG_KMS("NS2501_REGC: 0x%02x\n", val);
} }
static void ns2501_destroy(struct intel_dvo_device *dvo) static void ns2501_destroy(struct intel_dvo_device *dvo)
......
drivers/gpu/drm/i915/dvo_sil164.c
View file @ 29139e4b
...@@ -246,15 +246,15 @@ static void sil164_dump_regs(struct intel_dvo_device *dvo) ...@@ -246,15 +246,15 @@ static void sil164_dump_regs(struct intel_dvo_device *dvo)
uint8_t val; uint8_t val;
sil164_readb(dvo, SIL164_FREQ_LO, &val); sil164_readb(dvo, SIL164_FREQ_LO, &val);
DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val); DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
sil164_readb(dvo, SIL164_FREQ_HI, &val); sil164_readb(dvo, SIL164_FREQ_HI, &val);
DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val); DRM_DEBUG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
sil164_readb(dvo, SIL164_REG8, &val); sil164_readb(dvo, SIL164_REG8, &val);
DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val); DRM_DEBUG_KMS("SIL164_REG8: 0x%02x\n", val);
sil164_readb(dvo, SIL164_REG9, &val); sil164_readb(dvo, SIL164_REG9, &val);
DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val); DRM_DEBUG_KMS("SIL164_REG9: 0x%02x\n", val);
sil164_readb(dvo, SIL164_REGC, &val); sil164_readb(dvo, SIL164_REGC, &val);
DRM_LOG_KMS("SIL164_REGC: 0x%02x\n", val); DRM_DEBUG_KMS("SIL164_REGC: 0x%02x\n", val);
} }
static void sil164_destroy(struct intel_dvo_device *dvo) static void sil164_destroy(struct intel_dvo_device *dvo)
......
drivers/gpu/drm/i915/dvo_tfp410.c
View file @ 29139e4b
...@@ -267,33 +267,33 @@ static void tfp410_dump_regs(struct intel_dvo_device *dvo) ...@@ -267,33 +267,33 @@ static void tfp410_dump_regs(struct intel_dvo_device *dvo)
uint8_t val, val2; uint8_t val, val2;
tfp410_readb(dvo, TFP410_REV, &val); tfp410_readb(dvo, TFP410_REV, &val);
DRM_LOG_KMS("TFP410_REV: 0x%02X\n", val); DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val);
tfp410_readb(dvo, TFP410_CTL_1, &val); tfp410_readb(dvo, TFP410_CTL_1, &val);
DRM_LOG_KMS("TFP410_CTL1: 0x%02X\n", val); DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val);
tfp410_readb(dvo, TFP410_CTL_2, &val); tfp410_readb(dvo, TFP410_CTL_2, &val);
DRM_LOG_KMS("TFP410_CTL2: 0x%02X\n", val); DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val);
tfp410_readb(dvo, TFP410_CTL_3, &val); tfp410_readb(dvo, TFP410_CTL_3, &val);
DRM_LOG_KMS("TFP410_CTL3: 0x%02X\n", val); DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val);
tfp410_readb(dvo, TFP410_USERCFG, &val); tfp410_readb(dvo, TFP410_USERCFG, &val);
DRM_LOG_KMS("TFP410_USERCFG: 0x%02X\n", val); DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val);
tfp410_readb(dvo, TFP410_DE_DLY, &val); tfp410_readb(dvo, TFP410_DE_DLY, &val);
DRM_LOG_KMS("TFP410_DE_DLY: 0x%02X\n", val); DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
tfp410_readb(dvo, TFP410_DE_CTL, &val); tfp410_readb(dvo, TFP410_DE_CTL, &val);
DRM_LOG_KMS("TFP410_DE_CTL: 0x%02X\n", val); DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
tfp410_readb(dvo, TFP410_DE_TOP, &val); tfp410_readb(dvo, TFP410_DE_TOP, &val);
DRM_LOG_KMS("TFP410_DE_TOP: 0x%02X\n", val); DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
tfp410_readb(dvo, TFP410_DE_CNT_LO, &val); tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);
tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2); tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2);
DRM_LOG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val); DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
tfp410_readb(dvo, TFP410_DE_LIN_LO, &val); tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);
tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2); tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2);
DRM_LOG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val); DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
tfp410_readb(dvo, TFP410_H_RES_LO, &val); tfp410_readb(dvo, TFP410_H_RES_LO, &val);
tfp410_readb(dvo, TFP410_H_RES_HI, &val2); tfp410_readb(dvo, TFP410_H_RES_HI, &val2);
DRM_LOG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val); DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
tfp410_readb(dvo, TFP410_V_RES_LO, &val); tfp410_readb(dvo, TFP410_V_RES_LO, &val);
tfp410_readb(dvo, TFP410_V_RES_HI, &val2); tfp410_readb(dvo, TFP410_V_RES_HI, &val2);
DRM_LOG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val); DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
} }
static void tfp410_destroy(struct intel_dvo_device *dvo) static void tfp410_destroy(struct intel_dvo_device *dvo)
......
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