Commit 2aaaddff authored by Maxime Ripard's avatar Maxime Ripard Committed by Linus Walleij

pinctrl: sunxi: Read register before writing to it in irq_set_type

The current irq_set_type code doesn't read the current register value
before writing to it, leading to the older programmed values being
overwritten and everything but the latest value being reset.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
parent c095ba72
...@@ -526,6 +526,7 @@ static int sunxi_pinctrl_irq_set_type(struct irq_data *d, ...@@ -526,6 +526,7 @@ static int sunxi_pinctrl_irq_set_type(struct irq_data *d,
struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d);
u32 reg = sunxi_irq_cfg_reg(d->hwirq); u32 reg = sunxi_irq_cfg_reg(d->hwirq);
u8 index = sunxi_irq_cfg_offset(d->hwirq); u8 index = sunxi_irq_cfg_offset(d->hwirq);
u32 regval;
u8 mode; u8 mode;
switch (type) { switch (type) {
...@@ -548,7 +549,9 @@ static int sunxi_pinctrl_irq_set_type(struct irq_data *d, ...@@ -548,7 +549,9 @@ static int sunxi_pinctrl_irq_set_type(struct irq_data *d,
return -EINVAL; return -EINVAL;
} }
writel((mode & IRQ_CFG_IRQ_MASK) << index, pctl->membase + reg); regval = readl(pctl->membase + reg);
regval &= ~IRQ_CFG_IRQ_MASK;
writel(regval | (mode << index), pctl->membase + reg);
return 0; return 0;
} }
......
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