Commit 2c0136db authored by Russell King's avatar Russell King

ARM: SMP: consolidate trace_hardirqs_off() into common SMP code

All platforms call trace_hardirqs_off() in their secondary startup code,
so move this into the core SMP code - it doesn't need to be in the
per-platform code.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 05c74a6c
...@@ -317,6 +317,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) ...@@ -317,6 +317,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
cpu_init(); cpu_init();
preempt_disable(); preempt_disable();
trace_hardirqs_off();
/* /*
* Give the platform a chance to do its own initialisation. * Give the platform a chance to do its own initialisation.
......
...@@ -32,8 +32,6 @@ static DEFINE_SPINLOCK(boot_lock); ...@@ -32,8 +32,6 @@ static DEFINE_SPINLOCK(boot_lock);
void __cpuinit platform_secondary_init(unsigned int cpu) void __cpuinit platform_secondary_init(unsigned int cpu)
{ {
trace_hardirqs_off();
/* /*
* If any interrupts are already enabled for the primary * If any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled * core (e.g. timer irq), then they will not have been enabled
......
...@@ -53,8 +53,6 @@ static DEFINE_SPINLOCK(boot_lock); ...@@ -53,8 +53,6 @@ static DEFINE_SPINLOCK(boot_lock);
void __cpuinit platform_secondary_init(unsigned int cpu) void __cpuinit platform_secondary_init(unsigned int cpu)
{ {
trace_hardirqs_off();
/* /*
* if any interrupts are already enabled for the primary * if any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled * core (e.g. timer irq), then they will not have been enabled
......
...@@ -46,8 +46,6 @@ static DEFINE_SPINLOCK(boot_lock); ...@@ -46,8 +46,6 @@ static DEFINE_SPINLOCK(boot_lock);
void __cpuinit platform_secondary_init(unsigned int cpu) void __cpuinit platform_secondary_init(unsigned int cpu)
{ {
trace_hardirqs_off();
/* /*
* if any interrupts are already enabled for the primary * if any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled * core (e.g. timer irq), then they will not have been enabled
......
...@@ -40,8 +40,6 @@ static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE); ...@@ -40,8 +40,6 @@ static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
void __cpuinit platform_secondary_init(unsigned int cpu) void __cpuinit platform_secondary_init(unsigned int cpu)
{ {
trace_hardirqs_off();
/* /*
* if any interrupts are already enabled for the primary * if any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled * core (e.g. timer irq), then they will not have been enabled
......
...@@ -31,8 +31,6 @@ static DEFINE_SPINLOCK(boot_lock); ...@@ -31,8 +31,6 @@ static DEFINE_SPINLOCK(boot_lock);
void __cpuinit platform_secondary_init(unsigned int cpu) void __cpuinit platform_secondary_init(unsigned int cpu)
{ {
trace_hardirqs_off();
/* /*
* if any interrupts are already enabled for the primary * if any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled * core (e.g. timer irq), then they will not have been enabled
......
...@@ -43,8 +43,6 @@ static DEFINE_SPINLOCK(boot_lock); ...@@ -43,8 +43,6 @@ static DEFINE_SPINLOCK(boot_lock);
void __cpuinit platform_secondary_init(unsigned int cpu) void __cpuinit platform_secondary_init(unsigned int cpu)
{ {
trace_hardirqs_off();
/* /*
* if any interrupts are already enabled for the primary * if any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled * core (e.g. timer irq), then they will not have been enabled
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment