Commit 2c405689 authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Shawn Guo

ARM: dts: imx27-phytec-phycore-som: Enable SSI1

This patch adds pin group for Synchronous Serial Interface 1 (SSI1)
for PCM-038 module and enables this interface. This change do nothing
at the current stage but helps to continue develop sound support.
Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent e8e8d621
...@@ -251,6 +251,15 @@ MX27_PAD_NFWE_B__NFWE_B 0x0 ...@@ -251,6 +251,15 @@ MX27_PAD_NFWE_B__NFWE_B 0x0
>; >;
}; };
pinctrl_ssi1: ssi1grp {
fsl,pins = <
MX27_PAD_SSI1_FS__SSI1_FS 0x0
MX27_PAD_SSI1_RXDAT__SSI1_RXDAT 0x0
MX27_PAD_SSI1_TXDAT__SSI1_TXDAT 0x0
MX27_PAD_SSI1_CLK__SSI1_CLK 0x0
>;
};
pinctrl_usbotg: usbotggrp { pinctrl_usbotg: usbotggrp {
fsl,pins = < fsl,pins = <
MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0 MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
...@@ -279,6 +288,13 @@ &nfc { ...@@ -279,6 +288,13 @@ &nfc {
status = "okay"; status = "okay";
}; };
&ssi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssi1>;
fsl,mode = "i2s-slave";
status = "okay";
};
&usbotg { &usbotg {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>; pinctrl-0 = <&pinctrl_usbotg>;
......
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