Commit 2c53c3dd authored by Robert Richter's avatar Robert Richter Committed by Ingo Molnar

perf/x86/amd: Rework northbridge event constraints handler

Code simplification. No functional changes.
Signed-off-by: default avatarRobert Richter <rric@kernel.org>
Signed-off-by: default avatarJacob Shin <jacob.shin@amd.com>
Acked-by: default avatarStephane Eranian <eranian@google.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Robert Richter <rric@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1360171589-6381-2-git-send-email-jacob.shin@amd.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent f2b4367a
...@@ -256,9 +256,8 @@ amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event) ...@@ -256,9 +256,8 @@ amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
{ {
struct hw_perf_event *hwc = &event->hw; struct hw_perf_event *hwc = &event->hw;
struct amd_nb *nb = cpuc->amd_nb; struct amd_nb *nb = cpuc->amd_nb;
struct perf_event *old = NULL; struct perf_event *old;
int max = x86_pmu.num_counters; int idx, new = -1;
int i, j, k = -1;
/* /*
* if not NB event or no NB, then no constraints * if not NB event or no NB, then no constraints
...@@ -276,48 +275,33 @@ amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event) ...@@ -276,48 +275,33 @@ amd_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
* because of successive calls to x86_schedule_events() from * because of successive calls to x86_schedule_events() from
* hw_perf_group_sched_in() without hw_perf_enable() * hw_perf_group_sched_in() without hw_perf_enable()
*/ */
for (i = 0; i < max; i++) { for (idx = 0; idx < x86_pmu.num_counters; idx++) {
/* if (new == -1 || hwc->idx == idx)
* keep track of first free slot /* assign free slot, prefer hwc->idx */
*/ old = cmpxchg(nb->owners + idx, NULL, event);
if (k == -1 && !nb->owners[i]) else if (nb->owners[idx] == event)
k = i; /* event already present */
old = event;
else
continue;
if (old && old != event)
continue;
/* reassign to this slot */
if (new != -1)
cmpxchg(nb->owners + new, event, NULL);
new = idx;
/* already present, reuse */ /* already present, reuse */
if (nb->owners[i] == event) if (old == event)
goto done;
}
/*
* not present, so grab a new slot
* starting either at:
*/
if (hwc->idx != -1) {
/* previous assignment */
i = hwc->idx;
} else if (k != -1) {
/* start from free slot found */
i = k;
} else {
/*
* event not found, no slot found in
* first pass, try again from the
* beginning
*/
i = 0;
}
j = i;
do {
old = cmpxchg(nb->owners+i, NULL, event);
if (!old)
break; break;
if (++i == max) }
i = 0;
} while (i != j); if (new == -1)
done: return &emptyconstraint;
if (!old)
return &nb->event_constraints[i]; return &nb->event_constraints[new];
return &emptyconstraint;
} }
static struct amd_nb *amd_alloc_nb(int cpu) static struct amd_nb *amd_alloc_nb(int cpu)
......
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