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Commit 2cf4726c authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'ux500-pins-for-arm-soc' of... 

Merge tag 'ux500-pins-for-arm-soc' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers

From Linus Walleij <linus.walleij@linaro.org>:
Ux500 pinctrl table update for v3.8, basically accumulated
updates to pin muxing and biasing from internal deployment
and regression testing for power performance.

* tag 'ux500-pins-for-arm-soc' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: fixup magnetometer pins
  ARM: ux500: add STM pin configuration
  ARM: ux500: 8500: add pinctrl support for uart1 and uart2
  ARM: ux500: cosmetic fixups for uart0
  ARM: ux500: 8500: define SDI sleep states
  ARM: ux500: 8500: update SKE keypad pinctrl table
  ARM: ux500: delete duplicate macro
  ARM: ux500: 8500: add IDLE pin configuration for SPI
  ARM: ux500: 8500: register LCD VSI pinctrl table
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 9628d859 d792aebf
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arch/arm/mach-ux500/board-mop500-pins.c
View file @ 2cf4726c
......@@ -34,8 +34,6 @@ BIAS(in_nopull, PIN_INPUT_NOPULL);
BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);
BIAS(in_pu, PIN_INPUT_PULLUP);
BIAS(in_pd, PIN_INPUT_PULLDOWN);
BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);
BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);
BIAS(out_hi, PIN_OUTPUT_HIGH);
BIAS(out_lo, PIN_OUTPUT_LOW);
BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
......@@ -47,14 +45,36 @@ BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SL
BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
/* Sleep modes */
BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE);
BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE);
BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|
PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP|
PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|
PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(out_lo_wkup_pdis, PIN_SLPM_OUTPUT_LOW|
PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
BIAS(in_wkup_pdis_en, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
PIN_SLPM_PDIS_ENABLED);
BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
PIN_SLPM_PDIS_DISABLED);
BIAS(out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|
PIN_SLPM_PDIS_DISABLED);
BIAS(out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|
PIN_SLPM_PDIS_DISABLED);
/* We use these to define hog settings that are always done on boot */
#define DB8500_MUX_HOG(group,func) \
......@@ -70,13 +90,16 @@ BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_NOPULL|PIN_S
PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
#define DB8500_PIN(pin,conf,dev) \
PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
#define DB8500_PIN_SLEEP(pin, conf, dev) \
PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
#define DB8500_PIN_IDLE(pin, conf, dev) \
PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_IDLE, "pinctrl-db8500", \
pin, conf)
#define DB8500_PIN_SLEEP(pin,conf,dev) \
#define DB8500_PIN_SLEEP(pin, conf, dev) \
PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
pin, conf)
#define DB8500_MUX_STATE(group, func, dev, state) \
PIN_MAP_MUX_GROUP(dev, state, "pinctrl-db8500", group, func)
#define DB8500_PIN_STATE(pin, conf, dev, state) \
PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-db8500", pin, conf)
/* Pin control settings */
static struct pinctrl_map __initdata mop500_family_pinmap[] = {
......@@ -113,7 +136,7 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
* UART0, we do not mux in u0 here.
* uart-0 pins gpio configuration should be kept intact to prevent
* a glitch in tx line when the tty dev is opened. Later these pins
* are configured to uart mop500_pins_uart0
* are configured by uart driver
*/
DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
......@@ -124,12 +147,13 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
* TODO: is this used on U8500 variants and Snowball really?
* The setting on GPIO31 conflicts with magnetometer use on hrefv60
*/
DB8500_MUX_HOG("u2rxtx_c_1", "u2"),
DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),
DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */
DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */
DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */
DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */
/* default state for UART2 */
DB8500_MUX("u2rxtx_c_1", "u2", "uart2"),
DB8500_PIN("GPIO29_W2", in_pu, "uart2"), /* RXD */
DB8500_PIN("GPIO30_W3", out_hi, "uart2"), /* TXD */
/* Sleep state for UART2 */
DB8500_PIN_SLEEP("GPIO29_W2", in_wkup_pdis, "uart2"),
DB8500_PIN_SLEEP("GPIO30_W3", out_wkup_pdis, "uart2"),
/*
* The following pin sets were known as "runtime pins" before being
* converted to the pinctrl model. Here we model them as "default"
......@@ -141,11 +165,18 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
/* UART0 sleep state */
/* Sleep state for UART0 */
DB8500_PIN_SLEEP("GPIO0_AJ5", slpm_in_wkup_pdis, "uart0"),
DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"),
DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"),
DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"),
/* Mux in UART1 after initialization */
DB8500_MUX("u1rxtx_a_1", "u1", "uart1"),
DB8500_PIN("GPIO4_AH6", in_pu, "uart1"), /* RXD */
DB8500_PIN("GPIO5_AG6", out_hi, "uart1"), /* TXD */
/* Sleep state for UART1 */
DB8500_PIN_SLEEP("GPIO4_AH6", slpm_in_wkup_pdis, "uart1"),
DB8500_PIN_SLEEP("GPIO5_AG6", slpm_out_wkup_pdis, "uart1"),
/* MSP1 for ALSA codec */
DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
......@@ -162,7 +193,10 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
/* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"),
DB8500_MUX("lcdvsi1_a_1", "lcd", "0-0070"),
DB8500_PIN("GPIO69_E2", in_pu, "0-0070"),
/* LCD VSI1 sleep state */
DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"),
/* Mux in i2c0 block, default state */
DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
/* i2c0 sleep state */
......@@ -195,6 +229,18 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
/* SDI0 sleep state */
DB8500_PIN_SLEEP("GPIO18_AC2", slpm_out_hi_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO19_AC1", slpm_out_hi_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO20_AB4", slpm_out_hi_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO22_AA3", slpm_in_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO23_AA4", slpm_out_lo_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO24_AB2", slpm_in_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO25_Y4", slpm_in_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO26_Y2", slpm_in_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO27_AA2", slpm_in_wkup_pdis, "sdi0"),
DB8500_PIN_SLEEP("GPIO28_AA1", slpm_in_wkup_pdis, "sdi0"),
/* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
......@@ -204,6 +250,15 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
/* SDI1 sleep state */
DB8500_PIN_SLEEP("GPIO208_AH16", slpm_out_lo_wkup_pdis, "sdi1"), /* CLK */
DB8500_PIN_SLEEP("GPIO209_AG15", slpm_in_wkup_pdis, "sdi1"), /* FBCLK */
DB8500_PIN_SLEEP("GPIO210_AJ15", slpm_in_wkup_pdis, "sdi1"), /* CMD */
DB8500_PIN_SLEEP("GPIO211_AG14", slpm_in_wkup_pdis, "sdi1"), /* DAT0 */
DB8500_PIN_SLEEP("GPIO212_AF13", slpm_in_wkup_pdis, "sdi1"), /* DAT1 */
DB8500_PIN_SLEEP("GPIO213_AG13", slpm_in_wkup_pdis, "sdi1"), /* DAT2 */
DB8500_PIN_SLEEP("GPIO214_AH15", slpm_in_wkup_pdis, "sdi1"), /* DAT3 */
/* Mux in SDI2 (here called MC2) used for for PoP eMMC */
DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
......@@ -217,6 +272,19 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
/* SDI2 sleep state */
DB8500_PIN_SLEEP("GPIO128_A5", out_lo_wkup_pdis, "sdi2"), /* CLK */
DB8500_PIN_SLEEP("GPIO129_B4", in_wkup_pdis_en, "sdi2"), /* CMD */
DB8500_PIN_SLEEP("GPIO130_C8", in_wkup_pdis_en, "sdi2"), /* FBCLK */
DB8500_PIN_SLEEP("GPIO131_A12", in_wkup_pdis, "sdi2"), /* DAT0 */
DB8500_PIN_SLEEP("GPIO132_C10", in_wkup_pdis, "sdi2"), /* DAT1 */
DB8500_PIN_SLEEP("GPIO133_B10", in_wkup_pdis, "sdi2"), /* DAT2 */
DB8500_PIN_SLEEP("GPIO134_B9", in_wkup_pdis, "sdi2"), /* DAT3 */
DB8500_PIN_SLEEP("GPIO135_A9", in_wkup_pdis, "sdi2"), /* DAT4 */
DB8500_PIN_SLEEP("GPIO136_C7", in_wkup_pdis, "sdi2"), /* DAT5 */
DB8500_PIN_SLEEP("GPIO137_A7", in_wkup_pdis, "sdi2"), /* DAT6 */
DB8500_PIN_SLEEP("GPIO138_C5", in_wkup_pdis, "sdi2"), /* DAT7 */
/* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
......@@ -230,6 +298,19 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
/*SDI4 sleep state */
DB8500_PIN_SLEEP("GPIO197_AH24", slpm_in_wkup_pdis, "sdi4"), /* DAT3 */
DB8500_PIN_SLEEP("GPIO198_AG25", slpm_in_wkup_pdis, "sdi4"), /* DAT2 */
DB8500_PIN_SLEEP("GPIO199_AH23", slpm_in_wkup_pdis, "sdi4"), /* DAT1 */
DB8500_PIN_SLEEP("GPIO200_AH26", slpm_in_wkup_pdis, "sdi4"), /* DAT0 */
DB8500_PIN_SLEEP("GPIO201_AF24", slpm_in_wkup_pdis, "sdi4"), /* CMD */
DB8500_PIN_SLEEP("GPIO202_AF25", slpm_in_wkup_pdis, "sdi4"), /* FBCLK */
DB8500_PIN_SLEEP("GPIO203_AE23", slpm_out_lo_wkup_pdis, "sdi4"), /* CLK */
DB8500_PIN_SLEEP("GPIO204_AF23", slpm_in_wkup_pdis, "sdi4"), /* DAT7 */
DB8500_PIN_SLEEP("GPIO205_AG23", slpm_in_wkup_pdis, "sdi4"), /* DAT6 */
DB8500_PIN_SLEEP("GPIO206_AG24", slpm_in_wkup_pdis, "sdi4"), /* DAT5 */
DB8500_PIN_SLEEP("GPIO207_AJ23", slpm_in_wkup_pdis, "sdi4"), /* DAT4 */
/* Mux in USB pins, drive STP high */
DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
......@@ -239,10 +320,232 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
/* SPI2 idle state */
DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
/* SPI2 sleep state */
DB8500_PIN_SLEEP("GPIO216_AG12", slpm_in_wkup_pdis, "spi2"), /* FRM */
DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
/* ske default state */
DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
DB8500_PIN("GPIO153_B17", in_pd, "nmk-ske-keypad"), /* I7 */
DB8500_PIN("GPIO154_C16", in_pd, "nmk-ske-keypad"), /* I6 */
DB8500_PIN("GPIO155_C19", in_pd, "nmk-ske-keypad"), /* I5 */
DB8500_PIN("GPIO156_C17", in_pd, "nmk-ske-keypad"), /* I4 */
DB8500_PIN("GPIO161_D21", in_pd, "nmk-ske-keypad"), /* I3 */
DB8500_PIN("GPIO162_D20", in_pd, "nmk-ske-keypad"), /* I2 */
DB8500_PIN("GPIO163_C20", in_pd, "nmk-ske-keypad"), /* I1 */
DB8500_PIN("GPIO164_B21", in_pd, "nmk-ske-keypad"), /* I0 */
DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */
DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */
DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */
DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */
DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */
DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */
DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */
DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */
/* ske sleep state */
DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */
DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */
DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */
DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */
DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */
DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */
DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */
DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */
DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */
DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */
DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */
DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */
DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */
DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
/* STM APE pins states */
DB8500_MUX_STATE("stmape_c_1", "stmape",
"stm", "ape_mipi34"),
DB8500_PIN_STATE("GPIO70_G5", in_nopull,
"stm", "ape_mipi34"), /* clk */
DB8500_PIN_STATE("GPIO71_G4", in_nopull,
"stm", "ape_mipi34"), /* dat3 */
DB8500_PIN_STATE("GPIO72_H4", in_nopull,
"stm", "ape_mipi34"), /* dat2 */
DB8500_PIN_STATE("GPIO73_H3", in_nopull,
"stm", "ape_mipi34"), /* dat1 */
DB8500_PIN_STATE("GPIO74_J3", in_nopull,
"stm", "ape_mipi34"), /* dat0 */
DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis,
"stm", "ape_mipi34_sleep"), /* clk */
DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis,
"stm", "ape_mipi34_sleep"), /* dat3 */
DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis,
"stm", "ape_mipi34_sleep"), /* dat2 */
DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis,
"stm", "ape_mipi34_sleep"), /* dat1 */
DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis,
"stm", "ape_mipi34_sleep"), /* dat0 */
DB8500_MUX_STATE("stmape_oc1_1", "stmape",
"stm", "ape_microsd"),
DB8500_PIN_STATE("GPIO23_AA4", in_nopull,
"stm", "ape_microsd"), /* clk */
DB8500_PIN_STATE("GPIO25_Y4", in_nopull,
"stm", "ape_microsd"), /* dat0 */
DB8500_PIN_STATE("GPIO26_Y2", in_nopull,
"stm", "ape_microsd"), /* dat1 */
DB8500_PIN_STATE("GPIO27_AA2", in_nopull,
"stm", "ape_microsd"), /* dat2 */
DB8500_PIN_STATE("GPIO28_AA1", in_nopull,
"stm", "ape_microsd"), /* dat3 */
DB8500_PIN_STATE("GPIO23_AA4", slpm_out_lo_wkup_pdis,
"stm", "ape_microsd_sleep"), /* clk */
DB8500_PIN_STATE("GPIO25_Y4", slpm_in_wkup_pdis,
"stm", "ape_microsd_sleep"), /* dat0 */
DB8500_PIN_STATE("GPIO26_Y2", slpm_in_wkup_pdis,
"stm", "ape_microsd_sleep"), /* dat1 */
DB8500_PIN_STATE("GPIO27_AA2", slpm_in_wkup_pdis,
"stm", "ape_microsd_sleep"), /* dat2 */
DB8500_PIN_STATE("GPIO28_AA1", slpm_in_wkup_pdis,
"stm", "ape_microsd_sleep"), /* dat3 */
/* STM Modem pins states */
DB8500_MUX_STATE("stmmod_oc3_2", "stmmod",
"stm", "mod_mipi34"),
DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod",
"stm", "mod_mipi34"),
DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod",
"stm", "mod_mipi34"),
DB8500_PIN_STATE("GPIO70_G5", in_nopull,
"stm", "mod_mipi34"), /* clk */
DB8500_PIN_STATE("GPIO71_G4", in_nopull,
"stm", "mod_mipi34"), /* dat3 */
DB8500_PIN_STATE("GPIO72_H4", in_nopull,
"stm", "mod_mipi34"), /* dat2 */
DB8500_PIN_STATE("GPIO73_H3", in_nopull,
"stm", "mod_mipi34"), /* dat1 */
DB8500_PIN_STATE("GPIO74_J3", in_nopull,
"stm", "mod_mipi34"), /* dat0 */
DB8500_PIN_STATE("GPIO75_H2", in_pu,
"stm", "mod_mipi34"), /* uartmod rx */
DB8500_PIN_STATE("GPIO76_J2", out_lo,
"stm", "mod_mipi34"), /* uartmod tx */
DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis,
"stm", "mod_mipi34_sleep"), /* clk */
DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis,
"stm", "mod_mipi34_sleep"), /* dat3 */
DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis,
"stm", "mod_mipi34_sleep"), /* dat2 */
DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis,
"stm", "mod_mipi34_sleep"), /* dat1 */
DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis,
"stm", "mod_mipi34_sleep"), /* dat0 */
DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis,
"stm", "mod_mipi34_sleep"), /* uartmod rx */
DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis,
"stm", "mod_mipi34_sleep"), /* uartmod tx */
DB8500_MUX_STATE("stmmod_b_1", "stmmod",
"stm", "mod_microsd"),
DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod",
"stm", "mod_microsd"),
DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod",
"stm", "mod_microsd"),
DB8500_PIN_STATE("GPIO23_AA4", in_nopull,
"stm", "mod_microsd"), /* clk */
DB8500_PIN_STATE("GPIO25_Y4", in_nopull,
"stm", "mod_microsd"), /* dat0 */
DB8500_PIN_STATE("GPIO26_Y2", in_nopull,
"stm", "mod_microsd"), /* dat1 */
DB8500_PIN_STATE("GPIO27_AA2", in_nopull,
"stm", "mod_microsd"), /* dat2 */
DB8500_PIN_STATE("GPIO28_AA1", in_nopull,
"stm", "mod_microsd"), /* dat3 */
DB8500_PIN_STATE("GPIO75_H2", in_pu,
"stm", "mod_microsd"), /* uartmod rx */
DB8500_PIN_STATE("GPIO76_J2", out_lo,
"stm", "mod_microsd"), /* uartmod tx */
DB8500_PIN_STATE("GPIO23_AA4", slpm_out_lo_wkup_pdis,
"stm", "mod_microsd_sleep"), /* clk */
DB8500_PIN_STATE("GPIO25_Y4", slpm_in_wkup_pdis,
"stm", "mod_microsd_sleep"), /* dat0 */
DB8500_PIN_STATE("GPIO26_Y2", slpm_in_wkup_pdis,
"stm", "mod_microsd_sleep"), /* dat1 */
DB8500_PIN_STATE("GPIO27_AA2", slpm_in_wkup_pdis,
"stm", "mod_microsd_sleep"), /* dat2 */
DB8500_PIN_STATE("GPIO28_AA1", slpm_in_wkup_pdis,
"stm", "mod_microsd_sleep"), /* dat3 */
DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis,
"stm", "mod_microsd_sleep"), /* uartmod rx */
DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis,
"stm", "mod_microsd_sleep"), /* uartmod tx */
/* STM dual Modem/APE pins state */
DB8500_MUX_STATE("stmmod_oc3_2", "stmmod",
"stm", "mod_mipi34_ape_mipi60"),
DB8500_MUX_STATE("stmape_c_2", "stmape",
"stm", "mod_mipi34_ape_mipi60"),
DB8500_MUX_STATE("uartmodrx_oc3_1", "uartmod",
"stm", "mod_mipi34_ape_mipi60"),
DB8500_MUX_STATE("uartmodtx_oc3_1", "uartmod",
"stm", "mod_mipi34_ape_mipi60"),
DB8500_PIN_STATE("GPIO70_G5", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* clk */
DB8500_PIN_STATE("GPIO71_G4", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* dat3 */
DB8500_PIN_STATE("GPIO72_H4", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* dat2 */
DB8500_PIN_STATE("GPIO73_H3", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* dat1 */
DB8500_PIN_STATE("GPIO74_J3", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* dat0 */
DB8500_PIN_STATE("GPIO75_H2", in_pu,
"stm", "mod_mipi34_ape_mipi60"), /* uartmod rx */
DB8500_PIN_STATE("GPIO76_J2", out_lo,
"stm", "mod_mipi34_ape_mipi60"), /* uartmod tx */
DB8500_PIN_STATE("GPIO155_C19", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* clk */
DB8500_PIN_STATE("GPIO156_C17", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* dat3 */
DB8500_PIN_STATE("GPIO157_A18", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* dat2 */
DB8500_PIN_STATE("GPIO158_C18", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* dat1 */
DB8500_PIN_STATE("GPIO159_B19", in_nopull,
"stm", "mod_mipi34_ape_mipi60"), /* dat0 */
DB8500_PIN_STATE("GPIO70_G5", slpm_out_lo_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* clk */
DB8500_PIN_STATE("GPIO71_G4", slpm_out_lo_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* dat3 */
DB8500_PIN_STATE("GPIO72_H4", slpm_out_lo_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* dat2 */
DB8500_PIN_STATE("GPIO73_H3", slpm_out_lo_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* dat1 */
DB8500_PIN_STATE("GPIO74_J3", slpm_out_lo_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* dat0 */
DB8500_PIN_STATE("GPIO75_H2", slpm_in_wkup_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* uartmod rx */
DB8500_PIN_STATE("GPIO76_J2", slpm_out_lo_wkup_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* uartmod tx */
DB8500_PIN_STATE("GPIO155_C19", slpm_in_wkup_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* clk */
DB8500_PIN_STATE("GPIO156_C17", slpm_in_wkup_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* dat3 */
DB8500_PIN_STATE("GPIO157_A18", slpm_in_wkup_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* dat2 */
DB8500_PIN_STATE("GPIO158_C18", slpm_in_wkup_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* dat1 */
DB8500_PIN_STATE("GPIO159_B19", slpm_in_wkup_pdis,
"stm", "mod_mipi34_ape_mipi60_sleep"), /* dat0 */
};
/*
......@@ -268,32 +571,48 @@ static struct pinctrl_map __initdata mop500_pinmap[] = {
DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
/* Mux in UART1 and set the pull-ups */
DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
/*
* Runtime stuff: make it possible to mux in the SKE keypad
* and bias the pins
*/
DB8500_MUX("kp_a_2", "kp", "ske"),
DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
/* ske default state */
DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
DB8500_PIN("GPIO153_B17", in_pu, "nmk-ske-keypad"), /* I7 */
DB8500_PIN("GPIO154_C16", in_pu, "nmk-ske-keypad"), /* I6 */
DB8500_PIN("GPIO155_C19", in_pu, "nmk-ske-keypad"), /* I5 */
DB8500_PIN("GPIO156_C17", in_pu, "nmk-ske-keypad"), /* I4 */
DB8500_PIN("GPIO161_D21", in_pu, "nmk-ske-keypad"), /* I3 */
DB8500_PIN("GPIO162_D20", in_pu, "nmk-ske-keypad"), /* I2 */
DB8500_PIN("GPIO163_C20", in_pu, "nmk-ske-keypad"), /* I1 */
DB8500_PIN("GPIO164_B21", in_pu, "nmk-ske-keypad"), /* I0 */
DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */
DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */
DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */
DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */
DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */
DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */
DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */
DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */
/* ske sleep state */
DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */
DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */
DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */
DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */
DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */
DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */
DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */
DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */
DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */
DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */
DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */
DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */
DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */
DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
/* Mux in and drive the SDI0 DAT31DIR line high at runtime */
DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
......@@ -396,28 +715,6 @@ static struct pinctrl_map __initdata hrefv60_pinmap[] = {
DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
/*
* Make it possible to mux in the SKE keypad and bias the pins
* FIXME: what's the point with this on HREFv60? KP/SKE is already
* muxed in at another place! Enabling this will bork.
*/
DB8500_MUX("kp_a_2", "kp", "ske"),
DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
};
static struct pinctrl_map __initdata u9500_pinmap[] = {
......
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