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Commit 2d2474a1 authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux 

Pull thermal managament updates from Zhang Rui:

 - Enhance thermal "userspace" governor to export the reason when a
   thermal event is triggered and delivered to user space. From Srinivas
   Pandruvada

 - Introduce a single TSENS thermal driver for the different versions of
   the TSENS IP that exist, on different qcom msm/apq SoCs'. Support for
   msm8916, msm8960, msm8974 and msm8996 families is also added. From
   Rajendra Nayak

 - Introduce hardware-tracked trip points support to the device tree
   thermal sensor framework. The framework supports an arbitrary number
   of trip points. Whenever the current temperature is changed, the trip
   points immediately below and above the current temperature are found,
   driver callback is invoked to program the hardware to get notified
   when either of the two trip points are triggered. Hardware-tracked
   trip points support for rockchip thermal driver is also added at the
   same time. From Sascha Hauer, Caesar Wang

 - Introduce a new thermal driver, which enables TMU (Thermal Monitor
   Unit) on QorIQ platform. From Jia Hongtao

 - Introduce a new thermal driver for Maxim MAX77620. From Laxman
   Dewangan

 - Introduce a new thermal driver for Intel platforms using WhiskeyCove
   PMIC. From Bin Gao

 - Add mt2701 chip support to MTK thermal driver. From Dawei Chien

 - Enhance Tegra thermal driver to enable soctherm node and set
   "critical", "hot" trips, for Tegra124, Tegra132, Tegra210. From Wei
   Ni

 - Add resume support for tango thermal driver. From Marc Gonzalez

 - several small fixes and improvements for rockchip, qcom, imx, rcar,
   mtk thermal drivers and thermal core code. From Caesar Wang, Keerthy,
   Rocky Hao, Wei Yongjun, Peter Robinson, Bui Duc Phuc, Axel Lin, Hugh
   Kang

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (48 commits)
  thermal: int3403: Process trip change notification
  thermal: int340x: New Interface to read trip and notify
  thermal: user_space gov: Add additional information in uevent
  thermal: Enhance thermal_zone_device_update for events
  arm64: tegra: set hot trips for Tegra210
  arm64: tegra: set critical trips for Tegra210
  arm64: tegra: add soctherm node for Tegra210
  arm64: tegra: set hot trips for Tegra132
  arm64: tegra: set critical trips for Tegra132
  arm64: tegra: use tegra132-soctherm for Tegra132
  arm: tegra: set hot trips for Tegra124
  arm: tegra: set critical trips for Tegra124
  thermal: tegra: add hw-throttle for Tegra132
  thermal: tegra: add hw-throttle function
  of: Add bindings of hw throttle for Tegra soctherm
  thermal: mtk_thermal: Check return value of devm_thermal_zone_of_sensor_register
  thermal: Add Mediatek thermal driver for mt2701.
  dt-bindings: thermal: Add binding document for Mediatek thermal controller
  thermal: max77620: Add thermal driver for reporting junction temp
  thermal: max77620: Add DT binding doc for thermal driver
  ...
parents 084165a3 43720df9
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Documentation/devicetree/bindings/thermal/max77620_thermal.txt 0 → 100644
View file @ 2d2474a1
Thermal driver for MAX77620 Power management IC from Maxim Semiconductor.
Maxim Semiconductor MAX77620 supports alarm interrupts when its
die temperature crosses 120C and 140C. These threshold temperatures
are not configurable. Device does not provide the real temperature
of die other than just indicating whether temperature is above or
below threshold level.
Required properties:
-------------------
#thermal-sensor-cells: Please refer <devicetree/bindings/thermal/thermal.txt>
for more details.
The value must be 0.
For more details, please refer generic thermal DT binding document
<devicetree/bindings/thermal/thermal.txt>.
Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
document for the MAX77620.
Example:
--------
#include <dt-bindings/mfd/max77620.h>
#include <dt-bindings/thermal/thermal.h>
...
i2c@7000d000 {
spmic: max77620@3c {
compatible = "maxim,max77620";
:::::
#thermal-sensor-cells = <0>;
:::
};
};
cool_dev: cool-dev {
compatible = "cooling-dev";
#cooling-cells = <2>;
};
thermal-zones {
PMIC-Die {
polling-delay = <0>;
polling-delay-passive = <0>;
thermal-sensors = <&spmic>;
trips {
pmic_die_warn_temp_thresh: hot-die {
temperature = <120000>;
type = "hot";
hysteresis = <0>;
};
pmic_die_cirt_temp_thresh: cirtical-die {
temperature = <140000>;
type = "critical";
hysteresis = <0>;
};
};
cooling-maps {
map0 {
trip = <&pmic_die_warn_temp_thresh>;
cooling-device = <&cool_dev THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
contribution = <100>;
};
};
};
};
Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
View file @ 2d2474a1
......@@ -8,7 +8,9 @@ apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
is also needed.
Required properties:
- compatible: "mediatek,mt8173-thermal"
- compatible:
- "mediatek,mt8173-thermal" : For MT8173 family of SoCs
- "mediatek,mt2701-thermal" : For MT2701 family of SoCs
- reg: Address range of the thermal controller
- interrupts: IRQ for the thermal controller
- clocks, clock-names: Clocks needed for the thermal controller. required
......
Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
View file @ 2d2474a1
......@@ -10,8 +10,14 @@ Required properties :
- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
For Tegra132, must contain "nvidia,tegra132-soctherm".
For Tegra210, must contain "nvidia,tegra210-soctherm".
- reg : Should contain 1 entry:
- reg : Should contain at least 2 entries for each entry in reg-names:
- SOCTHERM register set
- Tegra CAR register set: Required for Tegra124 and Tegra210.
- CCROC register set: Required for Tegra132.
- reg-names : Should contain at least 2 entries:
- soctherm-reg
- car-reg
- ccroc-reg
- interrupts : Defines the interrupt used by SOCTHERM
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
......@@ -25,17 +31,45 @@ Required properties :
- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a
list of valid values when referring to thermal sensors.
- throttle-cfgs: A sub-node which is a container of configuration for each
hardware throttle events. These events can be set as cooling devices.
* throttle events: Sub-nodes must be named as "light" or "heavy".
Properties:
- nvidia,priority: Each throttles has its own throttle settings, so the
SW need to set priorities for various throttle, the HW arbiter can select
the final throttle settings.
Bigger value indicates higher priority, In general, higher priority
translates to lower target frequency. SW needs to ensure that critical
thermal alarms are given higher priority, and ensure that there is
no race if priority of two vectors is set to the same value.
The range of this value is 1~100.
- nvidia,cpu-throt-percent: This property is for Tegra124 and Tegra210.
It is the throttling depth of pulse skippers, it's the percentage
throttling.
- nvidia,cpu-throt-level: This property is only for Tegra132, it is the
level of pulse skippers, which used to throttle clock frequencies. It
indicates cpu clock throttling depth, and the depth can be programmed.
Must set as following values:
TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
- #cooling-cells: Should be 1. This cooling device only support on/off state.
See ./thermal.txt for a description of this property.
Note:
- the "critical" type trip points will be set to SOC_THERM hardware as the
shut down temperature. Once the temperature of this thermal zone is higher
than it, the system will be shutdown or reset by hardware.
- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
temperature. Once the the temperature of this thermal zone is higher
than it, it will trigger the HW throttle event.
Example :
soctherm@700e2000 {
compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x1000>;
reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
0x0 0x60006000 0x0 0x400 /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
......@@ -44,6 +78,76 @@ Example :
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
throttle-cfgs {
/*
* When the "heavy" cooling device triggered,
* the HW will skip cpu clock's pulse in 85% depth
*/
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-percent = <85>;
#cooling-cells = <1>;
};
/*
* When the "light" cooling device triggered,
* the HW will skip cpu clock's pulse in 50% depth
*/
throttle_light: light {
nvidia,priority = <80>;
nvidia,cpu-throt-percent = <50>;
#cooling-cells = <1>;
};
/*
* If these two devices are triggered in same time, the HW throttle
* arbiter will select the highest priority as the final throttle
* settings to skip cpu pulse.
*/
};
};
Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :
soctherm@700e2000 {
compatible = "nvidia,tegra132-soctherm";
reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */;
reg-names = "soctherm-reg", "ccroc-reg";
throttle-cfgs {
/*
* When the "heavy" cooling device triggered,
* the HW will skip cpu clock's pulse in HIGH level
*/
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
#cooling-cells = <1>;
};
/*
* When the "light" cooling device triggered,
* the HW will skip cpu clock's pulse in MED level
*/
throttle_light: light {
nvidia,priority = <80>;
nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
#cooling-cells = <1>;
};
/*
* If these two devices are triggered in same time, the HW throttle
* arbiter will select the highest priority as the final throttle
* settings to skip cpu pulse.
*/
};
};
Example: referring to thermal sensors :
......@@ -62,6 +166,19 @@ Example: referring to thermal sensors :
hysteresis = <1000>;
type = "critical";
};
cpu_throttle_trip: throttle-trip {
temperature = <100000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&cpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
};
Documentation/devicetree/bindings/thermal/qcom-tsens.txt 0 → 100644
View file @ 2d2474a1
* QCOM SoC Temperature Sensor (TSENS)
Required properties:
- compatible :
- "qcom,msm8916-tsens" : For 8916 Family of SoCs
- "qcom,msm8974-tsens" : For 8974 Family of SoCs
- "qcom,msm8996-tsens" : For 8996 Family of SoCs
- reg: Address range of the thermal registers
- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
- Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify
nvmem cells
Example:
tsens: thermal-sensor@900000 {
compatible = "qcom,msm8916-tsens";
reg = <0x4a8000 0x2000>;
nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
nvmem-cell-names = "caldata", "calsel";
#thermal-sensor-cells = <1>;
};
Documentation/thermal/sysfs-api.txt
View file @ 2d2474a1
......@@ -49,6 +49,9 @@ temperature) and throttle appropriate devices.
.bind: bind the thermal zone device with a thermal cooling device.
.unbind: unbind the thermal zone device with a thermal cooling device.
.get_temp: get the current temperature of the thermal zone.
.set_trips: set the trip points window. Whenever the current temperature
is updated, the trip points immediately below and above the
current temperature are found.
.get_mode: get the current mode (enabled/disabled) of the thermal zone.
- "enabled" means the kernel thermal management is enabled.
- "disabled" will prevent kernel thermal driver action upon trip points
......@@ -95,6 +98,10 @@ temperature) and throttle appropriate devices.
get_temp: a pointer to a function that reads the
sensor temperature. This is mandatory
callback provided by sensor driver.
set_trips: a pointer to a function that sets a
temperature window. When this window is
left the driver must inform the thermal
core via thermal_zone_device_update.
get_trend: a pointer to a function that reads the
sensor temperature trend.
set_emul_temp: a pointer to a function that sets
......@@ -140,6 +147,18 @@ temperature) and throttle appropriate devices.
Normally this function will not need to be called and the resource
management code will ensure that the resource is freed.
1.1.7 int thermal_zone_get_slope(struct thermal_zone_device *tz)
This interface is used to read the slope attribute value
for the thermal zone device, which might be useful for platform
drivers for temperature calculations.
1.1.8 int thermal_zone_get_offset(struct thermal_zone_device *tz)
This interface is used to read the offset attribute value
for the thermal zone device, which might be useful for platform
drivers for temperature calculations.
1.2 thermal cooling device interface
1.2.1 struct thermal_cooling_device *thermal_cooling_device_register(char *name,
void *devdata, struct thermal_cooling_device_ops *)
......
arch/arm/boot/dts/tegra124-jetson-tk1.dts
View file @ 2d2474a1
......@@ -2045,44 +2045,32 @@ sound {
thermal-zones {
cpu {
trips {
trip {
cpu-shutdown-trip {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/* There are currently no cooling maps because there are no cooling devices */
};
};
mem {
trips {
trip {
mem-shutdown-trip {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/* There are currently no cooling maps because there are no cooling devices */
};
};
gpu {
trips {
trip {
gpu-shutdown-trip {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/* There are currently no cooling maps because there are no cooling devices */
};
};
};
};
arch/arm/boot/dts/tegra124.dtsi
View file @ 2d2474a1
......@@ -851,7 +851,9 @@ sdhci@700b0600 {
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x1000>;
reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
......@@ -859,6 +861,15 @@ soctherm: thermal-sensor@700e2000 {
resets = <&tegra_car 78>;
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
throttle-cfgs {
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-percent = <85>;
#cooling-cells = <2>;
};
};
};
dfll: clock@70110000 {
......@@ -1154,6 +1165,26 @@ cpu {
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
trips {
cpu-shutdown-trip {
temperature = <103000>;
hysteresis = <0>;
type = "critical";
};
cpu_throttle_trip: throttle-trip {
temperature = <100000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&cpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
mem {
......@@ -1162,6 +1193,21 @@ mem {
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
trips {
mem-shutdown-trip {
temperature = <103000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
gpu {
......@@ -1170,6 +1216,26 @@ gpu {
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
trips {
gpu-shutdown-trip {
temperature = <101000>;
hysteresis = <0>;
type = "critical";
};
gpu_throttle_trip: throttle-trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&gpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
pllx {
......@@ -1178,6 +1244,21 @@ pllx {
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
trips {
pllx-shutdown-trip {
temperature = <103000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
};
......
arch/arm64/boot/dts/nvidia/tegra132.dtsi
View file @ 2d2474a1
......@@ -4,6 +4,7 @@
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/tegra124-soctherm.h>
/ {
compatible = "nvidia,tegra132", "nvidia,tegra124";
......@@ -727,8 +728,10 @@ sdhci@700b0600 {
};
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x1000>;
compatible = "nvidia,tegra132-soctherm";
reg = <0x0 0x700e2000 0x0 0x600 /* 0: SOC_THERM reg_base */
0x0 0x70040000 0x0 0x200>; /* 2: CCROC reg_base */
reg-names = "soctherm-reg", "ccroc-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
......@@ -736,6 +739,118 @@ soctherm: thermal-sensor@700e2000 {
resets = <&tegra_car 78>;
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
throttle-cfgs {
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
#cooling-cells = <2>;
};
};
};
thermal-zones {
cpu {
polling-delay-passive = <1000>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
trips {
cpu_shutdown_trip {
temperature = <105000>;
hysteresis = <1000>;
type = "critical";
};
cpu_throttle_trip: throttle-trip {
temperature = <102000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&cpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
mem {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
trips {
mem_shutdown_trip {
temperature = <101000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
gpu {
polling-delay-passive = <1000>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
trips {
gpu_shutdown_trip {
temperature = <101000>;
hysteresis = <1000>;
type = "critical";
};
gpu_throttle_trip: throttle-trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&gpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
pllx {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
trips {
pllx_shutdown_trip {
temperature = <105000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
};
ahub@70300000 {
......
arch/arm64/boot/dts/nvidia/tegra210.dtsi
View file @ 2d2474a1
......@@ -3,6 +3,7 @@
#include <dt-bindings/memory/tegra210-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/tegra124-soctherm.h>
/ {
compatible = "nvidia,tegra210";
......@@ -1159,4 +1160,130 @@ timer {
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&gic>;
};
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra210-soctherm";
reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_TSENSOR>,
<&tegra_car TEGRA210_CLK_SOC_THERM>;
clock-names = "tsensor", "soctherm";
resets = <&tegra_car 78>;
reset-names = "soctherm";
#thermal-sensor-cells = <1>;
throttle-cfgs {
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-percent = <85>;
#cooling-cells = <2>;
};
};
};
thermal-zones {
cpu {
polling-delay-passive = <1000>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
trips {
cpu-shutdown-trip {
temperature = <102500>;
hysteresis = <0>;
type = "critical";
};
cpu_throttle_trip: throttle-trip {
temperature = <98500>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&cpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
mem {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
trips {
mem-shutdown-trip {
temperature = <103000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
gpu {
polling-delay-passive = <1000>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
trips {
gpu-shutdown-trip {
temperature = <103000>;
hysteresis = <0>;
type = "critical";
};
gpu_throttle_trip: throttle-trip {
temperature = <100000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
map0 {
trip = <&gpu_throttle_trip>;
cooling-device = <&throttle_heavy 1 1>;
};
};
};
pllx {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors =
<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
trips {
pllx-shutdown-trip {
temperature = <103000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
/*
* There are currently no cooling maps,
* because there are no cooling devices.
*/
};
};
};
};
drivers/acpi/thermal.c
View file @ 2d2474a1
......@@ -520,7 +520,8 @@ static void acpi_thermal_check(void *data)
if (!tz->tz_enabled)
return;
thermal_zone_device_update(tz->thermal_zone);
thermal_zone_device_update(tz->thermal_zone,
THERMAL_EVENT_UNSPECIFIED);
}
/* sys I/F for generic thermal sysfs support */
......
drivers/platform/x86/acerhdf.c
View file @ 2d2474a1
......@@ -405,7 +405,7 @@ static inline void acerhdf_enable_kernelmode(void)
kernelmode = 1;
thz_dev->polling_delay = interval*1000;
thermal_zone_device_update(thz_dev);
thermal_zone_device_update(thz_dev, THERMAL_EVENT_UNSPECIFIED);
pr_notice("kernel mode fan control ON\n");
}
......
drivers/regulator/max8973-regulator.c
View file @ 2d2474a1
......@@ -495,7 +495,8 @@ static irqreturn_t max8973_thermal_irq(int irq, void *data)
{
struct max8973_chip *mchip = data;
thermal_zone_device_update(mchip->tz_device);
thermal_zone_device_update(mchip->tz_device,
THERMAL_EVENT_UNSPECIFIED);
return IRQ_HANDLED;
}
......
drivers/thermal/Kconfig
View file @ 2d2474a1
......@@ -186,7 +186,7 @@ config HISI_THERMAL
config IMX_THERMAL
tristate "Temperature sensor driver for Freescale i.MX SoCs"
depends on CPU_THERMAL
depends on (ARCH_MXC && CPU_THERMAL) || COMPILE_TEST
depends on MFD_SYSCON
depends on OF
help
......@@ -195,6 +195,26 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
config MAX77620_THERMAL
tristate "Temperature sensor driver for Maxim MAX77620 PMIC"
depends on MFD_MAX77620
depends on OF
help
Support for die junction temperature warning alarm for Maxim
Semiconductor PMIC MAX77620 device. Device generates two alarm
interrupts when PMIC die temperature cross the threshold of
120 degC and 140 degC.
config QORIQ_THERMAL
tristate "QorIQ Thermal Monitoring Unit"
depends on THERMAL_OF
depends on HAS_IOMEM
help
Support for Thermal Monitoring Unit (TMU) found on QorIQ platforms.
It supports one critical trip point and one passive trip point. The
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
config SPEAR_THERMAL
tristate "SPEAr thermal sensor driver"
depends on PLAT_SPEAR || COMPILE_TEST
......@@ -332,6 +352,16 @@ menu "ACPI INT340X thermal drivers"
source drivers/thermal/int340x_thermal/Kconfig
endmenu
config INTEL_BXT_PMIC_THERMAL
tristate "Intel Broxton PMIC thermal driver"
depends on X86 && INTEL_SOC_PMIC && REGMAP
help
Select this driver for Intel Broxton PMIC with ADC channels monitoring
system temperature measurements and alerts.
This driver is used for monitoring the ADC channels of PMIC and handles
the alert trip point interrupts and notifies the thermal framework with
the trip point and temperature details of the zone.
config INTEL_PCH_THERMAL
tristate "Intel PCH Thermal Reporting Driver"
depends on X86 && PCI
......@@ -399,4 +429,9 @@ config GENERIC_ADC_THERMAL
to this driver. This driver reports the temperature by reading ADC
channel and converts it to temperature based on lookup table.
menu "Qualcomm thermal drivers"
depends on (ARCH_QCOM && OF) || COMPILE_TEST
source "drivers/thermal/qcom/Kconfig"
endmenu
endif
drivers/thermal/Makefile
View file @ 2d2474a1
......@@ -37,6 +37,8 @@ obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
obj-$(CONFIG_TANGO_THERMAL) += tango_thermal.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
obj-$(CONFIG_MAX77620_THERMAL) += max77620_thermal.o
obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o
obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
......@@ -45,8 +47,10 @@ obj-$(CONFIG_INTEL_SOC_DTS_THERMAL) += intel_soc_dts_thermal.o
obj-$(CONFIG_INTEL_QUARK_DTS_THERMAL) += intel_quark_dts_thermal.o
obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal/
obj-$(CONFIG_INT340X_THERMAL) += int340x_thermal/
obj-$(CONFIG_INTEL_BXT_PMIC_THERMAL) += intel_bxt_pmic_thermal.o
obj-$(CONFIG_INTEL_PCH_THERMAL) += intel_pch_thermal.o
obj-$(CONFIG_ST_THERMAL) += st/
obj-$(CONFIG_QCOM_TSENS) += qcom/
obj-$(CONFIG_TEGRA_SOCTHERM) += tegra/
obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
......
drivers/thermal/cpu_cooling.c
View file @ 2d2474a1
......@@ -74,7 +74,7 @@ struct power_table {
* cpufreq frequencies.
* @allowed_cpus: all the cpus involved for this cpufreq_cooling_device.
* @node: list_head to link all cpufreq_cooling_device together.
* @last_load: load measured by the latest call to cpufreq_get_actual_power()
* @last_load: load measured by the latest call to cpufreq_get_requested_power()
* @time_in_idle: previous reading of the absolute time that this cpu was idle
* @time_in_idle_timestamp: wall time of the last invocation of
* get_cpu_idle_time_us()
......
drivers/thermal/db8500_thermal.c
View file @ 2d2474a1
......@@ -306,7 +306,7 @@ static void db8500_thermal_work(struct work_struct *work)
if (cur_mode == THERMAL_DEVICE_DISABLED)
return;
thermal_zone_device_update(pzone->therm_dev);
thermal_zone_device_update(pzone->therm_dev, THERMAL_EVENT_UNSPECIFIED);
dev_dbg(&pzone->therm_dev->device, "thermal work finished.\n");
}
......
drivers/thermal/devfreq_cooling.c
View file @ 2d2474a1
......@@ -312,7 +312,7 @@ static int devfreq_cooling_state2power(struct thermal_cooling_device *cdev,
unsigned long freq;
u32 static_power;
if (state < 0 || state >= dfc->freq_table_size)
if (state >= dfc->freq_table_size)
return -EINVAL;
freq = dfc->freq_table[state];
......
drivers/thermal/gov_bang_bang.c
View file @ 2d2474a1
......@@ -65,7 +65,7 @@ static void thermal_zone_trip_update(struct thermal_zone_device *tz, int trip)
if (instance->target == 0 && tz->temperature >= trip_temp)
instance->target = 1;
else if (instance->target == 1 &&
tz->temperature < trip_temp - trip_hyst)
tz->temperature <= trip_temp - trip_hyst)
instance->target = 0;
dev_dbg(&instance->cdev->device, "target=%d\n",
......
drivers/thermal/hisi_thermal.c
View file @ 2d2474a1
......@@ -237,7 +237,8 @@ static irqreturn_t hisi_thermal_alarm_irq_thread(int irq, void *dev)
if (!data->sensors[i].tzd)
continue;
thermal_zone_device_update(data->sensors[i].tzd);
thermal_zone_device_update(data->sensors[i].tzd,
THERMAL_EVENT_UNSPECIFIED);
}
return IRQ_HANDLED;
......
drivers/thermal/imx_thermal.c
View file @ 2d2474a1
......@@ -246,7 +246,7 @@ static int imx_set_mode(struct thermal_zone_device *tz,
}
data->mode = mode;
thermal_zone_device_update(tz);
thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED);
return 0;
}
......@@ -457,7 +457,7 @@ static irqreturn_t imx_thermal_alarm_irq_thread(int irq, void *dev)
dev_dbg(&data->tz->device, "THERMAL ALARM: T > %d\n",
data->alarm_temp / 1000);
thermal_zone_device_update(data->tz);
thermal_zone_device_update(data->tz, THERMAL_EVENT_UNSPECIFIED);
return IRQ_HANDLED;
}
......
drivers/thermal/int340x_thermal/int3402_thermal.c
View file @ 2d2474a1
......@@ -35,7 +35,8 @@ static void int3402_notify(acpi_handle handle, u32 event, void *data)
case INT3402_PERF_CHANGED_EVENT:
break;
case INT3402_THERMAL_EVENT:
int340x_thermal_zone_device_update(priv->int340x_zone);
int340x_thermal_zone_device_update(priv->int340x_zone,
THERMAL_TRIP_VIOLATED);
break;
default:
break;
......
drivers/thermal/int340x_thermal/int3403_thermal.c
View file @ 2d2474a1
......@@ -25,6 +25,7 @@
#define INT3403_TYPE_CHARGER 0x0B
#define INT3403_TYPE_BATTERY 0x0C
#define INT3403_PERF_CHANGED_EVENT 0x80
#define INT3403_PERF_TRIP_POINT_CHANGED 0x81
#define INT3403_THERMAL_EVENT 0x90
/* Preserved structure for future expandbility */
......@@ -72,7 +73,13 @@ static void int3403_notify(acpi_handle handle,
case INT3403_PERF_CHANGED_EVENT:
break;
case INT3403_THERMAL_EVENT:
int340x_thermal_zone_device_update(obj->int340x_zone);
int340x_thermal_zone_device_update(obj->int340x_zone,
THERMAL_TRIP_VIOLATED);
break;
case INT3403_PERF_TRIP_POINT_CHANGED:
int340x_thermal_read_trips(obj->int340x_zone);
int340x_thermal_zone_device_update(obj->int340x_zone,
THERMAL_TRIP_CHANGED);
break;
default:
dev_err(&priv->pdev->dev, "Unsupported event [0x%x]\n", event);
......
drivers/thermal/int340x_thermal/int340x_thermal_zone.c
View file @ 2d2474a1
......@@ -177,6 +177,42 @@ static int int340x_thermal_get_trip_config(acpi_handle handle, char *name,
return 0;
}
int int340x_thermal_read_trips(struct int34x_thermal_zone *int34x_zone)
{
int trip_cnt = int34x_zone->aux_trip_nr;
int i;
int34x_zone->crt_trip_id = -1;
if (!int340x_thermal_get_trip_config(int34x_zone->adev->handle, "_CRT",
&int34x_zone->crt_temp))
int34x_zone->crt_trip_id = trip_cnt++;
int34x_zone->hot_trip_id = -1;
if (!int340x_thermal_get_trip_config(int34x_zone->adev->handle, "_HOT",
&int34x_zone->hot_temp))
int34x_zone->hot_trip_id = trip_cnt++;
int34x_zone->psv_trip_id = -1;
if (!int340x_thermal_get_trip_config(int34x_zone->adev->handle, "_PSV",
&int34x_zone->psv_temp))
int34x_zone->psv_trip_id = trip_cnt++;
for (i = 0; i < INT340X_THERMAL_MAX_ACT_TRIP_COUNT; i++) {
char name[5] = { '_', 'A', 'C', '0' + i, '\0' };
if (int340x_thermal_get_trip_config(int34x_zone->adev->handle,
name,
&int34x_zone->act_trips[i].temp))
break;
int34x_zone->act_trips[i].id = trip_cnt++;
int34x_zone->act_trips[i].valid = true;
}
return trip_cnt;
}
EXPORT_SYMBOL_GPL(int340x_thermal_read_trips);
static struct thermal_zone_params int340x_thermal_params = {
.governor_name = "user_space",
.no_hwmon = true,
......@@ -188,7 +224,7 @@ struct int34x_thermal_zone *int340x_thermal_zone_add(struct acpi_device *adev,
struct int34x_thermal_zone *int34x_thermal_zone;
acpi_status status;
unsigned long long trip_cnt;
int trip_mask = 0, i;
int trip_mask = 0;
int ret;
int34x_thermal_zone = kzalloc(sizeof(*int34x_thermal_zone),
......@@ -214,28 +250,8 @@ struct int34x_thermal_zone *int340x_thermal_zone_add(struct acpi_device *adev,
int34x_thermal_zone->aux_trip_nr = trip_cnt;
}
int34x_thermal_zone->crt_trip_id = -1;
if (!int340x_thermal_get_trip_config(adev->handle, "_CRT",
&int34x_thermal_zone->crt_temp))
int34x_thermal_zone->crt_trip_id = trip_cnt++;
int34x_thermal_zone->hot_trip_id = -1;
if (!int340x_thermal_get_trip_config(adev->handle, "_HOT",
&int34x_thermal_zone->hot_temp))
int34x_thermal_zone->hot_trip_id = trip_cnt++;
int34x_thermal_zone->psv_trip_id = -1;
if (!int340x_thermal_get_trip_config(adev->handle, "_PSV",
&int34x_thermal_zone->psv_temp))
int34x_thermal_zone->psv_trip_id = trip_cnt++;
for (i = 0; i < INT340X_THERMAL_MAX_ACT_TRIP_COUNT; i++) {
char name[5] = { '_', 'A', 'C', '0' + i, '\0' };
trip_cnt = int340x_thermal_read_trips(int34x_thermal_zone);
if (int340x_thermal_get_trip_config(adev->handle, name,
&int34x_thermal_zone->act_trips[i].temp))
break;
int34x_thermal_zone->act_trips[i].id = trip_cnt++;
int34x_thermal_zone->act_trips[i].valid = true;
}
int34x_thermal_zone->lpat_table = acpi_lpat_get_conversion_table(
adev->handle);
......
drivers/thermal/int340x_thermal/int340x_thermal_zone.h
View file @ 2d2474a1
......@@ -46,6 +46,7 @@ struct int34x_thermal_zone {
struct int34x_thermal_zone *int340x_thermal_zone_add(struct acpi_device *,
struct thermal_zone_device_ops *override_ops);
void int340x_thermal_zone_remove(struct int34x_thermal_zone *);
int int340x_thermal_read_trips(struct int34x_thermal_zone *int34x_zone);
static inline void int340x_thermal_zone_set_priv_data(
struct int34x_thermal_zone *tzone, void *priv_data)
......@@ -60,9 +61,10 @@ static inline void *int340x_thermal_zone_get_priv_data(
}
static inline void int340x_thermal_zone_device_update(
struct int34x_thermal_zone *tzone)
struct int34x_thermal_zone *tzone,
enum thermal_notify_event event)
{
thermal_zone_device_update(tzone->zone);
thermal_zone_device_update(tzone->zone, event);
}
#endif
drivers/thermal/int340x_thermal/processor_thermal_device.c
View file @ 2d2474a1
......@@ -258,7 +258,8 @@ static void proc_thermal_notify(acpi_handle handle, u32 event, void *data)
switch (event) {
case PROC_POWER_CAPABILITY_CHANGED:
proc_thermal_read_ppcc(proc_priv);
int340x_thermal_zone_device_update(proc_priv->int340x_zone);
int340x_thermal_zone_device_update(proc_priv->int340x_zone,
THERMAL_DEVICE_POWER_CAPABILITY_CHANGED);
break;
default:
dev_err(proc_priv->dev, "Unsupported event [0x%x]\n", event);
......
drivers/thermal/intel_bxt_pmic_thermal.c 0 → 100644
View file @ 2d2474a1
/*
* Intel Broxton PMIC thermal driver
*
* Copyright (C) 2016 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/thermal.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/mfd/intel_soc_pmic.h>
#define BXTWC_THRM0IRQ 0x4E04
#define BXTWC_THRM1IRQ 0x4E05
#define BXTWC_THRM2IRQ 0x4E06
#define BXTWC_MTHRM0IRQ 0x4E12
#define BXTWC_MTHRM1IRQ 0x4E13
#define BXTWC_MTHRM2IRQ 0x4E14
#define BXTWC_STHRM0IRQ 0x4F19
#define BXTWC_STHRM1IRQ 0x4F1A
#define BXTWC_STHRM2IRQ 0x4F1B
struct trip_config_map {
u16 irq_reg;
u16 irq_en;
u16 evt_stat;
u8 irq_mask;
u8 irq_en_mask;
u8 evt_mask;
u8 trip_num;
};
struct thermal_irq_map {
char handle[20];
int num_trips;
const struct trip_config_map *trip_config;
};
struct pmic_thermal_data {
const struct thermal_irq_map *maps;
int num_maps;
};
static const struct trip_config_map bxtwc_str0_trip_config[] = {
{
.irq_reg = BXTWC_THRM0IRQ,
.irq_mask = 0x01,
.irq_en = BXTWC_MTHRM0IRQ,
.irq_en_mask = 0x01,
.evt_stat = BXTWC_STHRM0IRQ,
.evt_mask = 0x01,
.trip_num = 0
},
{
.irq_reg = BXTWC_THRM0IRQ,
.irq_mask = 0x10,
.irq_en = BXTWC_MTHRM0IRQ,
.irq_en_mask = 0x10,
.evt_stat = BXTWC_STHRM0IRQ,
.evt_mask = 0x10,
.trip_num = 1
}
};
static const struct trip_config_map bxtwc_str1_trip_config[] = {
{
.irq_reg = BXTWC_THRM0IRQ,
.irq_mask = 0x02,
.irq_en = BXTWC_MTHRM0IRQ,
.irq_en_mask = 0x02,
.evt_stat = BXTWC_STHRM0IRQ,
.evt_mask = 0x02,
.trip_num = 0
},
{
.irq_reg = BXTWC_THRM0IRQ,
.irq_mask = 0x20,
.irq_en = BXTWC_MTHRM0IRQ,
.irq_en_mask = 0x20,
.evt_stat = BXTWC_STHRM0IRQ,
.evt_mask = 0x20,
.trip_num = 1
},
};
static const struct trip_config_map bxtwc_str2_trip_config[] = {
{
.irq_reg = BXTWC_THRM0IRQ,
.irq_mask = 0x04,
.irq_en = BXTWC_MTHRM0IRQ,
.irq_en_mask = 0x04,
.evt_stat = BXTWC_STHRM0IRQ,
.evt_mask = 0x04,
.trip_num = 0
},
{
.irq_reg = BXTWC_THRM0IRQ,
.irq_mask = 0x40,
.irq_en = BXTWC_MTHRM0IRQ,
.irq_en_mask = 0x40,
.evt_stat = BXTWC_STHRM0IRQ,
.evt_mask = 0x40,
.trip_num = 1
},
};
static const struct trip_config_map bxtwc_str3_trip_config[] = {
{
.irq_reg = BXTWC_THRM2IRQ,
.irq_mask = 0x10,
.irq_en = BXTWC_MTHRM2IRQ,
.irq_en_mask = 0x10,
.evt_stat = BXTWC_STHRM2IRQ,
.evt_mask = 0x10,
.trip_num = 0
},
};
static const struct thermal_irq_map bxtwc_thermal_irq_map[] = {
{
.handle = "STR0",
.trip_config = bxtwc_str0_trip_config,
.num_trips = ARRAY_SIZE(bxtwc_str0_trip_config),
},
{
.handle = "STR1",
.trip_config = bxtwc_str1_trip_config,
.num_trips = ARRAY_SIZE(bxtwc_str1_trip_config),
},
{
.handle = "STR2",
.trip_config = bxtwc_str2_trip_config,
.num_trips = ARRAY_SIZE(bxtwc_str2_trip_config),
},
{
.handle = "STR3",
.trip_config = bxtwc_str3_trip_config,
.num_trips = ARRAY_SIZE(bxtwc_str3_trip_config),
},
};
static const struct pmic_thermal_data bxtwc_thermal_data = {
.maps = bxtwc_thermal_irq_map,
.num_maps = ARRAY_SIZE(bxtwc_thermal_irq_map),
};
static irqreturn_t pmic_thermal_irq_handler(int irq, void *data)
{
struct platform_device *pdev = data;
struct thermal_zone_device *tzd;
struct pmic_thermal_data *td;
struct intel_soc_pmic *pmic;
struct regmap *regmap;
u8 reg_val, mask, irq_stat, trip;
u16 reg, evt_stat_reg;
int i, j, ret;
pmic = dev_get_drvdata(pdev->dev.parent);
regmap = pmic->regmap;
td = (struct pmic_thermal_data *)
platform_get_device_id(pdev)->driver_data;
/* Resolve thermal irqs */
for (i = 0; i < td->num_maps; i++) {
for (j = 0; j < td->maps[i].num_trips; j++) {
reg = td->maps[i].trip_config[j].irq_reg;
mask = td->maps[i].trip_config[j].irq_mask;
/*
* Read the irq register to resolve whether the
* interrupt was triggered for this sensor
*/
if (regmap_read(regmap, reg, &ret))
return IRQ_HANDLED;
reg_val = (u8)ret;
irq_stat = ((u8)ret & mask);
if (!irq_stat)
continue;
/*
* Read the status register to find out what
* event occurred i.e a high or a low
*/
evt_stat_reg = td->maps[i].trip_config[j].evt_stat;
if (regmap_read(regmap, evt_stat_reg, &ret))
return IRQ_HANDLED;
trip = td->maps[i].trip_config[j].trip_num;
tzd = thermal_zone_get_zone_by_name(td->maps[i].handle);
if (!IS_ERR(tzd))
thermal_zone_device_update(tzd,
THERMAL_EVENT_UNSPECIFIED);
/* Clear the appropriate irq */
regmap_write(regmap, reg, reg_val & mask);
}
}
return IRQ_HANDLED;
}
static int pmic_thermal_probe(struct platform_device *pdev)
{
struct regmap_irq_chip_data *regmap_irq_chip;
struct pmic_thermal_data *thermal_data;
int ret, irq, virq, i, j, pmic_irq_count;
struct intel_soc_pmic *pmic;
struct regmap *regmap;
struct device *dev;
u16 reg;
u8 mask;
dev = &pdev->dev;
pmic = dev_get_drvdata(pdev->dev.parent);
if (!pmic) {
dev_err(dev, "Failed to get struct intel_soc_pmic pointer\n");
return -ENODEV;
}
thermal_data = (struct pmic_thermal_data *)
platform_get_device_id(pdev)->driver_data;
if (!thermal_data) {
dev_err(dev, "No thermal data initialized!!\n");
return -ENODEV;
}
regmap = pmic->regmap;
regmap_irq_chip = pmic->irq_chip_data_level2;
pmic_irq_count = 0;
while ((irq = platform_get_irq(pdev, pmic_irq_count)) != -ENXIO) {
virq = regmap_irq_get_virq(regmap_irq_chip, irq);
if (virq < 0) {
dev_err(dev, "failed to get virq by irq %d\n", irq);
return virq;
}
ret = devm_request_threaded_irq(&pdev->dev, virq,
NULL, pmic_thermal_irq_handler,
IRQF_ONESHOT, "pmic_thermal", pdev);
if (ret) {
dev_err(dev, "request irq(%d) failed: %d\n", virq, ret);
return ret;
}
pmic_irq_count++;
}
/* Enable thermal interrupts */
for (i = 0; i < thermal_data->num_maps; i++) {
for (j = 0; j < thermal_data->maps[i].num_trips; j++) {
reg = thermal_data->maps[i].trip_config[j].irq_en;
mask = thermal_data->maps[i].trip_config[j].irq_en_mask;
ret = regmap_update_bits(regmap, reg, mask, 0x00);
if (ret)
return ret;
}
}
return 0;
}
static const struct platform_device_id pmic_thermal_id_table[] = {
{
.name = "bxt_wcove_thermal",
.driver_data = (kernel_ulong_t)&bxtwc_thermal_data,
},
{},
};
static struct platform_driver pmic_thermal_driver = {
.probe = pmic_thermal_probe,
.driver = {
.name = "pmic_thermal",
},
.id_table = pmic_thermal_id_table,
};
MODULE_DEVICE_TABLE(platform, pmic_thermal_id_table);
module_platform_driver(pmic_thermal_driver);
MODULE_AUTHOR("Yegnesh S Iyer <yegnesh.s.iyer@intel.com>");
MODULE_DESCRIPTION("Intel Broxton PMIC Thermal Driver");
MODULE_LICENSE("GPL v2");
drivers/thermal/intel_soc_dts_iosf.c
View file @ 2d2474a1
......@@ -391,7 +391,8 @@ void intel_soc_dts_iosf_interrupt_handler(struct intel_soc_dts_sensors *sensors)
for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
pr_debug("TZD update for zone %d\n", i);
thermal_zone_device_update(sensors->soc_dts[i].tzone);
thermal_zone_device_update(sensors->soc_dts[i].tzone,
THERMAL_EVENT_UNSPECIFIED);
}
} else
spin_unlock_irqrestore(&sensors->intr_notify_lock, flags);
......
drivers/thermal/max77620_thermal.c 0 → 100644
View file @ 2d2474a1
/*
* Junction temperature thermal driver for Maxim Max77620.
*
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
*
* Author: Laxman Dewangan <ldewangan@nvidia.com>
* Mallikarjun Kasoju <mkasoju@nvidia.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*/
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/mfd/max77620.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/thermal.h>
#define MAX77620_NORMAL_OPERATING_TEMP 100000
#define MAX77620_TJALARM1_TEMP 120000
#define MAX77620_TJALARM2_TEMP 140000
struct max77620_therm_info {
struct device *dev;
struct regmap *rmap;
struct thermal_zone_device *tz_device;
int irq_tjalarm1;
int irq_tjalarm2;
};
/**
* max77620_thermal_read_temp: Read PMIC die temperatue.
* @data: Device specific data.
* temp: Temperature in millidegrees Celsius
*
* The actual temperature of PMIC die is not available from PMIC.
* PMIC only tells the status if it has crossed or not the threshold level
* of 120degC or 140degC.
* If threshold has not been crossed then assume die temperature as 100degC
* else 120degC or 140deG based on the PMIC die temp threshold status.
*
* Return 0 on success otherwise error number to show reason of failure.
*/
static int max77620_thermal_read_temp(void *data, int *temp)
{
struct max77620_therm_info *mtherm = data;
unsigned int val;
int ret;
ret = regmap_read(mtherm->rmap, MAX77620_REG_STATLBT, &val);
if (ret < 0) {
dev_err(mtherm->dev, "Failed to read STATLBT: %d\n", ret);
return ret;
}
if (val & MAX77620_IRQ_TJALRM2_MASK)
*temp = MAX77620_TJALARM2_TEMP;
else if (val & MAX77620_IRQ_TJALRM1_MASK)
*temp = MAX77620_TJALARM1_TEMP;
else
*temp = MAX77620_NORMAL_OPERATING_TEMP;
return 0;
}
static const struct thermal_zone_of_device_ops max77620_thermal_ops = {
.get_temp = max77620_thermal_read_temp,
};
static irqreturn_t max77620_thermal_irq(int irq, void *data)
{
struct max77620_therm_info *mtherm = data;
if (irq == mtherm->irq_tjalarm1)
dev_warn(mtherm->dev, "Junction Temp Alarm1(120C) occurred\n");
else if (irq == mtherm->irq_tjalarm2)
dev_crit(mtherm->dev, "Junction Temp Alarm2(140C) occurred\n");
thermal_zone_device_update(mtherm->tz_device,
THERMAL_EVENT_UNSPECIFIED);
return IRQ_HANDLED;
}
static int max77620_thermal_probe(struct platform_device *pdev)
{
struct max77620_therm_info *mtherm;
int ret;
mtherm = devm_kzalloc(&pdev->dev, sizeof(*mtherm), GFP_KERNEL);
if (!mtherm)
return -ENOMEM;
mtherm->irq_tjalarm1 = platform_get_irq(pdev, 0);
mtherm->irq_tjalarm2 = platform_get_irq(pdev, 1);
if ((mtherm->irq_tjalarm1 < 0) || (mtherm->irq_tjalarm2 < 0)) {
dev_err(&pdev->dev, "Alarm irq number not available\n");
return -EINVAL;
}
pdev->dev.of_node = pdev->dev.parent->of_node;
mtherm->dev = &pdev->dev;
mtherm->rmap = dev_get_regmap(pdev->dev.parent, NULL);
if (!mtherm->rmap) {
dev_err(&pdev->dev, "Failed to get parent regmap\n");
return -ENODEV;
}
mtherm->tz_device = devm_thermal_zone_of_sensor_register(&pdev->dev, 0,
mtherm, &max77620_thermal_ops);
if (IS_ERR(mtherm->tz_device)) {
ret = PTR_ERR(mtherm->tz_device);
dev_err(&pdev->dev, "Failed to register thermal zone: %d\n",
ret);
return ret;
}
ret = devm_request_threaded_irq(&pdev->dev, mtherm->irq_tjalarm1, NULL,
max77620_thermal_irq,
IRQF_ONESHOT | IRQF_SHARED,
dev_name(&pdev->dev), mtherm);
if (ret < 0) {
dev_err(&pdev->dev, "Failed to request irq1: %d\n", ret);
return ret;
}
ret = devm_request_threaded_irq(&pdev->dev, mtherm->irq_tjalarm2, NULL,
max77620_thermal_irq,
IRQF_ONESHOT | IRQF_SHARED,
dev_name(&pdev->dev), mtherm);
if (ret < 0) {
dev_err(&pdev->dev, "Failed to request irq2: %d\n", ret);
return ret;
}
platform_set_drvdata(pdev, mtherm);
return 0;
}
static struct platform_device_id max77620_thermal_devtype[] = {
{ .name = "max77620-thermal", },
{},
};
static struct platform_driver max77620_thermal_driver = {
.driver = {
.name = "max77620-thermal",
},
.probe = max77620_thermal_probe,
.id_table = max77620_thermal_devtype,
};
module_platform_driver(max77620_thermal_driver);
MODULE_DESCRIPTION("Max77620 Junction temperature Thermal driver");
MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
MODULE_LICENSE("GPL v2");
drivers/thermal/mtk_thermal.c
View file @ 2d2474a1
This diff is collapsed.
drivers/thermal/of-thermal.c
View file @ 2d2474a1
......@@ -101,6 +101,17 @@ static int of_thermal_get_temp(struct thermal_zone_device *tz,
return data->ops->get_temp(data->sensor_data, temp);
}
static int of_thermal_set_trips(struct thermal_zone_device *tz,
int low, int high)
{
struct __thermal_zone *data = tz->devdata;
if (!data->ops || !data->ops->set_trips)
return -EINVAL;
return data->ops->set_trips(data->sensor_data, low, high);
}
/**
* of_thermal_get_ntrips - function to export number of available trip
* points.
......@@ -181,9 +192,6 @@ static int of_thermal_set_emul_temp(struct thermal_zone_device *tz,
{
struct __thermal_zone *data = tz->devdata;
if (!data->ops || !data->ops->set_emul_temp)
return -EINVAL;
return data->ops->set_emul_temp(data->sensor_data, temp);
}
......@@ -191,25 +199,11 @@ static int of_thermal_get_trend(struct thermal_zone_device *tz, int trip,
enum thermal_trend *trend)
{
struct __thermal_zone *data = tz->devdata;
long dev_trend;
int r;
if (!data->ops->get_trend)
return -EINVAL;
r = data->ops->get_trend(data->sensor_data, &dev_trend);
if (r)
return r;
/* TODO: These intervals might have some thresholds, but in core code */
if (dev_trend > 0)
*trend = THERMAL_TREND_RAISING;
else if (dev_trend < 0)
*trend = THERMAL_TREND_DROPPING;
else
*trend = THERMAL_TREND_STABLE;
return 0;
return data->ops->get_trend(data->sensor_data, trip, trend);
}
static int of_thermal_bind(struct thermal_zone_device *thermal,
......@@ -292,7 +286,7 @@ static int of_thermal_set_mode(struct thermal_zone_device *tz,
mutex_unlock(&tz->lock);
data->mode = mode;
thermal_zone_device_update(tz);
thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED);
return 0;
}
......@@ -427,7 +421,17 @@ thermal_zone_of_add_sensor(struct device_node *zone,
tzd->ops->get_temp = of_thermal_get_temp;
tzd->ops->get_trend = of_thermal_get_trend;
/*
* The thermal zone core will calculate the window if they have set the
* optional set_trips pointer.
*/
if (ops->set_trips)
tzd->ops->set_trips = of_thermal_set_trips;
if (ops->set_emul_temp)
tzd->ops->set_emul_temp = of_thermal_set_emul_temp;
mutex_unlock(&tzd->lock);
return tzd;
......@@ -596,7 +600,7 @@ static int devm_thermal_zone_of_sensor_match(struct device *dev, void *res,
* Return: On success returns a valid struct thermal_zone_device,
* otherwise, it returns a corresponding ERR_PTR(). Caller must
* check the return value with help of IS_ERR() helper.
* Registered hermal_zone_device device will automatically be
* Registered thermal_zone_device device will automatically be
* released when device is unbounded.
*/
struct thermal_zone_device *devm_thermal_zone_of_sensor_register(
......
drivers/thermal/qcom-spmi-temp-alarm.c
View file @ 2d2474a1
......@@ -150,7 +150,7 @@ static irqreturn_t qpnp_tm_isr(int irq, void *data)
{
struct qpnp_tm_chip *chip = data;
thermal_zone_device_update(chip->tz_dev);
thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
return IRQ_HANDLED;
}
......
drivers/thermal/qcom/Kconfig 0 → 100644
View file @ 2d2474a1
config QCOM_TSENS
tristate "Qualcomm TSENS Temperature Alarm"
depends on THERMAL
depends on QCOM_QFPROM
depends on ARCH_QCOM || COMPILE_TEST
help
This enables the thermal sysfs driver for the TSENS device. It shows
up in Sysfs as a thermal zone with multiple trip points. Disabling the
thermal zone device via the mode file results in disabling the sensor.
Also able to set threshold temperature for both hot and cold and update
when a threshold is reached.
drivers/thermal/qcom/Makefile 0 → 100644
View file @ 2d2474a1
obj-$(CONFIG_QCOM_TSENS) += qcom_tsens.o
qcom_tsens-y += tsens.o tsens-common.o tsens-8916.o tsens-8974.o tsens-8960.o tsens-8996.o
drivers/thermal/qcom/tsens-8916.c 0 → 100644
View file @ 2d2474a1
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/platform_device.h>
#include "tsens.h"
/* eeprom layout data for 8916 */
#define BASE0_MASK 0x0000007f
#define BASE1_MASK 0xfe000000
#define BASE0_SHIFT 0
#define BASE1_SHIFT 25
#define S0_P1_MASK 0x00000f80
#define S1_P1_MASK 0x003e0000
#define S2_P1_MASK 0xf8000000
#define S3_P1_MASK 0x000003e0
#define S4_P1_MASK 0x000f8000
#define S0_P2_MASK 0x0001f000
#define S1_P2_MASK 0x07c00000
#define S2_P2_MASK 0x0000001f
#define S3_P2_MASK 0x00007c00
#define S4_P2_MASK 0x01f00000
#define S0_P1_SHIFT 7
#define S1_P1_SHIFT 17
#define S2_P1_SHIFT 27
#define S3_P1_SHIFT 5
#define S4_P1_SHIFT 15
#define S0_P2_SHIFT 12
#define S1_P2_SHIFT 22
#define S2_P2_SHIFT 0
#define S3_P2_SHIFT 10
#define S4_P2_SHIFT 20
#define CAL_SEL_MASK 0xe0000000
#define CAL_SEL_SHIFT 29
static int calibrate_8916(struct tsens_device *tmdev)
{
int base0 = 0, base1 = 0, i;
u32 p1[5], p2[5];
int mode = 0;
u32 *qfprom_cdata, *qfprom_csel;
qfprom_cdata = (u32 *)qfprom_read(tmdev->dev, "calib");
if (IS_ERR(qfprom_cdata))
return PTR_ERR(qfprom_cdata);
qfprom_csel = (u32 *)qfprom_read(tmdev->dev, "calib_sel");
if (IS_ERR(qfprom_csel))
return PTR_ERR(qfprom_csel);
mode = (qfprom_csel[0] & CAL_SEL_MASK) >> CAL_SEL_SHIFT;
dev_dbg(tmdev->dev, "calibration mode is %d\n", mode);
switch (mode) {
case TWO_PT_CALIB:
base1 = (qfprom_cdata[1] & BASE1_MASK) >> BASE1_SHIFT;
p2[0] = (qfprom_cdata[0] & S0_P2_MASK) >> S0_P2_SHIFT;
p2[1] = (qfprom_cdata[0] & S1_P2_MASK) >> S1_P2_SHIFT;
p2[2] = (qfprom_cdata[1] & S2_P2_MASK) >> S2_P2_SHIFT;
p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT;
p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT;
for (i = 0; i < tmdev->num_sensors; i++)
p2[i] = ((base1 + p2[i]) << 3);
/* Fall through */
case ONE_PT_CALIB2:
base0 = (qfprom_cdata[0] & BASE0_MASK);
p1[0] = (qfprom_cdata[0] & S0_P1_MASK) >> S0_P1_SHIFT;
p1[1] = (qfprom_cdata[0] & S1_P1_MASK) >> S1_P1_SHIFT;
p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT;
p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT;
p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT;
for (i = 0; i < tmdev->num_sensors; i++)
p1[i] = (((base0) + p1[i]) << 3);
break;
default:
for (i = 0; i < tmdev->num_sensors; i++) {
p1[i] = 500;
p2[i] = 780;
}
break;
}
compute_intercept_slope(tmdev, p1, p2, mode);
return 0;
}
static const struct tsens_ops ops_8916 = {
.init = init_common,
.calibrate = calibrate_8916,
.get_temp = get_temp_common,
};
const struct tsens_data data_8916 = {
.num_sensors = 5,
.ops = &ops_8916,
.hw_ids = (unsigned int []){0, 1, 2, 4, 5 },
};
drivers/thermal/qcom/tsens-8960.c 0 → 100644
View file @ 2d2474a1
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/regmap.h>
#include <linux/thermal.h>
#include "tsens.h"
#define CAL_MDEGC 30000
#define CONFIG_ADDR 0x3640
#define CONFIG_ADDR_8660 0x3620
/* CONFIG_ADDR bitmasks */
#define CONFIG 0x9b
#define CONFIG_MASK 0xf
#define CONFIG_8660 1
#define CONFIG_SHIFT_8660 28
#define CONFIG_MASK_8660 (3 << CONFIG_SHIFT_8660)
#define STATUS_CNTL_ADDR_8064 0x3660
#define CNTL_ADDR 0x3620
/* CNTL_ADDR bitmasks */
#define EN BIT(0)
#define SW_RST BIT(1)
#define SENSOR0_EN BIT(3)
#define SLP_CLK_ENA BIT(26)
#define SLP_CLK_ENA_8660 BIT(24)
#define MEASURE_PERIOD 1
#define SENSOR0_SHIFT 3
/* INT_STATUS_ADDR bitmasks */
#define MIN_STATUS_MASK BIT(0)
#define LOWER_STATUS_CLR BIT(1)
#define UPPER_STATUS_CLR BIT(2)
#define MAX_STATUS_MASK BIT(3)
#define THRESHOLD_ADDR 0x3624
/* THRESHOLD_ADDR bitmasks */
#define THRESHOLD_MAX_LIMIT_SHIFT 24
#define THRESHOLD_MIN_LIMIT_SHIFT 16
#define THRESHOLD_UPPER_LIMIT_SHIFT 8
#define THRESHOLD_LOWER_LIMIT_SHIFT 0
/* Initial temperature threshold values */
#define LOWER_LIMIT_TH 0x50
#define UPPER_LIMIT_TH 0xdf
#define MIN_LIMIT_TH 0x0
#define MAX_LIMIT_TH 0xff
#define S0_STATUS_ADDR 0x3628
#define INT_STATUS_ADDR 0x363c
#define TRDY_MASK BIT(7)
#define TIMEOUT_US 100
static int suspend_8960(struct tsens_device *tmdev)
{
int ret;
unsigned int mask;
struct regmap *map = tmdev->map;
ret = regmap_read(map, THRESHOLD_ADDR, &tmdev->ctx.threshold);
if (ret)
return ret;
ret = regmap_read(map, CNTL_ADDR, &tmdev->ctx.control);
if (ret)
return ret;
if (tmdev->num_sensors > 1)
mask = SLP_CLK_ENA | EN;
else
mask = SLP_CLK_ENA_8660 | EN;
ret = regmap_update_bits(map, CNTL_ADDR, mask, 0);
if (ret)
return ret;
return 0;
}
static int resume_8960(struct tsens_device *tmdev)
{
int ret;
struct regmap *map = tmdev->map;
ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST);
if (ret)
return ret;
/*
* Separate CONFIG restore is not needed only for 8660 as
* config is part of CTRL Addr and its restored as such
*/
if (tmdev->num_sensors > 1) {
ret = regmap_update_bits(map, CONFIG_ADDR, CONFIG_MASK, CONFIG);
if (ret)
return ret;
}
ret = regmap_write(map, THRESHOLD_ADDR, tmdev->ctx.threshold);
if (ret)
return ret;
ret = regmap_write(map, CNTL_ADDR, tmdev->ctx.control);
if (ret)
return ret;
return 0;
}
static int enable_8960(struct tsens_device *tmdev, int id)
{
int ret;
u32 reg, mask;
ret = regmap_read(tmdev->map, CNTL_ADDR, &reg);
if (ret)
return ret;
mask = BIT(id + SENSOR0_SHIFT);
ret = regmap_write(tmdev->map, CNTL_ADDR, reg | SW_RST);
if (ret)
return ret;
if (tmdev->num_sensors > 1)
reg |= mask | SLP_CLK_ENA | EN;
else
reg |= mask | SLP_CLK_ENA_8660 | EN;
ret = regmap_write(tmdev->map, CNTL_ADDR, reg);
if (ret)
return ret;
return 0;
}
static void disable_8960(struct tsens_device *tmdev)
{
int ret;
u32 reg_cntl;
u32 mask;
mask = GENMASK(tmdev->num_sensors - 1, 0);
mask <<= SENSOR0_SHIFT;
mask |= EN;
ret = regmap_read(tmdev->map, CNTL_ADDR, &reg_cntl);
if (ret)
return;
reg_cntl &= ~mask;
if (tmdev->num_sensors > 1)
reg_cntl &= ~SLP_CLK_ENA;
else
reg_cntl &= ~SLP_CLK_ENA_8660;
regmap_write(tmdev->map, CNTL_ADDR, reg_cntl);
}
static int init_8960(struct tsens_device *tmdev)
{
int ret, i;
u32 reg_cntl;
tmdev->map = dev_get_regmap(tmdev->dev, NULL);
if (!tmdev->map)
return -ENODEV;
/*
* The status registers for each sensor are discontiguous
* because some SoCs have 5 sensors while others have more
* but the control registers stay in the same place, i.e
* directly after the first 5 status registers.
*/
for (i = 0; i < tmdev->num_sensors; i++) {
if (i >= 5)
tmdev->sensor[i].status = S0_STATUS_ADDR + 40;
tmdev->sensor[i].status += i * 4;
}
reg_cntl = SW_RST;
ret = regmap_update_bits(tmdev->map, CNTL_ADDR, SW_RST, reg_cntl);
if (ret)
return ret;
if (tmdev->num_sensors > 1) {
reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
reg_cntl &= ~SW_RST;
ret = regmap_update_bits(tmdev->map, CONFIG_ADDR,
CONFIG_MASK, CONFIG);
} else {
reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
reg_cntl &= ~CONFIG_MASK_8660;
reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
}
reg_cntl |= GENMASK(tmdev->num_sensors - 1, 0) << SENSOR0_SHIFT;
ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl);
if (ret)
return ret;
reg_cntl |= EN;
ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl);
if (ret)
return ret;
return 0;
}
static int calibrate_8960(struct tsens_device *tmdev)
{
int i;
char *data;
ssize_t num_read = tmdev->num_sensors;
struct tsens_sensor *s = tmdev->sensor;
data = qfprom_read(tmdev->dev, "calib");
if (IS_ERR(data))
data = qfprom_read(tmdev->dev, "calib_backup");
if (IS_ERR(data))
return PTR_ERR(data);
for (i = 0; i < num_read; i++, s++)
s->offset = data[i];
return 0;
}
/* Temperature on y axis and ADC-code on x-axis */
static inline int code_to_mdegC(u32 adc_code, const struct tsens_sensor *s)
{
int slope, offset;
slope = thermal_zone_get_slope(s->tzd);
offset = CAL_MDEGC - slope * s->offset;
return adc_code * slope + offset;
}
static int get_temp_8960(struct tsens_device *tmdev, int id, int *temp)
{
int ret;
u32 code, trdy;
const struct tsens_sensor *s = &tmdev->sensor[id];
unsigned long timeout;
timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
do {
ret = regmap_read(tmdev->map, INT_STATUS_ADDR, &trdy);
if (ret)
return ret;
if (!(trdy & TRDY_MASK))
continue;
ret = regmap_read(tmdev->map, s->status, &code);
if (ret)
return ret;
*temp = code_to_mdegC(code, s);
return 0;
} while (time_before(jiffies, timeout));
return -ETIMEDOUT;
}
static const struct tsens_ops ops_8960 = {
.init = init_8960,
.calibrate = calibrate_8960,
.get_temp = get_temp_8960,
.enable = enable_8960,
.disable = disable_8960,
.suspend = suspend_8960,
.resume = resume_8960,
};
const struct tsens_data data_8960 = {
.num_sensors = 11,
.ops = &ops_8960,
};
drivers/thermal/qcom/tsens-8974.c 0 → 100644
View file @ 2d2474a1
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/platform_device.h>
#include "tsens.h"
/* eeprom layout data for 8974 */
#define BASE1_MASK 0xff
#define S0_P1_MASK 0x3f00
#define S1_P1_MASK 0xfc000
#define S2_P1_MASK 0x3f00000
#define S3_P1_MASK 0xfc000000
#define S4_P1_MASK 0x3f
#define S5_P1_MASK 0xfc0
#define S6_P1_MASK 0x3f000
#define S7_P1_MASK 0xfc0000
#define S8_P1_MASK 0x3f000000
#define S8_P1_MASK_BKP 0x3f
#define S9_P1_MASK 0x3f
#define S9_P1_MASK_BKP 0xfc0
#define S10_P1_MASK 0xfc0
#define S10_P1_MASK_BKP 0x3f000
#define CAL_SEL_0_1 0xc0000000
#define CAL_SEL_2 0x40000000
#define CAL_SEL_SHIFT 30
#define CAL_SEL_SHIFT_2 28
#define S0_P1_SHIFT 8
#define S1_P1_SHIFT 14
#define S2_P1_SHIFT 20
#define S3_P1_SHIFT 26
#define S5_P1_SHIFT 6
#define S6_P1_SHIFT 12
#define S7_P1_SHIFT 18
#define S8_P1_SHIFT 24
#define S9_P1_BKP_SHIFT 6
#define S10_P1_SHIFT 6
#define S10_P1_BKP_SHIFT 12
#define BASE2_SHIFT 12
#define BASE2_BKP_SHIFT 18
#define S0_P2_SHIFT 20
#define S0_P2_BKP_SHIFT 26
#define S1_P2_SHIFT 26
#define S2_P2_BKP_SHIFT 6
#define S3_P2_SHIFT 6
#define S3_P2_BKP_SHIFT 12
#define S4_P2_SHIFT 12
#define S4_P2_BKP_SHIFT 18
#define S5_P2_SHIFT 18
#define S5_P2_BKP_SHIFT 24
#define S6_P2_SHIFT 24
#define S7_P2_BKP_SHIFT 6
#define S8_P2_SHIFT 6
#define S8_P2_BKP_SHIFT 12
#define S9_P2_SHIFT 12
#define S9_P2_BKP_SHIFT 18
#define S10_P2_SHIFT 18
#define S10_P2_BKP_SHIFT 24
#define BASE2_MASK 0xff000
#define BASE2_BKP_MASK 0xfc0000
#define S0_P2_MASK 0x3f00000
#define S0_P2_BKP_MASK 0xfc000000
#define S1_P2_MASK 0xfc000000
#define S1_P2_BKP_MASK 0x3f
#define S2_P2_MASK 0x3f
#define S2_P2_BKP_MASK 0xfc0
#define S3_P2_MASK 0xfc0
#define S3_P2_BKP_MASK 0x3f000
#define S4_P2_MASK 0x3f000
#define S4_P2_BKP_MASK 0xfc0000
#define S5_P2_MASK 0xfc0000
#define S5_P2_BKP_MASK 0x3f000000
#define S6_P2_MASK 0x3f000000
#define S6_P2_BKP_MASK 0x3f
#define S7_P2_MASK 0x3f
#define S7_P2_BKP_MASK 0xfc0
#define S8_P2_MASK 0xfc0
#define S8_P2_BKP_MASK 0x3f000
#define S9_P2_MASK 0x3f000
#define S9_P2_BKP_MASK 0xfc0000
#define S10_P2_MASK 0xfc0000
#define S10_P2_BKP_MASK 0x3f000000
#define BKP_SEL 0x3
#define BKP_REDUN_SEL 0xe0000000
#define BKP_REDUN_SHIFT 29
#define BIT_APPEND 0x3
static int calibrate_8974(struct tsens_device *tmdev)
{
int base1 = 0, base2 = 0, i;
u32 p1[11], p2[11];
int mode = 0;
u32 *calib, *bkp;
u32 calib_redun_sel;
calib = (u32 *)qfprom_read(tmdev->dev, "calib");
if (IS_ERR(calib))
return PTR_ERR(calib);
bkp = (u32 *)qfprom_read(tmdev->dev, "calib_backup");
if (IS_ERR(bkp))
return PTR_ERR(bkp);
calib_redun_sel = bkp[1] & BKP_REDUN_SEL;
calib_redun_sel >>= BKP_REDUN_SHIFT;
if (calib_redun_sel == BKP_SEL) {
mode = (calib[4] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
mode |= (calib[5] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
switch (mode) {
case TWO_PT_CALIB:
base2 = (bkp[2] & BASE2_BKP_MASK) >> BASE2_BKP_SHIFT;
p2[0] = (bkp[2] & S0_P2_BKP_MASK) >> S0_P2_BKP_SHIFT;
p2[1] = (bkp[3] & S1_P2_BKP_MASK);
p2[2] = (bkp[3] & S2_P2_BKP_MASK) >> S2_P2_BKP_SHIFT;
p2[3] = (bkp[3] & S3_P2_BKP_MASK) >> S3_P2_BKP_SHIFT;
p2[4] = (bkp[3] & S4_P2_BKP_MASK) >> S4_P2_BKP_SHIFT;
p2[5] = (calib[4] & S5_P2_BKP_MASK) >> S5_P2_BKP_SHIFT;
p2[6] = (calib[5] & S6_P2_BKP_MASK);
p2[7] = (calib[5] & S7_P2_BKP_MASK) >> S7_P2_BKP_SHIFT;
p2[8] = (calib[5] & S8_P2_BKP_MASK) >> S8_P2_BKP_SHIFT;
p2[9] = (calib[5] & S9_P2_BKP_MASK) >> S9_P2_BKP_SHIFT;
p2[10] = (calib[5] & S10_P2_BKP_MASK) >> S10_P2_BKP_SHIFT;
/* Fall through */
case ONE_PT_CALIB:
case ONE_PT_CALIB2:
base1 = bkp[0] & BASE1_MASK;
p1[0] = (bkp[0] & S0_P1_MASK) >> S0_P1_SHIFT;
p1[1] = (bkp[0] & S1_P1_MASK) >> S1_P1_SHIFT;
p1[2] = (bkp[0] & S2_P1_MASK) >> S2_P1_SHIFT;
p1[3] = (bkp[0] & S3_P1_MASK) >> S3_P1_SHIFT;
p1[4] = (bkp[1] & S4_P1_MASK);
p1[5] = (bkp[1] & S5_P1_MASK) >> S5_P1_SHIFT;
p1[6] = (bkp[1] & S6_P1_MASK) >> S6_P1_SHIFT;
p1[7] = (bkp[1] & S7_P1_MASK) >> S7_P1_SHIFT;
p1[8] = (bkp[2] & S8_P1_MASK_BKP) >> S8_P1_SHIFT;
p1[9] = (bkp[2] & S9_P1_MASK_BKP) >> S9_P1_BKP_SHIFT;
p1[10] = (bkp[2] & S10_P1_MASK_BKP) >> S10_P1_BKP_SHIFT;
break;
}
} else {
mode = (calib[1] & CAL_SEL_0_1) >> CAL_SEL_SHIFT;
mode |= (calib[3] & CAL_SEL_2) >> CAL_SEL_SHIFT_2;
switch (mode) {
case TWO_PT_CALIB:
base2 = (calib[2] & BASE2_MASK) >> BASE2_SHIFT;
p2[0] = (calib[2] & S0_P2_MASK) >> S0_P2_SHIFT;
p2[1] = (calib[2] & S1_P2_MASK) >> S1_P2_SHIFT;
p2[2] = (calib[3] & S2_P2_MASK);
p2[3] = (calib[3] & S3_P2_MASK) >> S3_P2_SHIFT;
p2[4] = (calib[3] & S4_P2_MASK) >> S4_P2_SHIFT;
p2[5] = (calib[3] & S5_P2_MASK) >> S5_P2_SHIFT;
p2[6] = (calib[3] & S6_P2_MASK) >> S6_P2_SHIFT;
p2[7] = (calib[4] & S7_P2_MASK);
p2[8] = (calib[4] & S8_P2_MASK) >> S8_P2_SHIFT;
p2[9] = (calib[4] & S9_P2_MASK) >> S9_P2_SHIFT;
p2[10] = (calib[4] & S10_P2_MASK) >> S10_P2_SHIFT;
/* Fall through */
case ONE_PT_CALIB:
case ONE_PT_CALIB2:
base1 = calib[0] & BASE1_MASK;
p1[0] = (calib[0] & S0_P1_MASK) >> S0_P1_SHIFT;
p1[1] = (calib[0] & S1_P1_MASK) >> S1_P1_SHIFT;
p1[2] = (calib[0] & S2_P1_MASK) >> S2_P1_SHIFT;
p1[3] = (calib[0] & S3_P1_MASK) >> S3_P1_SHIFT;
p1[4] = (calib[1] & S4_P1_MASK);
p1[5] = (calib[1] & S5_P1_MASK) >> S5_P1_SHIFT;
p1[6] = (calib[1] & S6_P1_MASK) >> S6_P1_SHIFT;
p1[7] = (calib[1] & S7_P1_MASK) >> S7_P1_SHIFT;
p1[8] = (calib[1] & S8_P1_MASK) >> S8_P1_SHIFT;
p1[9] = (calib[2] & S9_P1_MASK);
p1[10] = (calib[2] & S10_P1_MASK) >> S10_P1_SHIFT;
break;
}
}
switch (mode) {
case ONE_PT_CALIB:
for (i = 0; i < tmdev->num_sensors; i++)
p1[i] += (base1 << 2) | BIT_APPEND;
break;
case TWO_PT_CALIB:
for (i = 0; i < tmdev->num_sensors; i++) {
p2[i] += base2;
p2[i] <<= 2;
p2[i] |= BIT_APPEND;
}
/* Fall through */
case ONE_PT_CALIB2:
for (i = 0; i < tmdev->num_sensors; i++) {
p1[i] += base1;
p1[i] <<= 2;
p1[i] |= BIT_APPEND;
}
break;
default:
for (i = 0; i < tmdev->num_sensors; i++)
p2[i] = 780;
p1[0] = 502;
p1[1] = 509;
p1[2] = 503;
p1[3] = 509;
p1[4] = 505;
p1[5] = 509;
p1[6] = 507;
p1[7] = 510;
p1[8] = 508;
p1[9] = 509;
p1[10] = 508;
break;
}
compute_intercept_slope(tmdev, p1, p2, mode);
return 0;
}
static const struct tsens_ops ops_8974 = {
.init = init_common,
.calibrate = calibrate_8974,
.get_temp = get_temp_common,
};
const struct tsens_data data_8974 = {
.num_sensors = 11,
.ops = &ops_8974,
};
drivers/thermal/qcom/tsens-8996.c 0 → 100644
View file @ 2d2474a1
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include "tsens.h"
#define STATUS_OFFSET 0x10a0
#define LAST_TEMP_MASK 0xfff
#define STATUS_VALID_BIT BIT(21)
#define CODE_SIGN_BIT BIT(11)
static int get_temp_8996(struct tsens_device *tmdev, int id, int *temp)
{
struct tsens_sensor *s = &tmdev->sensor[id];
u32 code;
unsigned int sensor_addr;
int last_temp = 0, last_temp2 = 0, last_temp3 = 0, ret;
sensor_addr = STATUS_OFFSET + s->hw_id * 4;
ret = regmap_read(tmdev->map, sensor_addr, &code);
if (ret)
return ret;
last_temp = code & LAST_TEMP_MASK;
if (code & STATUS_VALID_BIT)
goto done;
/* Try a second time */
ret = regmap_read(tmdev->map, sensor_addr, &code);
if (ret)
return ret;
if (code & STATUS_VALID_BIT) {
last_temp = code & LAST_TEMP_MASK;
goto done;
} else {
last_temp2 = code & LAST_TEMP_MASK;
}
/* Try a third/last time */
ret = regmap_read(tmdev->map, sensor_addr, &code);
if (ret)
return ret;
if (code & STATUS_VALID_BIT) {
last_temp = code & LAST_TEMP_MASK;
goto done;
} else {
last_temp3 = code & LAST_TEMP_MASK;
}
if (last_temp == last_temp2)
last_temp = last_temp2;
else if (last_temp2 == last_temp3)
last_temp = last_temp3;
done:
/* Code sign bit is the sign extension for a negative value */
if (last_temp & CODE_SIGN_BIT)
last_temp |= ~CODE_SIGN_BIT;
/* Temperatures are in deciCelicius */
*temp = last_temp * 100;
return 0;
}
static const struct tsens_ops ops_8996 = {
.init = init_common,
.get_temp = get_temp_8996,
};
const struct tsens_data data_8996 = {
.num_sensors = 13,
.ops = &ops_8996,
};
drivers/thermal/qcom/tsens-common.c 0 → 100644
View file @ 2d2474a1
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/err.h>
#include <linux/io.h>
#include <linux/nvmem-consumer.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include "tsens.h"
#define S0_ST_ADDR 0x1030
#define SN_ADDR_OFFSET 0x4
#define SN_ST_TEMP_MASK 0x3ff
#define CAL_DEGC_PT1 30
#define CAL_DEGC_PT2 120
#define SLOPE_FACTOR 1000
#define SLOPE_DEFAULT 3200
char *qfprom_read(struct device *dev, const char *cname)
{
struct nvmem_cell *cell;
ssize_t data;
char *ret;
cell = nvmem_cell_get(dev, cname);
if (IS_ERR(cell))
return ERR_CAST(cell);
ret = nvmem_cell_read(cell, &data);
nvmem_cell_put(cell);
return ret;
}
/*
* Use this function on devices where slope and offset calculations
* depend on calibration data read from qfprom. On others the slope
* and offset values are derived from tz->tzp->slope and tz->tzp->offset
* resp.
*/
void compute_intercept_slope(struct tsens_device *tmdev, u32 *p1,
u32 *p2, u32 mode)
{
int i;
int num, den;
for (i = 0; i < tmdev->num_sensors; i++) {
dev_dbg(tmdev->dev,
"sensor%d - data_point1:%#x data_point2:%#x\n",
i, p1[i], p2[i]);
tmdev->sensor[i].slope = SLOPE_DEFAULT;
if (mode == TWO_PT_CALIB) {
/*
* slope (m) = adc_code2 - adc_code1 (y2 - y1)/
* temp_120_degc - temp_30_degc (x2 - x1)
*/
num = p2[i] - p1[i];
num *= SLOPE_FACTOR;
den = CAL_DEGC_PT2 - CAL_DEGC_PT1;
tmdev->sensor[i].slope = num / den;
}
tmdev->sensor[i].offset = (p1[i] * SLOPE_FACTOR) -
(CAL_DEGC_PT1 *
tmdev->sensor[i].slope);
dev_dbg(tmdev->dev, "offset:%d\n", tmdev->sensor[i].offset);
}
}
static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s)
{
int degc, num, den;
num = (adc_code * SLOPE_FACTOR) - s->offset;
den = s->slope;
if (num > 0)
degc = num + (den / 2);
else if (num < 0)
degc = num - (den / 2);
else
degc = num;
degc /= den;
return degc;
}
int get_temp_common(struct tsens_device *tmdev, int id, int *temp)
{
struct tsens_sensor *s = &tmdev->sensor[id];
u32 code;
unsigned int sensor_addr;
int last_temp = 0, ret;
sensor_addr = S0_ST_ADDR + s->hw_id * SN_ADDR_OFFSET;
ret = regmap_read(tmdev->map, sensor_addr, &code);
if (ret)
return ret;
last_temp = code & SN_ST_TEMP_MASK;
*temp = code_to_degc(last_temp, s) * 1000;
return 0;
}
static const struct regmap_config tsens_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
};
int __init init_common(struct tsens_device *tmdev)
{
void __iomem *base;
base = of_iomap(tmdev->dev->of_node, 0);
if (!base)
return -EINVAL;
tmdev->map = devm_regmap_init_mmio(tmdev->dev, base, &tsens_config);
if (IS_ERR(tmdev->map)) {
iounmap(base);
return PTR_ERR(tmdev->map);
}
return 0;
}
drivers/thermal/qcom/tsens.c 0 → 100644
View file @ 2d2474a1
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/err.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/thermal.h>
#include "tsens.h"
static int tsens_get_temp(void *data, int *temp)
{
const struct tsens_sensor *s = data;
struct tsens_device *tmdev = s->tmdev;
return tmdev->ops->get_temp(tmdev, s->id, temp);
}
static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend)
{
const struct tsens_sensor *s = p;
struct tsens_device *tmdev = s->tmdev;
if (tmdev->ops->get_trend)
return tmdev->ops->get_trend(tmdev, s->id, trend);
return -ENOTSUPP;
}
static int __maybe_unused tsens_suspend(struct device *dev)
{
struct tsens_device *tmdev = dev_get_drvdata(dev);
if (tmdev->ops && tmdev->ops->suspend)
return tmdev->ops->suspend(tmdev);
return 0;
}
static int __maybe_unused tsens_resume(struct device *dev)
{
struct tsens_device *tmdev = dev_get_drvdata(dev);
if (tmdev->ops && tmdev->ops->resume)
return tmdev->ops->resume(tmdev);
return 0;
}
static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume);
static const struct of_device_id tsens_table[] = {
{
.compatible = "qcom,msm8916-tsens",
.data = &data_8916,
}, {
.compatible = "qcom,msm8974-tsens",
.data = &data_8974,
}, {
.compatible = "qcom,msm8996-tsens",
.data = &data_8996,
},
{}
};
MODULE_DEVICE_TABLE(of, tsens_table);
static const struct thermal_zone_of_device_ops tsens_of_ops = {
.get_temp = tsens_get_temp,
.get_trend = tsens_get_trend,
};
static int tsens_register(struct tsens_device *tmdev)
{
int i;
struct thermal_zone_device *tzd;
u32 *hw_id, n = tmdev->num_sensors;
hw_id = devm_kcalloc(tmdev->dev, n, sizeof(u32), GFP_KERNEL);
if (!hw_id)
return -ENOMEM;
for (i = 0; i < tmdev->num_sensors; i++) {
tmdev->sensor[i].tmdev = tmdev;
tmdev->sensor[i].id = i;
tzd = devm_thermal_zone_of_sensor_register(tmdev->dev, i,
&tmdev->sensor[i],
&tsens_of_ops);
if (IS_ERR(tzd))
continue;
tmdev->sensor[i].tzd = tzd;
if (tmdev->ops->enable)
tmdev->ops->enable(tmdev, i);
}
return 0;
}
static int tsens_probe(struct platform_device *pdev)
{
int ret, i;
struct device *dev;
struct device_node *np;
struct tsens_sensor *s;
struct tsens_device *tmdev;
const struct tsens_data *data;
const struct of_device_id *id;
if (pdev->dev.of_node)
dev = &pdev->dev;
else
dev = pdev->dev.parent;
np = dev->of_node;
id = of_match_node(tsens_table, np);
if (id)
data = id->data;
else
data = &data_8960;
if (data->num_sensors <= 0) {
dev_err(dev, "invalid number of sensors\n");
return -EINVAL;
}
tmdev = devm_kzalloc(dev, sizeof(*tmdev) +
data->num_sensors * sizeof(*s), GFP_KERNEL);
if (!tmdev)
return -ENOMEM;
tmdev->dev = dev;
tmdev->num_sensors = data->num_sensors;
tmdev->ops = data->ops;
for (i = 0; i < tmdev->num_sensors; i++) {
if (data->hw_ids)
tmdev->sensor[i].hw_id = data->hw_ids[i];
else
tmdev->sensor[i].hw_id = i;
}
if (!tmdev->ops || !tmdev->ops->init || !tmdev->ops->get_temp)
return -EINVAL;
ret = tmdev->ops->init(tmdev);
if (ret < 0) {
dev_err(dev, "tsens init failed\n");
return ret;
}
if (tmdev->ops->calibrate) {
ret = tmdev->ops->calibrate(tmdev);
if (ret < 0) {
dev_err(dev, "tsens calibration failed\n");
return ret;
}
}
ret = tsens_register(tmdev);
platform_set_drvdata(pdev, tmdev);
return ret;
}
static int tsens_remove(struct platform_device *pdev)
{
struct tsens_device *tmdev = platform_get_drvdata(pdev);
if (tmdev->ops->disable)
tmdev->ops->disable(tmdev);
return 0;
}
static struct platform_driver tsens_driver = {
.probe = tsens_probe,
.remove = tsens_remove,
.driver = {
.name = "qcom-tsens",
.pm = &tsens_pm_ops,
.of_match_table = tsens_table,
},
};
module_platform_driver(tsens_driver);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("QCOM Temperature Sensor driver");
MODULE_ALIAS("platform:qcom-tsens");
drivers/thermal/qcom/tsens.h 0 → 100644
View file @ 2d2474a1
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __QCOM_TSENS_H__
#define __QCOM_TSENS_H__
#define ONE_PT_CALIB 0x1
#define ONE_PT_CALIB2 0x2
#define TWO_PT_CALIB 0x3
#include <linux/thermal.h>
struct tsens_device;
struct tsens_sensor {
struct tsens_device *tmdev;
struct thermal_zone_device *tzd;
int offset;
int id;
int hw_id;
int slope;
u32 status;
};
/**
* struct tsens_ops - operations as supported by the tsens device
* @init: Function to initialize the tsens device
* @calibrate: Function to calibrate the tsens device
* @get_temp: Function which returns the temp in millidegC
* @enable: Function to enable (clocks/power) tsens device
* @disable: Function to disable the tsens device
* @suspend: Function to suspend the tsens device
* @resume: Function to resume the tsens device
* @get_trend: Function to get the thermal/temp trend
*/
struct tsens_ops {
/* mandatory callbacks */
int (*init)(struct tsens_device *);
int (*calibrate)(struct tsens_device *);
int (*get_temp)(struct tsens_device *, int, int *);
/* optional callbacks */
int (*enable)(struct tsens_device *, int);
void (*disable)(struct tsens_device *);
int (*suspend)(struct tsens_device *);
int (*resume)(struct tsens_device *);
int (*get_trend)(struct tsens_device *, int, enum thermal_trend *);
};
/**
* struct tsens_data - tsens instance specific data
* @num_sensors: Max number of sensors supported by platform
* @ops: operations the tsens instance supports
* @hw_ids: Subset of sensors ids supported by platform, if not the first n
*/
struct tsens_data {
const u32 num_sensors;
const struct tsens_ops *ops;
unsigned int *hw_ids;
};
/* Registers to be saved/restored across a context loss */
struct tsens_context {
int threshold;
int control;
};
struct tsens_device {
struct device *dev;
u32 num_sensors;
struct regmap *map;
struct regmap_field *status_field;
struct tsens_context ctx;
bool trdy;
const struct tsens_ops *ops;
struct tsens_sensor sensor[0];
};
char *qfprom_read(struct device *, const char *);
void compute_intercept_slope(struct tsens_device *, u32 *, u32 *, u32);
int init_common(struct tsens_device *);
int get_temp_common(struct tsens_device *, int, int *);
extern const struct tsens_data data_8916, data_8974, data_8960, data_8996;
#endif /* __QCOM_TSENS_H__ */
drivers/thermal/qoriq_thermal.c 0 → 100644
View file @ 2d2474a1
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/thermal.h>
#include "thermal_core.h"
#define SITES_MAX 16
/*
* QorIQ TMU Registers
*/
struct qoriq_tmu_site_regs {
u32 tritsr; /* Immediate Temperature Site Register */
u32 tratsr; /* Average Temperature Site Register */
u8 res0[0x8];
};
struct qoriq_tmu_regs {
u32 tmr; /* Mode Register */
#define TMR_DISABLE 0x0
#define TMR_ME 0x80000000
#define TMR_ALPF 0x0c000000
u32 tsr; /* Status Register */
u32 tmtmir; /* Temperature measurement interval Register */
#define TMTMIR_DEFAULT 0x0000000f
u8 res0[0x14];
u32 tier; /* Interrupt Enable Register */
#define TIER_DISABLE 0x0
u32 tidr; /* Interrupt Detect Register */
u32 tiscr; /* Interrupt Site Capture Register */
u32 ticscr; /* Interrupt Critical Site Capture Register */
u8 res1[0x10];
u32 tmhtcrh; /* High Temperature Capture Register */
u32 tmhtcrl; /* Low Temperature Capture Register */
u8 res2[0x8];
u32 tmhtitr; /* High Temperature Immediate Threshold */
u32 tmhtatr; /* High Temperature Average Threshold */
u32 tmhtactr; /* High Temperature Average Crit Threshold */
u8 res3[0x24];
u32 ttcfgr; /* Temperature Configuration Register */
u32 tscfgr; /* Sensor Configuration Register */
u8 res4[0x78];
struct qoriq_tmu_site_regs site[SITES_MAX];
u8 res5[0x9f8];
u32 ipbrr0; /* IP Block Revision Register 0 */
u32 ipbrr1; /* IP Block Revision Register 1 */
u8 res6[0x310];
u32 ttr0cr; /* Temperature Range 0 Control Register */
u32 ttr1cr; /* Temperature Range 1 Control Register */
u32 ttr2cr; /* Temperature Range 2 Control Register */
u32 ttr3cr; /* Temperature Range 3 Control Register */
};
/*
* Thermal zone data
*/
struct qoriq_tmu_data {
struct thermal_zone_device *tz;
struct qoriq_tmu_regs __iomem *regs;
int sensor_id;
bool little_endian;
};
static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)
{
if (p->little_endian)
iowrite32(val, addr);
else
iowrite32be(val, addr);
}
static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)
{
if (p->little_endian)
return ioread32(addr);
else
return ioread32be(addr);
}
static int tmu_get_temp(void *p, int *temp)
{
u32 val;
struct qoriq_tmu_data *data = p;
val = tmu_read(data, &data->regs->site[data->sensor_id].tritsr);
*temp = (val & 0xff) * 1000;
return 0;
}
static int qoriq_tmu_get_sensor_id(void)
{
int ret, id;
struct of_phandle_args sensor_specs;
struct device_node *np, *sensor_np;
np = of_find_node_by_name(NULL, "thermal-zones");
if (!np)
return -ENODEV;
sensor_np = of_get_next_child(np, NULL);
ret = of_parse_phandle_with_args(sensor_np, "thermal-sensors",
"#thermal-sensor-cells",
0, &sensor_specs);
if (ret) {
of_node_put(np);
of_node_put(sensor_np);
return ret;
}
if (sensor_specs.args_count >= 1) {
id = sensor_specs.args[0];
WARN(sensor_specs.args_count > 1,
"%s: too many cells in sensor specifier %d\n",
sensor_specs.np->name, sensor_specs.args_count);
} else {
id = 0;
}
of_node_put(np);
of_node_put(sensor_np);
return id;
}
static int qoriq_tmu_calibration(struct platform_device *pdev)
{
int i, val, len;
u32 range[4];
const u32 *calibration;
struct device_node *np = pdev->dev.of_node;
struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
if (of_property_read_u32_array(np, "fsl,tmu-range", range, 4)) {
dev_err(&pdev->dev, "missing calibration range.\n");
return -ENODEV;
}
/* Init temperature range registers */
tmu_write(data, range[0], &data->regs->ttr0cr);
tmu_write(data, range[1], &data->regs->ttr1cr);
tmu_write(data, range[2], &data->regs->ttr2cr);
tmu_write(data, range[3], &data->regs->ttr3cr);
calibration = of_get_property(np, "fsl,tmu-calibration", &len);
if (calibration == NULL || len % 8) {
dev_err(&pdev->dev, "invalid calibration data.\n");
return -ENODEV;
}
for (i = 0; i < len; i += 8, calibration += 2) {
val = of_read_number(calibration, 1);
tmu_write(data, val, &data->regs->ttcfgr);
val = of_read_number(calibration + 1, 1);
tmu_write(data, val, &data->regs->tscfgr);
}
return 0;
}
static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
{
/* Disable interrupt, using polling instead */
tmu_write(data, TIER_DISABLE, &data->regs->tier);
/* Set update_interval */
tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
/* Disable monitoring */
tmu_write(data, TMR_DISABLE, &data->regs->tmr);
}
static struct thermal_zone_of_device_ops tmu_tz_ops = {
.get_temp = tmu_get_temp,
};
static int qoriq_tmu_probe(struct platform_device *pdev)
{
int ret;
const struct thermal_trip *trip;
struct qoriq_tmu_data *data;
struct device_node *np = pdev->dev.of_node;
u32 site = 0;
if (!np) {
dev_err(&pdev->dev, "Device OF-Node is NULL");
return -ENODEV;
}
data = devm_kzalloc(&pdev->dev, sizeof(struct qoriq_tmu_data),
GFP_KERNEL);
if (!data)
return -ENOMEM;
platform_set_drvdata(pdev, data);
data->little_endian = of_property_read_bool(np, "little-endian");
data->sensor_id = qoriq_tmu_get_sensor_id();
if (data->sensor_id < 0) {
dev_err(&pdev->dev, "Failed to get sensor id\n");
ret = -ENODEV;
goto err_iomap;
}
data->regs = of_iomap(np, 0);
if (!data->regs) {
dev_err(&pdev->dev, "Failed to get memory region\n");
ret = -ENODEV;
goto err_iomap;
}
qoriq_tmu_init_device(data); /* TMU initialization */
ret = qoriq_tmu_calibration(pdev); /* TMU calibration */
if (ret < 0)
goto err_tmu;
data->tz = thermal_zone_of_sensor_register(&pdev->dev, data->sensor_id,
data, &tmu_tz_ops);
if (IS_ERR(data->tz)) {
ret = PTR_ERR(data->tz);
dev_err(&pdev->dev,
"Failed to register thermal zone device %d\n", ret);
goto err_tmu;
}
trip = of_thermal_get_trip_points(data->tz);
/* Enable monitoring */
site |= 0x1 << (15 - data->sensor_id);
tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
return 0;
err_tmu:
iounmap(data->regs);
err_iomap:
platform_set_drvdata(pdev, NULL);
return ret;
}
static int qoriq_tmu_remove(struct platform_device *pdev)
{
struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
thermal_zone_of_sensor_unregister(&pdev->dev, data->tz);
/* Disable monitoring */
tmu_write(data, TMR_DISABLE, &data->regs->tmr);
iounmap(data->regs);
platform_set_drvdata(pdev, NULL);
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int qoriq_tmu_suspend(struct device *dev)
{
u32 tmr;
struct qoriq_tmu_data *data = dev_get_drvdata(dev);
/* Disable monitoring */
tmr = tmu_read(data, &data->regs->tmr);
tmr &= ~TMR_ME;
tmu_write(data, tmr, &data->regs->tmr);
return 0;
}
static int qoriq_tmu_resume(struct device *dev)
{
u32 tmr;
struct qoriq_tmu_data *data = dev_get_drvdata(dev);
/* Enable monitoring */
tmr = tmu_read(data, &data->regs->tmr);
tmr |= TMR_ME;
tmu_write(data, tmr, &data->regs->tmr);
return 0;
}
#endif
static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
qoriq_tmu_suspend, qoriq_tmu_resume);
static const struct of_device_id qoriq_tmu_match[] = {
{ .compatible = "fsl,qoriq-tmu", },
{},
};
MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
static struct platform_driver qoriq_tmu = {
.driver = {
.name = "qoriq_thermal",
.pm = &qoriq_tmu_pm_ops,
.of_match_table = qoriq_tmu_match,
},
.probe = qoriq_tmu_probe,
.remove = qoriq_tmu_remove,
};
module_platform_driver(qoriq_tmu);
MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
MODULE_LICENSE("GPL v2");
drivers/thermal/rcar_thermal.c
View file @ 2d2474a1
......@@ -31,6 +31,8 @@
#include <linux/spinlock.h>
#include <linux/thermal.h>
#include "thermal_hwmon.h"
#define IDLE_INTERVAL 5000
#define COMMON_STR 0x00
......@@ -75,6 +77,8 @@ struct rcar_thermal_priv {
#define rcar_priv_to_dev(priv) ((priv)->common->dev)
#define rcar_has_irq_support(priv) ((priv)->common->base)
#define rcar_id_to_shift(priv) ((priv)->id * 8)
#define rcar_of_data(dev) ((unsigned long)of_device_get_match_data(dev))
#define rcar_use_of_thermal(dev) (rcar_of_data(dev) == USE_OF_THERMAL)
#define USE_OF_THERMAL 1
static const struct of_device_id rcar_thermal_dt_ids[] = {
......@@ -354,7 +358,8 @@ static void rcar_thermal_work(struct work_struct *work)
return;
if (nctemp != cctemp)
thermal_zone_device_update(priv->zone);
thermal_zone_device_update(priv->zone,
THERMAL_EVENT_UNSPECIFIED);
}
static u32 rcar_thermal_had_changed(struct rcar_thermal_priv *priv, u32 status)
......@@ -415,6 +420,9 @@ static int rcar_thermal_remove(struct platform_device *pdev)
rcar_thermal_for_each_priv(priv, common) {
rcar_thermal_irq_disable(priv);
if (rcar_use_of_thermal(dev))
thermal_remove_hwmon_sysfs(priv->zone);
else
thermal_zone_device_unregister(priv->zone);
}
......@@ -430,7 +438,6 @@ static int rcar_thermal_probe(struct platform_device *pdev)
struct rcar_thermal_priv *priv;
struct device *dev = &pdev->dev;
struct resource *res, *irq;
unsigned long of_data = (unsigned long)of_device_get_match_data(dev);
int mres = 0;
int i;
int ret = -ENODEV;
......@@ -491,7 +498,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
if (ret < 0)
goto error_unregister;
if (of_data == USE_OF_THERMAL)
if (rcar_use_of_thermal(dev))
priv->zone = devm_thermal_zone_of_sensor_register(
dev, i, priv,
&rcar_thermal_zone_of_ops);
......@@ -508,6 +515,17 @@ static int rcar_thermal_probe(struct platform_device *pdev)
goto error_unregister;
}
if (rcar_use_of_thermal(dev)) {
/*
* thermal_zone doesn't enable hwmon as default,
* but, enable it here to keep compatible
*/
priv->zone->tzp->no_hwmon = false;
ret = thermal_add_hwmon_sysfs(priv->zone);
if (ret)
goto error_unregister;
}
rcar_thermal_irq_enable(priv);
list_move_tail(&priv->list, &common->head);
......
drivers/thermal/rockchip_thermal.c
View file @ 2d2474a1
......@@ -96,6 +96,7 @@ struct chip_tsadc_table {
* @initialize: SoC special initialize tsadc controller method
* @irq_ack: clear the interrupt
* @get_temp: get the temperature
* @set_alarm_temp: set the high temperature interrupt
* @set_tshut_temp: set the hardware-controlled shutdown temperature
* @set_tshut_mode: set the hardware-controlled shutdown mode
* @table: the chip-specific conversion table
......@@ -119,6 +120,8 @@ struct rockchip_tsadc_chip {
/* Per-sensor methods */
int (*get_temp)(struct chip_tsadc_table table,
int chn, void __iomem *reg, int *temp);
void (*set_alarm_temp)(struct chip_tsadc_table table,
int chn, void __iomem *reg, int temp);
void (*set_tshut_temp)(struct chip_tsadc_table table,
int chn, void __iomem *reg, int temp);
void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
......@@ -183,6 +186,7 @@ struct rockchip_thermal_data {
#define TSADCV2_INT_EN 0x08
#define TSADCV2_INT_PD 0x0c
#define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
#define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
#define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
#define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
#define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
......@@ -207,18 +211,21 @@ struct rockchip_thermal_data {
#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
#define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */
#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */
#define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */
#define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */
#define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
#define GRF_SARADC_TESTBIT 0x0e644
#define GRF_TSADC_TESTBIT_L 0x0e648
#define GRF_TSADC_TESTBIT_H 0x0e64c
#define GRF_TSADC_TSEN_PD_ON (0x30003 << 0)
#define GRF_TSADC_TSEN_PD_OFF (0x30000 << 0)
#define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
#define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
#define GRF_TSADC_VCM_EN_L (0x10001 << 7)
#define GRF_TSADC_VCM_EN_H (0x10001 << 7)
/**
* struct tsadc_table - code to temperature conversion table
......@@ -394,13 +401,17 @@ static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
int temp)
{
int high, low, mid;
u32 error = 0;
low = 0;
high = table.length - 1;
mid = (high + low) / 2;
if (temp < table.id[low].temp || temp > table.id[high].temp)
return 0;
/* Return mask code data when the temp is over table range */
if (temp < table.id[low].temp || temp > table.id[high].temp) {
error = table.data_mask;
goto exit;
}
while (low <= high) {
if (temp == table.id[mid].temp)
......@@ -412,7 +423,9 @@ static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
mid = (low + high) / 2;
}
return 0;
exit:
pr_err("Invalid the conversion, error=%d\n", error);
return error;
}
static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
......@@ -543,14 +556,34 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
/* Set interleave value to workround ic time sync issue */
writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
TSADCV2_USER_CON);
writel_relaxed(TSADCV2_AUTO_PERIOD_TIME,
regs + TSADCV2_AUTO_PERIOD);
writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
regs + TSADCV2_HIGHT_INT_DEBOUNCE);
writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
regs + TSADCV2_AUTO_PERIOD_HT);
writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
} else {
regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
mdelay(10);
regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
/* Enable the voltage common mode feature */
regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
usleep_range(15, 100); /* The spec note says at least 15 us */
regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
usleep_range(90, 200); /* The spec note says at least 90 us */
writel_relaxed(TSADCV3_AUTO_PERIOD_TIME,
regs + TSADCV2_AUTO_PERIOD);
writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
regs + TSADCV2_HIGHT_INT_DEBOUNCE);
writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
regs + TSADCV2_AUTO_PERIOD_HT);
writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
}
if (tshut_polarity == TSHUT_HIGH_ACTIVE)
......@@ -559,14 +592,6 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
else
writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
regs + TSADCV2_AUTO_CON);
writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
regs + TSADCV2_HIGHT_INT_DEBOUNCE);
writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
regs + TSADCV2_AUTO_PERIOD_HT);
writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
}
static void rk_tsadcv2_irq_ack(void __iomem *regs)
......@@ -628,12 +653,34 @@ static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
return rk_tsadcv2_code_to_temp(table, val, temp);
}
static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
int chn, void __iomem *regs, int temp)
{
u32 alarm_value, int_en;
/* Make sure the value is valid */
alarm_value = rk_tsadcv2_temp_to_code(table, temp);
if (alarm_value == table.data_mask)
return;
writel_relaxed(alarm_value & table.data_mask,
regs + TSADCV2_COMP_INT(chn));
int_en = readl_relaxed(regs + TSADCV2_INT_EN);
int_en |= TSADCV2_INT_SRC_EN(chn);
writel_relaxed(int_en, regs + TSADCV2_INT_EN);
}
static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
int chn, void __iomem *regs, int temp)
{
u32 tshut_value, val;
/* Make sure the value is valid */
tshut_value = rk_tsadcv2_temp_to_code(table, temp);
if (tshut_value == table.data_mask)
return;
writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
/* TSHUT will be valid */
......@@ -670,6 +717,7 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
.irq_ack = rk_tsadcv3_irq_ack,
.control = rk_tsadcv3_control,
.get_temp = rk_tsadcv2_get_temp,
.set_alarm_temp = rk_tsadcv2_alarm_temp,
.set_tshut_temp = rk_tsadcv2_tshut_temp,
.set_tshut_mode = rk_tsadcv2_tshut_mode,
......@@ -694,6 +742,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
.irq_ack = rk_tsadcv2_irq_ack,
.control = rk_tsadcv2_control,
.get_temp = rk_tsadcv2_get_temp,
.set_alarm_temp = rk_tsadcv2_alarm_temp,
.set_tshut_temp = rk_tsadcv2_tshut_temp,
.set_tshut_mode = rk_tsadcv2_tshut_mode,
......@@ -718,6 +767,7 @@ static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
.irq_ack = rk_tsadcv3_irq_ack,
.control = rk_tsadcv3_control,
.get_temp = rk_tsadcv2_get_temp,
.set_alarm_temp = rk_tsadcv2_alarm_temp,
.set_tshut_temp = rk_tsadcv2_tshut_temp,
.set_tshut_mode = rk_tsadcv2_tshut_mode,
......@@ -742,6 +792,7 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
.irq_ack = rk_tsadcv2_irq_ack,
.control = rk_tsadcv2_control,
.get_temp = rk_tsadcv2_get_temp,
.set_alarm_temp = rk_tsadcv2_alarm_temp,
.set_tshut_temp = rk_tsadcv2_tshut_temp,
.set_tshut_mode = rk_tsadcv2_tshut_mode,
......@@ -766,6 +817,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
.irq_ack = rk_tsadcv3_irq_ack,
.control = rk_tsadcv3_control,
.get_temp = rk_tsadcv2_get_temp,
.set_alarm_temp = rk_tsadcv2_alarm_temp,
.set_tshut_temp = rk_tsadcv2_tshut_temp,
.set_tshut_mode = rk_tsadcv2_tshut_mode,
......@@ -821,11 +873,27 @@ static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
thermal->chip->irq_ack(thermal->regs);
for (i = 0; i < thermal->chip->chn_num; i++)
thermal_zone_device_update(thermal->sensors[i].tzd);
thermal_zone_device_update(thermal->sensors[i].tzd,
THERMAL_EVENT_UNSPECIFIED);
return IRQ_HANDLED;
}
static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
{
struct rockchip_thermal_sensor *sensor = _sensor;
struct rockchip_thermal_data *thermal = sensor->thermal;
const struct rockchip_tsadc_chip *tsadc = thermal->chip;
dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
__func__, sensor->id, low, high);
tsadc->set_alarm_temp(tsadc->table,
sensor->id, thermal->regs, high);
return 0;
}
static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
{
struct rockchip_thermal_sensor *sensor = _sensor;
......@@ -843,6 +911,7 @@ static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
.get_temp = rockchip_thermal_get_temp,
.set_trips = rockchip_thermal_set_trips,
};
static int rockchip_configure_from_dt(struct device *dev,
......
drivers/thermal/samsung/exynos_tmu.c
View file @ 2d2474a1
......@@ -225,7 +225,7 @@ static void exynos_report_trigger(struct exynos_tmu_data *p)
return;
}
thermal_zone_device_update(tz);
thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED);
mutex_lock(&tz->lock);
/* Find the level for which trip happened */
......
drivers/thermal/st/st_thermal_memmap.c
View file @ 2d2474a1
......@@ -42,7 +42,8 @@ static irqreturn_t st_mmap_thermal_trip_handler(int irq, void *sdata)
{
struct st_thermal_sensor *sensor = sdata;
thermal_zone_device_update(sensor->thermal_dev);
thermal_zone_device_update(sensor->thermal_dev,
THERMAL_EVENT_UNSPECIFIED);
return IRQ_HANDLED;
}
......
drivers/thermal/tango_thermal.c
View file @ 2d2474a1
......@@ -64,6 +64,12 @@ static const struct thermal_zone_of_device_ops ops = {
.get_temp = tango_get_temp,
};
static void tango_thermal_init(struct tango_thermal_priv *priv)
{
writel(0, priv->base + TEMPSI_CFG);
writel(CMD_ON, priv->base + TEMPSI_CMD);
}
static int tango_thermal_probe(struct platform_device *pdev)
{
struct resource *res;
......@@ -79,14 +85,22 @@ static int tango_thermal_probe(struct platform_device *pdev)
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
platform_set_drvdata(pdev, priv);
priv->thresh_idx = IDX_MIN;
writel(0, priv->base + TEMPSI_CFG);
writel(CMD_ON, priv->base + TEMPSI_CMD);
tango_thermal_init(priv);
tzdev = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, priv, &ops);
return PTR_ERR_OR_ZERO(tzdev);
}
static int __maybe_unused tango_thermal_resume(struct device *dev)
{
tango_thermal_init(dev_get_drvdata(dev));
return 0;
}
static SIMPLE_DEV_PM_OPS(tango_thermal_pm, NULL, tango_thermal_resume);
static const struct of_device_id tango_sensor_ids[] = {
{
.compatible = "sigma,smp8758-thermal",
......@@ -99,6 +113,7 @@ static struct platform_driver tango_thermal_driver = {
.driver = {
.name = "tango-thermal",
.of_match_table = tango_sensor_ids,
.pm = &tango_thermal_pm,
},
};
......
drivers/thermal/tegra/soctherm.c
View file @ 2d2474a1
This diff is collapsed.
drivers/thermal/tegra/soctherm.h
View file @ 2d2474a1
......@@ -15,6 +15,11 @@
#ifndef __DRIVERS_THERMAL_TEGRA_SOCTHERM_H
#define __DRIVERS_THERMAL_TEGRA_SOCTHERM_H
#define THERMCTL_LEVEL0_GROUP_CPU 0x0
#define THERMCTL_LEVEL0_GROUP_GPU 0x4
#define THERMCTL_LEVEL0_GROUP_MEM 0x8
#define THERMCTL_LEVEL0_GROUP_TSENSE 0xc
#define SENSOR_CONFIG2 8
#define SENSOR_CONFIG2_THERMA_MASK (0xffff << 16)
#define SENSOR_CONFIG2_THERMA_SHIFT 16
......@@ -65,6 +70,9 @@ struct tegra_tsensor_group {
u32 thermtrip_enable_mask;
u32 thermtrip_any_en_mask;
u32 thermtrip_threshold_mask;
u16 thermctl_lvl0_offset;
u32 thermctl_lvl0_up_thresh_mask;
u32 thermctl_lvl0_dn_thresh_mask;
};
struct tegra_tsensor_configuration {
......@@ -103,6 +111,8 @@ struct tegra_soctherm_soc {
const unsigned int num_ttgs;
const struct tegra_soctherm_fuse *tfuse;
const int thresh_grain;
const unsigned int bptt;
const bool use_ccroc;
};
int tegra_calc_shared_calib(const struct tegra_soctherm_fuse *tfuse,
......
drivers/thermal/tegra/tegra124-soctherm.c
View file @ 2d2474a1
......@@ -28,7 +28,11 @@
#define TEGRA124_THERMTRIP_CPU_THRESH_MASK (0xff << 8)
#define TEGRA124_THERMTRIP_TSENSE_THRESH_MASK 0xff
#define TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK (0xff << 17)
#define TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK (0xff << 9)
#define TEGRA124_THRESH_GRAIN 1000
#define TEGRA124_BPTT 8
static const struct tegra_tsensor_configuration tegra124_tsensor_config = {
.tall = 16300,
......@@ -51,6 +55,9 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_cpu = {
.thermtrip_any_en_mask = TEGRA124_THERMTRIP_ANY_EN_MASK,
.thermtrip_enable_mask = TEGRA124_THERMTRIP_CPU_EN_MASK,
.thermtrip_threshold_mask = TEGRA124_THERMTRIP_CPU_THRESH_MASK,
.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU,
.thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK,
.thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK,
};
static const struct tegra_tsensor_group tegra124_tsensor_group_gpu = {
......@@ -66,6 +73,9 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_gpu = {
.thermtrip_any_en_mask = TEGRA124_THERMTRIP_ANY_EN_MASK,
.thermtrip_enable_mask = TEGRA124_THERMTRIP_GPU_EN_MASK,
.thermtrip_threshold_mask = TEGRA124_THERMTRIP_GPUMEM_THRESH_MASK,
.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU,
.thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK,
.thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK,
};
static const struct tegra_tsensor_group tegra124_tsensor_group_pll = {
......@@ -79,6 +89,9 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_pll = {
.thermtrip_any_en_mask = TEGRA124_THERMTRIP_ANY_EN_MASK,
.thermtrip_enable_mask = TEGRA124_THERMTRIP_TSENSE_EN_MASK,
.thermtrip_threshold_mask = TEGRA124_THERMTRIP_TSENSE_THRESH_MASK,
.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE,
.thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK,
.thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK,
};
static const struct tegra_tsensor_group tegra124_tsensor_group_mem = {
......@@ -94,6 +107,9 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_mem = {
.thermtrip_any_en_mask = TEGRA124_THERMTRIP_ANY_EN_MASK,
.thermtrip_enable_mask = TEGRA124_THERMTRIP_MEM_EN_MASK,
.thermtrip_threshold_mask = TEGRA124_THERMTRIP_GPUMEM_THRESH_MASK,
.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM,
.thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK,
.thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK,
};
static const struct tegra_tsensor_group *tegra124_tsensor_groups[] = {
......@@ -193,4 +209,6 @@ const struct tegra_soctherm_soc tegra124_soctherm = {
.num_ttgs = ARRAY_SIZE(tegra124_tsensor_groups),
.tfuse = &tegra124_soctherm_fuse,
.thresh_grain = TEGRA124_THRESH_GRAIN,
.bptt = TEGRA124_BPTT,
.use_ccroc = false,
};
drivers/thermal/tegra/tegra132-soctherm.c
View file @ 2d2474a1
......@@ -28,7 +28,11 @@
#define TEGRA132_THERMTRIP_CPU_THRESH_MASK (0xff << 8)
#define TEGRA132_THERMTRIP_TSENSE_THRESH_MASK 0xff
#define TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK (0xff << 17)
#define TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK (0xff << 9)
#define TEGRA132_THRESH_GRAIN 1000
#define TEGRA132_BPTT 8
static const struct tegra_tsensor_configuration tegra132_tsensor_config = {
.tall = 16300,
......@@ -51,6 +55,9 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_cpu = {
.thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK,
.thermtrip_enable_mask = TEGRA132_THERMTRIP_CPU_EN_MASK,
.thermtrip_threshold_mask = TEGRA132_THERMTRIP_CPU_THRESH_MASK,
.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU,
.thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK,
.thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK,
};
static const struct tegra_tsensor_group tegra132_tsensor_group_gpu = {
......@@ -66,6 +73,9 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_gpu = {
.thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK,
.thermtrip_enable_mask = TEGRA132_THERMTRIP_GPU_EN_MASK,
.thermtrip_threshold_mask = TEGRA132_THERMTRIP_GPUMEM_THRESH_MASK,
.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU,
.thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK,
.thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK,
};
static const struct tegra_tsensor_group tegra132_tsensor_group_pll = {
......@@ -79,6 +89,9 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_pll = {
.thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK,
.thermtrip_enable_mask = TEGRA132_THERMTRIP_TSENSE_EN_MASK,
.thermtrip_threshold_mask = TEGRA132_THERMTRIP_TSENSE_THRESH_MASK,
.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE,
.thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK,
.thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK,
};
static const struct tegra_tsensor_group tegra132_tsensor_group_mem = {
......@@ -94,6 +107,9 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_mem = {
.thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK,
.thermtrip_enable_mask = TEGRA132_THERMTRIP_MEM_EN_MASK,
.thermtrip_threshold_mask = TEGRA132_THERMTRIP_GPUMEM_THRESH_MASK,
.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM,
.thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK,
.thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK,
};
static const struct tegra_tsensor_group *tegra132_tsensor_groups[] = {
......@@ -193,4 +209,6 @@ const struct tegra_soctherm_soc tegra132_soctherm = {
.num_ttgs = ARRAY_SIZE(tegra132_tsensor_groups),
.tfuse = &tegra132_soctherm_fuse,
.thresh_grain = TEGRA132_THRESH_GRAIN,
.bptt = TEGRA132_BPTT,
.use_ccroc = true,
};
drivers/thermal/tegra/tegra210-soctherm.c
View file @ 2d2474a1
This diff is collapsed.
drivers/thermal/thermal_core.c
View file @ 2d2474a1
This diff is collapsed.
drivers/thermal/user_space.c
View file @ 2d2474a1
This diff is collapsed.
drivers/thermal/x86_pkg_temp_thermal.c
View file @ 2d2474a1
......@@ -348,7 +348,8 @@ static void pkg_temp_thermal_threshold_work_fn(struct work_struct *work)
}
if (notify) {
pr_debug("thermal_zone_device_update\n");
thermal_zone_device_update(phdev->tzone);
thermal_zone_device_update(phdev->tzone,
THERMAL_EVENT_UNSPECIFIED);
}
}
......
include/dt-bindings/thermal/tegra124-soctherm.h
View file @ 2d2474a1
......@@ -11,4 +11,9 @@
#define TEGRA124_SOCTHERM_SENSOR_PLLX 3
#define TEGRA124_SOCTHERM_SENSOR_NUM 4
#define TEGRA_SOCTHERM_THROT_LEVEL_LOW 0
#define TEGRA_SOCTHERM_THROT_LEVEL_MED 1
#define TEGRA_SOCTHERM_THROT_LEVEL_HIGH 2
#define TEGRA_SOCTHERM_THROT_LEVEL_NONE -1
#endif
include/linux/thermal.h
View file @ 2d2474a1
This diff is collapsed.
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