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Commit 2d6cc729 authored by Alex Deucher's avatar Alex Deucher
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drm/radeon: use async dma for ttm buffer moves on 6xx-SI 

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 009ee7a0
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Showing with 18 additions and 18 deletions
drivers/gpu/drm/radeon/radeon_asic.c
View file @ 2d6cc729
...@@ -974,8 +974,8 @@ static struct radeon_asic r600_asic = { ...@@ -974,8 +974,8 @@ static struct radeon_asic r600_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &r600_copy_dma, .dma = &r600_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = &r600_copy_blit, .copy = &r600_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
...@@ -1058,8 +1058,8 @@ static struct radeon_asic rs780_asic = { ...@@ -1058,8 +1058,8 @@ static struct radeon_asic rs780_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &r600_copy_dma, .dma = &r600_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = &r600_copy_blit, .copy = &r600_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
...@@ -1142,8 +1142,8 @@ static struct radeon_asic rv770_asic = { ...@@ -1142,8 +1142,8 @@ static struct radeon_asic rv770_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &r600_copy_dma, .dma = &r600_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = &r600_copy_blit, .copy = &r600_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
...@@ -1226,8 +1226,8 @@ static struct radeon_asic evergreen_asic = { ...@@ -1226,8 +1226,8 @@ static struct radeon_asic evergreen_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &evergreen_copy_dma, .dma = &evergreen_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = &r600_copy_blit, .copy = &evergreen_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
...@@ -1310,8 +1310,8 @@ static struct radeon_asic sumo_asic = { ...@@ -1310,8 +1310,8 @@ static struct radeon_asic sumo_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &evergreen_copy_dma, .dma = &evergreen_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = &r600_copy_blit, .copy = &evergreen_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
...@@ -1394,8 +1394,8 @@ static struct radeon_asic btc_asic = { ...@@ -1394,8 +1394,8 @@ static struct radeon_asic btc_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &evergreen_copy_dma, .dma = &evergreen_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = &r600_copy_blit, .copy = &evergreen_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
...@@ -1519,8 +1519,8 @@ static struct radeon_asic cayman_asic = { ...@@ -1519,8 +1519,8 @@ static struct radeon_asic cayman_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &evergreen_copy_dma, .dma = &evergreen_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = &r600_copy_blit, .copy = &evergreen_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
...@@ -1644,8 +1644,8 @@ static struct radeon_asic trinity_asic = { ...@@ -1644,8 +1644,8 @@ static struct radeon_asic trinity_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &evergreen_copy_dma, .dma = &evergreen_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = &r600_copy_blit, .copy = &evergreen_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
...@@ -1769,8 +1769,8 @@ static struct radeon_asic si_asic = { ...@@ -1769,8 +1769,8 @@ static struct radeon_asic si_asic = {
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
.dma = &si_copy_dma, .dma = &si_copy_dma,
.dma_ring_index = R600_RING_TYPE_DMA_INDEX, .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
.copy = NULL, .copy = &si_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
}, },
.surface = { .surface = {
.set_reg = r600_set_surface_reg, .set_reg = r600_set_surface_reg,
......
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