Commit 2dd0825f authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_stc.h: tidy up NI_M_CDIO_DMA_SEL_REG bits

Rename the CamelCase and convert enums into macros to set the
bits in this register.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 0dee7ecc
...@@ -621,16 +621,19 @@ static inline void ni_set_cdo_dma_channel(struct comedi_device *dev, ...@@ -621,16 +621,19 @@ static inline void ni_set_cdo_dma_channel(struct comedi_device *dev,
{ {
struct ni_private *devpriv = dev->private; struct ni_private *devpriv = dev->private;
unsigned long flags; unsigned long flags;
unsigned bits;
spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags); spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
devpriv->cdio_dma_select_reg &= ~CDO_DMA_Select_Mask; devpriv->cdio_dma_select_reg &= ~NI_M_CDIO_DMA_SEL_CDO_MASK;
if (mite_channel >= 0) { if (mite_channel >= 0) {
/*XXX just guessing ni_stc_dma_channel_select_bitfield() returns the right bits, /*
under the assumption the cdio dma selection works just like ai/ao/gpct. * XXX just guessing ni_stc_dma_channel_select_bitfield()
Definitely works for dma channels 0 and 1. */ * returns the right bits, under the assumption the cdio dma
devpriv->cdio_dma_select_reg |= * selection works just like ai/ao/gpct.
(ni_stc_dma_channel_select_bitfield(mite_channel) << * Definitely works for dma channels 0 and 1.
CDO_DMA_Select_Shift) & CDO_DMA_Select_Mask; */
bits = ni_stc_dma_channel_select_bitfield(mite_channel);
devpriv->cdio_dma_select_reg |= NI_M_CDIO_DMA_SEL_CDO(bits);
} }
ni_writeb(dev, devpriv->cdio_dma_select_reg, NI_M_CDIO_DMA_SEL_REG); ni_writeb(dev, devpriv->cdio_dma_select_reg, NI_M_CDIO_DMA_SEL_REG);
mmiowb(); mmiowb();
......
...@@ -925,6 +925,10 @@ static const struct comedi_lrange range_ni_E_ao_ext; ...@@ -925,6 +925,10 @@ static const struct comedi_lrange range_ni_E_ao_ext;
* remapping. * remapping.
*/ */
#define NI_M_CDIO_DMA_SEL_REG 0x007 #define NI_M_CDIO_DMA_SEL_REG 0x007
#define NI_M_CDIO_DMA_SEL_CDO(x) (((x) & 0xf) << 4)
#define NI_M_CDIO_DMA_SEL_CDO_MASK NI_M_CDIO_DMA_SEL_CDO(0xf)
#define NI_M_CDIO_DMA_SEL_CDI(x) (((x) & 0xf) << 0)
#define NI_M_CDIO_DMA_SEL_CDI_MASK NI_M_CDIO_DMA_SEL_CDI(0xf)
#define NI_M_SCXI_STATUS_REG 0x007 #define NI_M_SCXI_STATUS_REG 0x007
#define NI_M_AI_AO_SEL_REG 0x009 #define NI_M_AI_AO_SEL_REG 0x009
#define NI_M_G0_G1_SEL_REG 0x00b #define NI_M_G0_G1_SEL_REG 0x00b
...@@ -1047,13 +1051,6 @@ static const struct comedi_lrange range_ni_E_ao_ext; ...@@ -1047,13 +1051,6 @@ static const struct comedi_lrange range_ni_E_ao_ext;
#define NI_M_AO_REF_ATTENUATION_REG(x) (0x264 + (x)) #define NI_M_AO_REF_ATTENUATION_REG(x) (0x264 + (x))
#define NI_M_AO_REF_ATTENUATION_X5 BIT(0) #define NI_M_AO_REF_ATTENUATION_X5 BIT(0)
enum CDIO_DMA_Select_Bits {
CDI_DMA_Select_Shift = 0,
CDI_DMA_Select_Mask = 0xf,
CDO_DMA_Select_Shift = 4,
CDO_DMA_Select_Mask = 0xf << CDO_DMA_Select_Shift
};
enum CDIO_Status_Bits { enum CDIO_Status_Bits {
CDO_FIFO_Empty_Bit = 0x1, CDO_FIFO_Empty_Bit = 0x1,
CDO_FIFO_Full_Bit = 0x2, CDO_FIFO_Full_Bit = 0x2,
......
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