Skip to content

L
linux
Commit 2dfe48a8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files
Options

Merge tag 'samsung-dt64-6.8' of... 

Merge tag 'samsung-dt64-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM64 changes for v6.8

Two (and a half) major items are coming with this pull request:
1. Add specific compatibles to all Samsung Exynos and Tesla FSD blocks,
   because that's what guidelines expect [1] and is generally
   recommended practice.  Existing compatibles are left untouched, thus
   no driver changes are needed.  The work only cleans things up, so any
   future contributions will use recommended style: specific and
   fallback compatibles.

   Since no driver changes are needed in this work and the DTS is
   directly affected by bindings change (running tests with `make
   dtbs_check`), this pull includes all bindings changes, even though
   usual practice is that bindings come via driver subsystem.  Keeping
   everything here makes review and testing easier.  Also will allow us
   to avoid conflicts related to new platforms (see below).

2. Add ExynosAutov920 SoC and SADK board (Samsung Automotive Development
   Kit) with minimal support so far: serial console, GPIO-based keys and
   PWM fan.

3. Add few bindings for upcoming Google GS101 SoC.  This pull request
   does not include its DTS yet, just few reviewed dependencies.  DTS
   will be coming soon.

[1] Documentation/devicetree/bindings/writing-bindings.rst

* tag 'samsung-dt64-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (38 commits)
  arm64: dts: exynos: add minimal support for exynosautov920 sadk board
  arm64: dts: exynos: add initial support for exynosautov920 SoC
  dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum
  dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101
  dt-bindings: clock: Add Google gs101 clock management unit bindings
  dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible
  arm64: dts: fsd: add specific compatibles for Tesla FSD
  dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD
  dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD
  dt-bindings: serial: samsung: add specific compatible for Tesla FSD
  dt-bindings: pwm: samsung: add specific compatible for Tesla FSD
  dt-bindings: i2c: exynos5: add specific compatible for Tesla FSD
  arm64: dts: exynosautov9: use Exynos7 fallbacks for pin wake-up controller
  arm64: dts: exynos850: use Exynos7 fallbacks for pin wake-up controllers
  dt-bindings: hwinfo: samsung,exynos-chipid: add exynosautov920 compatible
  dt-bindings: arm: samsung: Document exynosautov920 SADK board binding
  dt-bindings: pwm: samsung: add exynosautov920 compatible
  dt-bindings: serial: samsung: add exynosautov920-uart compatible
  dt-bindings: samsung: usi: add exynosautov920-usi compatible
  dt-bindings: samsung: exynos-pmu: add exynosautov920 compatible
  ...

Link: https://lore.kernel.org/r/20231212093105.13938-1-krzysztof.kozlowski@linaro.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 487e6d8d 40af852a
Hide whitespace changes
Inline Side-by-side
Showing with 2494 additions and 134 deletions
Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
View file @ 2dfe48a8
......@@ -230,6 +230,12 @@ properties:
- samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK
- const: samsung,exynosautov9
- description: Exynos Auto v920 based boards
items:
- enum:
- samsung,exynosautov920-sadk # Samsung Exynos Auto v920 SADK
- const: samsung,exynosautov920
required:
- compatible
......
Documentation/devicetree/bindings/clock/google,gs101-clock.yaml 0 → 100644
View file @ 2dfe48a8
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Google GS101 SoC clock controller
maintainers:
- Peter Griffin <peter.griffin@linaro.org>
description: |
Google GS101 clock controller is comprised of several CMU units, generating
clocks for different domains. Those CMU units are modeled as separate device
tree nodes, and might depend on each other. The root clock in that clock tree
is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate
clock in dts.
CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume. All clocks available for usage
in clock consumer nodes are defined as preprocessor macros in
'dt-bindings/clock/gs101.h' header.
properties:
compatible:
enum:
- google,gs101-cmu-top
- google,gs101-cmu-apm
- google,gs101-cmu-misc
clocks:
minItems: 1
maxItems: 2
clock-names:
minItems: 1
maxItems: 2
"#clock-cells":
const: 1
reg:
maxItems: 1
required:
- compatible
- "#clock-cells"
- clocks
- clock-names
- reg
allOf:
- if:
properties:
compatible:
contains:
enum:
- google,gs101-cmu-top
- google,gs101-cmu-apm
then:
properties:
clocks:
items:
- description: External reference clock (24.576 MHz)
clock-names:
items:
- const: oscclk
- if:
properties:
compatible:
contains:
const: google,gs101-cmu-misc
then:
properties:
clocks:
items:
- description: Misc bus clock (from CMU_TOP)
- description: Misc sss clock (from CMU_TOP)
clock-names:
items:
- const: dout_cmu_misc_bus
- const: dout_cmu_misc_sss
additionalProperties: false
examples:
# Clock controller node for CMU_TOP
- |
#include <dt-bindings/clock/google,gs101.h>
cmu_top: clock-controller@1e080000 {
compatible = "google,gs101-cmu-top";
reg = <0x1e080000 0x8000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>;
clock-names = "oscclk";
};
...
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
View file @ 2dfe48a8
......@@ -40,6 +40,11 @@ properties:
- rockchip,rk3288-mali
- samsung,exynos5433-mali
- const: arm,mali-t760
- items:
- enum:
- samsung,exynos7-mali
- const: samsung,exynos5433-mali
- const: arm,mali-t760
- items:
- enum:
- rockchip,rk3399-mali
......
Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml
View file @ 2dfe48a8
......@@ -11,9 +11,21 @@ maintainers:
properties:
compatible:
enum:
- samsung,exynos4210-chipid
- samsung,exynos850-chipid
oneOf:
- enum:
- samsung,exynos4210-chipid
- samsung,exynos850-chipid
- items:
- enum:
- samsung,exynos5433-chipid
- samsung,exynos7-chipid
- const: samsung,exynos4210-chipid
- items:
- enum:
- samsung,exynos7885-chipid
- samsung,exynosautov9-chipid
- samsung,exynosautov920-chipid
- const: samsung,exynos850-chipid
reg:
maxItems: 1
......
Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
View file @ 2dfe48a8
......@@ -25,7 +25,16 @@ properties:
- samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420
- samsung,exynos5260-hsi2c # Exynos5260
- samsung,exynos7-hsi2c # Exynos7
- samsung,exynosautov9-hsi2c # ExynosAutoV9 and Exynos850
- samsung,exynosautov9-hsi2c
- items:
- enum:
- samsung,exynos5433-hsi2c
- tesla,fsd-hsi2c
- const: samsung,exynos7-hsi2c
- items:
- enum:
- samsung,exynos850-hsi2c
- const: samsung,exynosautov9-hsi2c
- const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420
deprecated: true
......
Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml
View file @ 2dfe48a8
......@@ -11,14 +11,20 @@ maintainers:
properties:
compatible:
enum:
- samsung,s3c2410-i2c
- samsung,s3c2440-i2c
# For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
- samsung,s3c2440-hdmiphy-i2c
# For s3c2440-like I2C used as a host to SATA PHY controller on an
# internal bus:
- samsung,exynos5-sata-phy-i2c
oneOf:
- enum:
- samsung,s3c2410-i2c
- samsung,s3c2440-i2c
# For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
- samsung,s3c2440-hdmiphy-i2c
# For s3c2440-like I2C used as a host to SATA PHY controller on an
# internal bus:
- samsung,exynos5-sata-phy-i2c
- items:
- enum:
- samsung,exynos7885-i2c
- samsung,exynos850-i2c
- const: samsung,s3c2440-i2c
'#address-cells':
const: 1
......
Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
View file @ 2dfe48a8
......@@ -11,18 +11,23 @@ maintainers:
properties:
compatible:
enum:
- samsung,exynos-adc-v1 # Exynos5250
- samsung,exynos-adc-v2
- samsung,exynos3250-adc
- samsung,exynos4212-adc # Exynos4212 and Exynos4412
- samsung,exynos7-adc
- samsung,s3c2410-adc
- samsung,s3c2416-adc
- samsung,s3c2440-adc
- samsung,s3c2443-adc
- samsung,s3c6410-adc
- samsung,s5pv210-adc
oneOf:
- enum:
- samsung,exynos-adc-v1 # Exynos5250
- samsung,exynos-adc-v2
- samsung,exynos3250-adc
- samsung,exynos4212-adc # Exynos4212 and Exynos4412
- samsung,exynos7-adc
- samsung,s3c2410-adc
- samsung,s3c2416-adc
- samsung,s3c2440-adc
- samsung,s3c2443-adc
- samsung,s3c6410-adc
- samsung,s5pv210-adc
- items:
- enum:
- samsung,exynos5433-adc
- const: samsung,exynos7-adc
reg:
maxItems: 1
......
Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml
View file @ 2dfe48a8
......@@ -85,7 +85,7 @@ examples:
};
i2s@11440000 {
compatible = "samsung,exynos7-i2s";
compatible = "samsung,exynos5433-i2s", "samsung,exynos7-i2s";
reg = <0x11440000 0x100>;
dmas = <&adma 0>, <&adma 2>;
dma-names = "tx", "rx";
......
Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml
View file @ 2dfe48a8
......@@ -14,15 +14,22 @@ maintainers:
properties:
compatible:
enum:
- samsung,exynos4210-dw-mshc
- samsung,exynos4412-dw-mshc
- samsung,exynos5250-dw-mshc
- samsung,exynos5420-dw-mshc
- samsung,exynos5420-dw-mshc-smu
- samsung,exynos7-dw-mshc
- samsung,exynos7-dw-mshc-smu
- axis,artpec8-dw-mshc
oneOf:
- enum:
- axis,artpec8-dw-mshc
- samsung,exynos4210-dw-mshc
- samsung,exynos4412-dw-mshc
- samsung,exynos5250-dw-mshc
- samsung,exynos5420-dw-mshc
- samsung,exynos5420-dw-mshc-smu
- samsung,exynos7-dw-mshc
- samsung,exynos7-dw-mshc-smu
- items:
- enum:
- samsung,exynos5433-dw-mshc-smu
- samsung,exynos7885-dw-mshc-smu
- samsung,exynos850-dw-mshc-smu
- const: samsung,exynos7-dw-mshc-smu
reg:
maxItems: 1
......
Documentation/devicetree/bindings/pwm/pwm-samsung.yaml
View file @ 2dfe48a8
......@@ -29,7 +29,11 @@ properties:
- samsung,exynos4210-pwm # 32-bit, Exynos
- items:
- enum:
- samsung,exynos5433-pwm
- samsung,exynos7-pwm
- samsung,exynosautov9-pwm
- samsung,exynosautov920-pwm
- tesla,fsd-pwm
- const: samsung,exynos4210-pwm
reg:
......
Documentation/devicetree/bindings/rtc/s3c-rtc.yaml
View file @ 2dfe48a8
......@@ -17,6 +17,11 @@ properties:
- samsung,s3c2416-rtc
- samsung,s3c2443-rtc
- samsung,s3c6410-rtc
- items:
- enum:
- samsung,exynos7-rtc
- samsung,exynos850-rtc
- const: samsung,s3c6410-rtc
- const: samsung,exynos3250-rtc
deprecated: true
......
Documentation/devicetree/bindings/serial/samsung_uart.yaml
View file @ 2dfe48a8
......@@ -18,9 +18,6 @@ description: |+
properties:
compatible:
oneOf:
- items:
- const: samsung,exynosautov9-uart
- const: samsung,exynos850-uart
- enum:
- apple,s5l-uart
- axis,artpec8-uart
......@@ -29,6 +26,20 @@ properties:
- samsung,exynos4210-uart
- samsung,exynos5433-uart
- samsung,exynos850-uart
- items:
- enum:
- samsung,exynos7-uart
- tesla,fsd-uart
- const: samsung,exynos4210-uart
- items:
- enum:
- samsung,exynos7885-uart
- const: samsung,exynos5433-uart
- items:
- enum:
- samsung,exynosautov9-uart
- samsung,exynosautov920-uart
- const: samsung,exynos850-uart
reg:
maxItems: 1
......
Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
View file @ 2dfe48a8
......@@ -15,6 +15,7 @@ select:
compatible:
contains:
enum:
- google,gs101-pmu
- samsung,exynos3250-pmu
- samsung,exynos4210-pmu
- samsung,exynos4212-pmu
......@@ -35,6 +36,7 @@ properties:
oneOf:
- items:
- enum:
- google,gs101-pmu
- samsung,exynos3250-pmu
- samsung,exynos4210-pmu
- samsung,exynos4212-pmu
......@@ -48,6 +50,14 @@ properties:
- samsung,exynos850-pmu
- samsung-s5pv210-pmu
- const: syscon
- items:
- enum:
- samsung,exynos7885-pmu
- samsung,exynosautov9-pmu
- samsung,exynosautov920-pmu
- tesla,fsd-pmu
- const: samsung,exynos7-pmu
- const: syscon
- items:
- enum:
- samsung,exynos3250-pmu
......
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
View file @ 2dfe48a8
......@@ -24,7 +24,9 @@ properties:
compatible:
oneOf:
- items:
- const: samsung,exynosautov9-usi
- enum:
- samsung,exynosautov9-usi
- samsung,exynosautov920-usi
- const: samsung,exynos850-usi
- enum:
- samsung,exynos850-usi
......@@ -155,7 +157,7 @@ examples:
};
hsi2c_0: i2c@13820000 {
compatible = "samsung,exynosautov9-hsi2c";
compatible = "samsung,exynos850-hsi2c", "samsung,exynosautov9-hsi2c";
reg = <0x13820000 0xc0>;
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......
Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml
View file @ 2dfe48a8
......@@ -14,9 +14,14 @@ properties:
oneOf:
- items:
- enum:
- google,gs101-apm-sysreg
- google,gs101-peric0-sysreg
- google,gs101-peric1-sysreg
- samsung,exynos3-sysreg
- samsung,exynos4-sysreg
- samsung,exynos5-sysreg
- samsung,exynosautov920-peric0-sysreg
- samsung,exynosautov920-peric1-sysreg
- tesla,fsd-cam-sysreg
- tesla,fsd-fsys0-sysreg
- tesla,fsd-fsys1-sysreg
......
Documentation/devicetree/bindings/sound/samsung-i2s.yaml
View file @ 2dfe48a8
......@@ -44,13 +44,18 @@ properties:
frequencies supported by Exynos7 I2S and 7.1 channel TDM support
for playback and capture TDM (Time division multiplexing) to allow
transfer of multiple channel audio data on single data line.
enum:
- samsung,s3c6410-i2s
- samsung,s5pv210-i2s
- samsung,exynos5420-i2s
- samsung,exynos7-i2s
- samsung,exynos7-i2s1
- tesla,fsd-i2s
oneOf:
- enum:
- samsung,s3c6410-i2s
- samsung,s5pv210-i2s
- samsung,exynos5420-i2s
- samsung,exynos7-i2s
- samsung,exynos7-i2s1
- tesla,fsd-i2s
- items:
- enum:
- samsung,exynos5433-i2s
- const: samsung,exynos7-i2s
'#address-cells':
const: 1
......
Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml
View file @ 2dfe48a8
......@@ -16,14 +16,19 @@ description: |+
properties:
compatible:
enum:
- samsung,s3c2410-wdt # for S3C2410
- samsung,s3c6410-wdt # for S3C6410, S5PV210 and Exynos4
- samsung,exynos5250-wdt # for Exynos5250
- samsung,exynos5420-wdt # for Exynos5420
- samsung,exynos7-wdt # for Exynos7
- samsung,exynos850-wdt # for Exynos850
- samsung,exynosautov9-wdt # for Exynosautov9
oneOf:
- enum:
- samsung,s3c2410-wdt # for S3C2410
- samsung,s3c6410-wdt # for S3C6410, S5PV210 and Exynos4
- samsung,exynos5250-wdt # for Exynos5250
- samsung,exynos5420-wdt # for Exynos5420
- samsung,exynos7-wdt # for Exynos7
- samsung,exynos850-wdt # for Exynos850
- samsung,exynosautov9-wdt # for Exynosautov9
- items:
- enum:
- tesla,fsd-wdt
- const: samsung,exynos7-wdt
reg:
maxItems: 1
......
arch/arm64/boot/dts/exynos/Makefile
View file @ 2dfe48a8
......@@ -5,4 +5,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \
exynos7-espresso.dtb \
exynos7885-jackpotlte.dtb \
exynos850-e850-96.dtb \
exynosautov9-sadk.dtb
exynosautov9-sadk.dtb \
exynosautov920-sadk.dtb
arch/arm64/boot/dts/exynos/exynos5433.dtsi
View file @ 2dfe48a8
......@@ -361,7 +361,8 @@ soc: soc@0 {
ranges = <0x0 0x0 0x0 0x18000000>;
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
compatible = "samsung,exynos5433-chipid",
"samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
......@@ -850,7 +851,8 @@ pinctrl_alive: pinctrl@10580000 {
reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
wakeup-interrupt-controller {
compatible = "samsung,exynos7-wakeup-eint";
compatible = "samsung,exynos5433-wakeup-eint",
"samsung,exynos7-wakeup-eint";
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -1546,7 +1548,7 @@ spi_4: spi@14d00000 {
};
adc: adc@14d10000 {
compatible = "samsung,exynos7-adc";
compatible = "samsung,exynos5433-adc", "samsung,exynos7-adc";
reg = <0x14d10000 0x100>;
interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "adc";
......@@ -1556,7 +1558,7 @@ adc: adc@14d10000 {
};
i2s1: i2s@14d60000 {
compatible = "samsung,exynos7-i2s";
compatible = "samsung,exynos5433-i2s", "samsung,exynos7-i2s";
reg = <0x14d60000 0x100>;
dmas = <&pdma0 31>, <&pdma0 30>;
dma-names = "tx", "rx";
......@@ -1571,7 +1573,7 @@ i2s1: i2s@14d60000 {
};
pwm: pwm@14dd0000 {
compatible = "samsung,exynos4210-pwm";
compatible = "samsung,exynos5433-pwm", "samsung,exynos4210-pwm";
reg = <0x14dd0000 0x100>;
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
......@@ -1586,7 +1588,8 @@ pwm: pwm@14dd0000 {
};
hsi2c_0: i2c@14e40000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14e40000 0x1000>;
interrupts = <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1599,7 +1602,8 @@ hsi2c_0: i2c@14e40000 {
};
hsi2c_1: i2c@14e50000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14e50000 0x1000>;
interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1612,7 +1616,8 @@ hsi2c_1: i2c@14e50000 {
};
hsi2c_2: i2c@14e60000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14e60000 0x1000>;
interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1625,7 +1630,8 @@ hsi2c_2: i2c@14e60000 {
};
hsi2c_3: i2c@14e70000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14e70000 0x1000>;
interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1638,7 +1644,8 @@ hsi2c_3: i2c@14e70000 {
};
hsi2c_4: i2c@14ec0000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14ec0000 0x1000>;
interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1651,7 +1658,8 @@ hsi2c_4: i2c@14ec0000 {
};
hsi2c_5: i2c@14ed0000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14ed0000 0x1000>;
interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1664,7 +1672,8 @@ hsi2c_5: i2c@14ed0000 {
};
hsi2c_6: i2c@14ee0000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14ee0000 0x1000>;
interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1677,7 +1686,8 @@ hsi2c_6: i2c@14ee0000 {
};
hsi2c_7: i2c@14ef0000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14ef0000 0x1000>;
interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1690,7 +1700,8 @@ hsi2c_7: i2c@14ef0000 {
};
hsi2c_8: i2c@14d90000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14d90000 0x1000>;
interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1703,7 +1714,8 @@ hsi2c_8: i2c@14d90000 {
};
hsi2c_9: i2c@14da0000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14da0000 0x1000>;
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1716,7 +1728,8 @@ hsi2c_9: i2c@14da0000 {
};
hsi2c_10: i2c@14de0000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14de0000 0x1000>;
interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1729,7 +1742,8 @@ hsi2c_10: i2c@14de0000 {
};
hsi2c_11: i2c@14df0000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "samsung,exynos5433-hsi2c",
"samsung,exynos7-hsi2c";
reg = <0x14df0000 0x1000>;
interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -1820,7 +1834,8 @@ usbhost_dwc3: usb@0 {
};
mshc_0: mmc@15540000 {
compatible = "samsung,exynos7-dw-mshc-smu";
compatible = "samsung,exynos5433-dw-mshc-smu",
"samsung,exynos7-dw-mshc-smu";
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -1833,7 +1848,8 @@ mshc_0: mmc@15540000 {
};
mshc_1: mmc@15550000 {
compatible = "samsung,exynos7-dw-mshc-smu";
compatible = "samsung,exynos5433-dw-mshc-smu",
"samsung,exynos7-dw-mshc-smu";
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -1846,7 +1862,8 @@ mshc_1: mmc@15550000 {
};
mshc_2: mmc@15560000 {
compatible = "samsung,exynos7-dw-mshc-smu";
compatible = "samsung,exynos5433-dw-mshc-smu",
"samsung,exynos7-dw-mshc-smu";
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -1897,7 +1914,8 @@ adma: dma-controller@11420000 {
};
i2s0: i2s@11440000 {
compatible = "samsung,exynos7-i2s";
compatible = "samsung,exynos5433-i2s",
"samsung,exynos7-i2s";
reg = <0x11440000 0x100>;
dmas = <&adma 0>, <&adma 2>;
dma-names = "tx", "rx";
......
arch/arm64/boot/dts/exynos/exynos7.dtsi
View file @ 2dfe48a8
......@@ -128,7 +128,8 @@ soc: soc@0 {
ranges = <0 0 0 0x18000000>;
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
compatible = "samsung,exynos7-chipid",
"samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
......@@ -279,7 +280,7 @@ clock_fsys1: clock-controller@156e0000 {
};
serial_0: serial@13630000 {
compatible = "samsung,exynos4210-uart";
compatible = "samsung,exynos7-uart", "samsung,exynos4210-uart";
reg = <0x13630000 0x100>;
interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peric0 PCLK_UART0>,
......@@ -289,7 +290,7 @@ serial_0: serial@13630000 {
};
serial_1: serial@14c20000 {
compatible = "samsung,exynos4210-uart";
compatible = "samsung,exynos7-uart", "samsung,exynos4210-uart";
reg = <0x14c20000 0x100>;
interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peric1 PCLK_UART1>,
......@@ -299,7 +300,7 @@ serial_1: serial@14c20000 {
};
serial_2: serial@14c30000 {
compatible = "samsung,exynos4210-uart";
compatible = "samsung,exynos7-uart", "samsung,exynos4210-uart";
reg = <0x14c30000 0x100>;
interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peric1 PCLK_UART2>,
......@@ -309,7 +310,7 @@ serial_2: serial@14c30000 {
};
serial_3: serial@14c40000 {
compatible = "samsung,exynos4210-uart";
compatible = "samsung,exynos7-uart", "samsung,exynos4210-uart";
reg = <0x14c40000 0x100>;
interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peric1 PCLK_UART3>,
......@@ -539,7 +540,7 @@ pmu_system_controller: system-controller@105c0000 {
};
rtc: rtc@10590000 {
compatible = "samsung,s3c6410-rtc";
compatible = "samsung,exynos7-rtc", "samsung,s3c6410-rtc";
reg = <0x10590000 0x100>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
......@@ -559,7 +560,8 @@ watchdog: watchdog@101d0000 {
};
gpu: gpu@14ac0000 {
compatible = "samsung,exynos5433-mali", "arm,mali-t760";
compatible = "samsung,exynos7-mali",
"samsung,exynos5433-mali", "arm,mali-t760";
reg = <0x14ac0000 0x5000>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
......@@ -619,7 +621,7 @@ adc: adc@13620000 {
};
pwm: pwm@136c0000 {
compatible = "samsung,exynos4210-pwm";
compatible = "samsung,exynos7-pwm", "samsung,exynos4210-pwm";
reg = <0x136c0000 0x100>;
interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
......
arch/arm64/boot/dts/exynos/exynos7885.dtsi
View file @ 2dfe48a8
......@@ -172,7 +172,8 @@ soc: soc@0 {
ranges = <0x0 0x0 0x0 0x20000000>;
chipid@10000000 {
compatible = "samsung,exynos850-chipid";
compatible = "samsung,exynos7885-chipid",
"samsung,exynos850-chipid";
reg = <0x10000000 0x24>;
};
......@@ -264,7 +265,8 @@ pinctrl_alive: pinctrl@11cb0000 {
reg = <0x11cb0000 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynos7-wakeup-eint";
compatible = "samsung,exynos7885-wakeup-eint",
"samsung,exynos7-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
};
......@@ -289,12 +291,14 @@ pinctrl_dispaud: pinctrl@148f0000 {
};
pmu_system_controller: system-controller@11c80000 {
compatible = "samsung,exynos7-pmu", "syscon";
compatible = "samsung,exynos7885-pmu",
"samsung,exynos7-pmu", "syscon";
reg = <0x11c80000 0x10000>;
};
mmc_0: mmc@13500000 {
compatible = "samsung,exynos7-dw-mshc-smu";
compatible = "samsung,exynos7885-dw-mshc-smu",
"samsung,exynos7-dw-mshc-smu";
reg = <0x13500000 0x2000>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -307,7 +311,8 @@ mmc_0: mmc@13500000 {
};
serial_0: serial@13800000 {
compatible = "samsung,exynos5433-uart";
compatible = "samsung,exynos7885-uart",
"samsung,exynos5433-uart";
reg = <0x13800000 0x100>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
......@@ -320,7 +325,8 @@ serial_0: serial@13800000 {
};
serial_1: serial@13810000 {
compatible = "samsung,exynos5433-uart";
compatible = "samsung,exynos7885-uart",
"samsung,exynos5433-uart";
reg = <0x13810000 0x100>;
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
......@@ -333,7 +339,8 @@ serial_1: serial@13810000 {
};
serial_2: serial@13820000 {
compatible = "samsung,exynos5433-uart";
compatible = "samsung,exynos7885-uart",
"samsung,exynos5433-uart";
reg = <0x13820000 0x100>;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
......@@ -346,7 +353,8 @@ serial_2: serial@13820000 {
};
i2c_0: i2c@13830000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos7885-i2c",
"samsung,s3c2440-i2c";
reg = <0x13830000 0x100>;
interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -359,7 +367,8 @@ i2c_0: i2c@13830000 {
};
i2c_1: i2c@13840000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos7885-i2c",
"samsung,s3c2440-i2c";
reg = <0x13840000 0x100>;
interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -372,7 +381,8 @@ i2c_1: i2c@13840000 {
};
i2c_2: i2c@13850000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos7885-i2c",
"samsung,s3c2440-i2c";
reg = <0x13850000 0x100>;
interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -385,7 +395,8 @@ i2c_2: i2c@13850000 {
};
i2c_3: i2c@13860000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos7885-i2c",
"samsung,s3c2440-i2c";
reg = <0x13860000 0x100>;
interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -398,7 +409,8 @@ i2c_3: i2c@13860000 {
};
i2c_4: i2c@13870000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos7885-i2c",
"samsung,s3c2440-i2c";
reg = <0x13870000 0x100>;
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -411,7 +423,8 @@ i2c_4: i2c@13870000 {
};
i2c_5: i2c@13880000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos7885-i2c",
"samsung,s3c2440-i2c";
reg = <0x13880000 0x100>;
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -424,7 +437,8 @@ i2c_5: i2c@13880000 {
};
i2c_6: i2c@13890000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos7885-i2c",
"samsung,s3c2440-i2c";
reg = <0x13890000 0x100>;
interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -437,7 +451,8 @@ i2c_6: i2c@13890000 {
};
i2c_7: i2c@11cd0000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos7885-i2c",
"samsung,s3c2440-i2c";
reg = <0x11cd0000 0x100>;
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......
arch/arm64/boot/dts/exynos/exynos850.dtsi
View file @ 2dfe48a8
......@@ -359,7 +359,8 @@ pinctrl_alive: pinctrl@11850000 {
reg = <0x11850000 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynos850-wakeup-eint";
compatible = "samsung,exynos850-wakeup-eint",
"samsung,exynos7-wakeup-eint";
};
};
......@@ -368,7 +369,8 @@ pinctrl_cmgp: pinctrl@11c30000 {
reg = <0x11c30000 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynos850-wakeup-eint";
compatible = "samsung,exynos850-wakeup-eint",
"samsung,exynos7-wakeup-eint";
};
};
......@@ -396,7 +398,7 @@ pinctrl_aud: pinctrl@14a60000 {
};
rtc: rtc@11a30000 {
compatible = "samsung,s3c6410-rtc";
compatible = "samsung,exynos850-rtc", "samsung,s3c6410-rtc";
reg = <0x11a30000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
......@@ -406,7 +408,8 @@ rtc: rtc@11a30000 {
};
mmc_0: mmc@12100000 {
compatible = "samsung,exynos7-dw-mshc-smu";
compatible = "samsung,exynos850-dw-mshc-smu",
"samsung,exynos7-dw-mshc-smu";
reg = <0x12100000 0x2000>;
interrupts = <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -419,7 +422,7 @@ mmc_0: mmc@12100000 {
};
i2c_0: i2c@13830000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
reg = <0x13830000 0x100>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -432,7 +435,7 @@ i2c_0: i2c@13830000 {
};
i2c_1: i2c@13840000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
reg = <0x13840000 0x100>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -445,7 +448,7 @@ i2c_1: i2c@13840000 {
};
i2c_2: i2c@13850000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
reg = <0x13850000 0x100>;
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -458,7 +461,7 @@ i2c_2: i2c@13850000 {
};
i2c_3: i2c@13860000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
reg = <0x13860000 0x100>;
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -471,7 +474,7 @@ i2c_3: i2c@13860000 {
};
i2c_4: i2c@13870000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
reg = <0x13870000 0x100>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -485,7 +488,7 @@ i2c_4: i2c@13870000 {
/* I2C_5 (also called CAM_PMIC_I2C in TRM) */
i2c_5: i2c@13880000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
reg = <0x13880000 0x100>;
interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -499,7 +502,7 @@ i2c_5: i2c@13880000 {
/* I2C_6 (also called MOTOR_I2C in TRM) */
i2c_6: i2c@13890000 {
compatible = "samsung,s3c2440-i2c";
compatible = "samsung,exynos850-i2c", "samsung,s3c2440-i2c";
reg = <0x13890000 0x100>;
interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -640,7 +643,8 @@ usi_hsi2c_0: usi@138a00c0 {
status = "disabled";
hsi2c_0: i2c@138a0000 {
compatible = "samsung,exynosautov9-hsi2c";
compatible = "samsung,exynos850-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x138a0000 0xc0>;
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -668,7 +672,8 @@ usi_hsi2c_1: usi@138b00c0 {
status = "disabled";
hsi2c_1: i2c@138b0000 {
compatible = "samsung,exynosautov9-hsi2c";
compatible = "samsung,exynos850-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x138b0000 0xc0>;
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -696,7 +701,8 @@ usi_hsi2c_2: usi@138c00c0 {
status = "disabled";
hsi2c_2: i2c@138c0000 {
compatible = "samsung,exynosautov9-hsi2c";
compatible = "samsung,exynos850-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x138c0000 0xc0>;
interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -738,7 +744,8 @@ usi_cmgp0: usi@11d000c0 {
status = "disabled";
hsi2c_3: i2c@11d00000 {
compatible = "samsung,exynosautov9-hsi2c";
compatible = "samsung,exynos850-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d00000 0xc0>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -778,7 +785,8 @@ usi_cmgp1: usi@11d200c0 {
status = "disabled";
hsi2c_4: i2c@11d20000 {
compatible = "samsung,exynosautov9-hsi2c";
compatible = "samsung,exynos850-hsi2c",
"samsung,exynosautov9-hsi2c";
reg = <0x11d20000 0xc0>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......
arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts
View file @ 2dfe48a8
......@@ -9,6 +9,7 @@
/dts-v1/;
#include "exynosautov9.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Samsung ExynosAuto v9 SADK board";
......@@ -32,6 +33,31 @@ memory@80000000 {
<0xa 0x00000000 0x2 0x00000000>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_wakeup &key_volup &key_voldown>;
key-wakeup {
label = "Wakeup";
linux,code = <KEY_WAKEUP>;
gpios = <&gpa0 0 GPIO_ACTIVE_LOW>;
wakeup-source;
};
key-volume-down {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
gpios = <&gpg2 0 GPIO_ACTIVE_LOW>;
};
key-volume-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&gpg1 5 GPIO_ACTIVE_LOW>;
};
};
ufs_0_fixed_vcc_reg: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "ufs-vcc";
......@@ -49,6 +75,31 @@ ufs_1_fixed_vcc_reg: regulator-1 {
};
};
&pinctrl_alive {
key_wakeup: key-wakeup-pins {
samsung,pins = "gpa0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
};
};
&pinctrl_peric1 {
key_voldown: key-voldown-pins {
samsung,pins = "gpg2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
};
key_volup: key-volup-pins {
samsung,pins = "gpg1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_tout3>;
......
arch/arm64/boot/dts/exynos/exynosautov9.dtsi
View file @ 2dfe48a8
......@@ -166,7 +166,8 @@ soc: soc@0 {
ranges = <0x0 0x0 0x0 0x20000000>;
chipid@10000000 {
compatible = "samsung,exynos850-chipid";
compatible = "samsung,exynosautov9-chipid",
"samsung,exynos850-chipid";
reg = <0x10000000 0x24>;
};
......@@ -309,7 +310,9 @@ pinctrl_alive: pinctrl@10450000 {
reg = <0x10450000 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynosautov9-wakeup-eint";
compatible = "samsung,exynosautov9-wakeup-eint",
"samsung,exynos850-wakeup-eint",
"samsung,exynos7-wakeup-eint";
};
};
......@@ -349,7 +352,8 @@ pinctrl_peric1: pinctrl@10830000 {
};
pmu_system_controller: system-controller@10460000 {
compatible = "samsung,exynos7-pmu", "syscon";
compatible = "samsung,exynosautov9-pmu",
"samsung,exynos7-pmu", "syscon";
reg = <0x10460000 0x10000>;
reboot: syscon-reboot {
......
arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi 0 → 100644
View file @ 2dfe48a8
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source
*
* Copyright (c) 2023 Samsung Electronics Co., Ltd.
*
* Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as
* device tree nodes in this file.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "exynos-pinctrl.h"
&pinctrl_alive {
gpa0: gpa0-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
};
gpa1: gpa1-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
};
gpq0: gpq0-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
&pinctrl_aud {
gpb0: gpb0-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb1: gpb1-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb2: gpb2-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb3: gpb3-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb4: gpb4-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb5: gpb5-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb6: gpb6-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
&pinctrl_hsi0 {
gph0: gph0-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gph1: gph1-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
&pinctrl_hsi1 {
gph8: gph8-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
&pinctrl_hsi2 {
gph3: gph3-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gph4: gph4-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gph5: gph5-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gph6: gph6-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
&pinctrl_hsi2ufs {
gph2: gph2-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
ufs_refclk_out: ufs-refclk-out-pins {
samsung,pins = "gph2-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-con-pdn = <EXYNOS_PIN_PULL_NONE>;
};
ufs_rst_n: ufs-rst-n-pins {
samsung,pins = "gph2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
};
ufs_refclk_out_1: ufs-refclk-out-1-pins {
samsung,pins = "gph2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
};
ufs_rst_n_1: ufs-rst-n-1-pins {
samsung,pins = "gph2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
};
};
&pinctrl_peric0 {
gpg0: gpg0-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpg2: gpg2-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpg3: gpg3-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpg4: gpg4-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpg5: gpg5-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp0: gpp0-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp1: gpp1-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp2: gpp2-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp3: gpp3-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp4: gpp4-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* PWM PERIC0 */
pwm_tout0: pwm-tout0-pins {
samsung,pins = "gpg0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
pwm_tout1: pwm-tout1-pins {
samsung,pins = "gpg0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
pwm_tout2: pwm-tout2-pins {
samsung,pins = "gpg0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
pwm_tout3: pwm-tout3-pins {
samsung,pins = "gpg0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI00 */
uart0_bus: uart0-bus-pins {
samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart0_bus_dual: uart0-bus-dual-pins {
samsung,pins = "gpp0-0", "gpp0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI01 */
uart1_bus: uart1-bus-pins {
samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart1_bus_dual: uart1-bus-dual-pins {
samsung,pins = "gpp0-4", "gpp0-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI02 */
uart2_bus: uart2-bus-pins {
samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart2_bus_dual: uart2-bus-dual-pins {
samsung,pins = "gpp1-0", "gpp1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI03 */
uart3_bus: uart3-bus-pins {
samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart3_bus_dual: uart3-bus-dual-pins {
samsung,pins = "gpp1-4", "gpp1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI04 */
uart4_bus: uart4-bus-pins {
samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart4_bus_dual: uart4-bus-dual-pins {
samsung,pins = "gpp2-0", "gpp2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI05 */
uart5_bus: uart5-bus-pins {
samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart5_bus_dual: uart5-bus-dual-pins {
samsung,pins = "gpp2-4", "gpp2-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI06 */
uart6_bus: uart6-bus-pins {
samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2", "gpp3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart6_bus_dual: uart6-bus-dual-pins {
samsung,pins = "gpp3-0", "gpp3-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI07 */
uart7_bus: uart7-bus-pins {
samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6", "gpp3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart7_bus_dual: uart7-bus-dual-pins {
samsung,pins = "gpp3-4", "gpp3-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC0_USI08 */
uart8_bus: uart8-bus-pins {
samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2", "gpp4-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart8_bus_dual: uart8-bus-dual-pins {
samsung,pins = "gpp4-0", "gpp4-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI00 */
hsi2c0_bus: hsi2c0-bus-pins {
samsung,pins = "gpp0-0", "gpp0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI00_I2C */
hsi2c1_bus: hsi2c1-bus-pins {
samsung,pins = "gpp0-2", "gpp0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI01 */
hsi2c2_bus: hsi2c2-bus-pins {
samsung,pins = "gpp0-4", "gpp0-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI01_I2C */
hsi2c3_bus: hsi2c3-bus-pins {
samsung,pins = "gpp0-6", "gpp0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI02 */
hsi2c4_bus: hsi2c4-bus-pins {
samsung,pins = "gpp1-0", "gpp1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI02_I2C */
hsi2c5_bus: hsi2c5-bus-pins {
samsung,pins = "gpp1-2", "gpp1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI03 */
hsi2c6_bus: hsi2c6-bus-pins {
samsung,pins = "gpp1-4", "gpp1-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI03_I2C */
hsi2c7_bus: hsi2c7-bus-pins {
samsung,pins = "gpp1-6", "gpp1-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI04 */
hsi2c8_bus: hsi2c8-bus-pins {
samsung,pins = "gpp2-0", "gpp2-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI04_I2C */
hsi2c9_bus: hsi2c9-bus-pins {
samsung,pins = "gpp2-2", "gpp2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI05 */
hsi2c10_bus: hsi2c10-bus-pins {
samsung,pins = "gpp2-4", "gpp2-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI05_I2C */
hsi2c11_bus: hsi2c11-bus-pins {
samsung,pins = "gpp2-6", "gpp2-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI06 */
hsi2c12_bus: hsi2c12-bus-pins {
samsung,pins = "gpp3-0", "gpp3-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI06_I2C */
hsi2c13_bus: hsi2c13-bus-pins {
samsung,pins = "gpp3-2", "gpp3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI07 */
hsi2c14_bus: hsi2c14-bus-pins {
samsung,pins = "gpp3-4", "gpp3-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI07_I2C */
hsi2c15_bus: hsi2c15-bus-pins {
samsung,pins = "gpp3-6", "gpp3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI08 */
hsi2c16_bus: hsi2c16-bus-pins {
samsung,pins = "gpp4-0", "gpp4-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC0 USI08_I2C */
hsi2c17_bus: hsi2c17-bus-pins {
samsung,pins = "gpp4-2", "gpp4-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI00 */
spi0_bus: spi0-bus-pins {
samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi0_cs: spi0-cs-pins {
samsung,pins = "gpp0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi0_cs_func: spi0-cs-func-pins {
samsung,pins = "gpp0-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI01 */
spi1_bus: spi1-bus-pins {
samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi1_cs: spi1-cs-pins {
samsung,pins = "gpp0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi1_cs_func: spi1-cs-func-pins {
samsung,pins = "gpp0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI02 */
spi2_bus: spi2-bus-pins {
samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi2_cs: spi2-cs-pins {
samsung,pins = "gpp1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi2_cs_func: spi2-cs-func-pins {
samsung,pins = "gpp1-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI03 */
spi3_bus: spi3-bus-pins {
samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi3_cs: spi3-cs-pins {
samsung,pins = "gpp1-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi3_cs_func: spi3-cs-func-pins {
samsung,pins = "gpp1-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI04 */
spi4_bus: spi4-bus-pins {
samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi4_cs: spi4-cs-pins {
samsung,pins = "gpp2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi4_cs_func: spi4-cs-func-pins {
samsung,pins = "gpp2-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI05 */
spi5_bus: spi5-bus-pins {
samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi5_cs: spi5-cs-pins {
samsung,pins = "gpp2-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi5_cs_func: spi5-cs-func-pins {
samsung,pins = "gpp2-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI06 */
spi6_bus: spi6-bus-pins {
samsung,pins = "gpp3-0", "gpp3-1", "gpp3-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi6_cs: spi6-cs-pins {
samsung,pins = "gpp3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi6_cs_func: spi6-cs-func-pins {
samsung,pins = "gpp3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI07 */
spi7_bus: spi7-bus-pins {
samsung,pins = "gpp3-4", "gpp3-5", "gpp3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi7_cs: spi7-cs-pins {
samsung,pins = "gpp3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi7_cs_func: spi7-cs-func-pins {
samsung,pins = "gpp3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC0 USI08 */
spi8_bus: spi8-bus-pins {
samsung,pins = "gpp4-0", "gpp4-1", "gpp4-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi8_cs: spi8-cs-pins {
samsung,pins = "gpp4-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi8_cs_func: spi8-cs-func-pins {
samsung,pins = "gpp4-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I3C PERIC0 */
i3c0_bus: i3c0-bus-pins {
samsung,pins = "gpp2-6", "gpp2-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
i3c1_bus: i3c1-bus-pins {
samsung,pins = "gpp3-2", "gpp3-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
i3c2_bus: i3c2-bus-pins {
samsung,pins = "gpp3-6", "gpp3-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
i3c3_bus: i3c3-bus-pins {
samsung,pins = "gpp4-2", "gpp4-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
};
&pinctrl_peric1 {
gpg1: gpg1-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp5: gpp5-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp6: gpp6-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp7: gpp7-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp8: gpp8-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp9: gpp9-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp10: gpp10-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp11: gpp11-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpp12: gpp12-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* UART PERIC1 USI09 */
uart9_bus: uart9-bus-pins {
samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2", "gpp5-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart9_bus_dual: uart9-bus-dual-pins {
samsung,pins = "gpp5-0", "gpp5-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC1 USI10 */
uart10_bus: uart10-bus-pins {
samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6", "gpp5-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart10_bus_dual: uart10-bus-dual-pins {
samsung,pins = "gpp5-4", "gpp5-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC1 USI11 */
uart11_bus: uart11-bus-pins {
samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2", "gpp10-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart11_bus_dual: uart11-bus-dual-pins {
samsung,pins = "gpp10-0", "gpp10-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC1_USI12 */
uart12_bus: uart12-bus-pins {
samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2", "gpp7-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart12_bus_dual: uart12-bus-dual-pins {
samsung,pins = "gpp7-0", "gpp7-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC1_USI13 */
uart13_bus: uart13-bus-pins {
samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6", "gpp7-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart13_bus_dual: uart13-bus-dual-pins {
samsung,pins = "gpp7-4", "gpp7-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC1 USI14 */
uart14_bus: uart14-bus-pins {
samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2", "gpp8-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart14_bus_dual: uart14-bus-dual-pins {
samsung,pins = "gpp8-0", "gpp8-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC1 USI15 */
uart15_bus: uart15-bus-pins {
samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2", "gpp11-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart15_bus_dual: uart15-bus-dual-pins {
samsung,pins = "gpp11-0", "gpp11-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC1 USI16 */
uart16_bus: uart16-bus-pins {
samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2", "gpp9-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart16_bus_dual: uart16-bus-dual-pins {
samsung,pins = "gpp9-0", "gpp9-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* UART PERIC1 USI17 */
uart17_bus: uart17-bus-pins {
samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2", "gpp12-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
uart17_bus_dual: uart17-bus-dual-pins {
samsung,pins = "gpp12-0", "gpp12-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI09 */
hsi2c18_bus: hsi2c18-bus-pins {
samsung,pins = "gpp5-0", "gpp5-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI09_I2C */
hsi2c19_bus: hsi2c19-bus-pins {
samsung,pins = "gpp5-2", "gpp5-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI10 */
hsi2c20_bus: hsi2c20-bus-pins {
samsung,pins = "gpp5-4", "gpp5-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI10_I2C */
hsi2c21_bus: hsi2c21-bus-pins {
samsung,pins = "gpp5-6", "gpp5-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI11 */
hsi2c22_bus: hsi2c22-bus-pins {
samsung,pins = "gpp10-0", "gpp10-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI11_I2C */
hsi2c23_bus: hsi2c23-bus-pins {
samsung,pins = "gpp10-2", "gpp10-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI12 */
hsi2c24_bus: hsi2c24-bus-pins {
samsung,pins = "gpp7-0", "gpp7-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI12_I2C */
hsi2c25_bus: hsi2c25-bus-pins {
samsung,pins = "gpp7-2", "gpp7-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI13 */
hsi2c26_bus: hsi2c26-bus-pins {
samsung,pins = "gpp7-4", "gpp7-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI13_I2C */
hsi2c27_bus: hsi2c27-bus-pins {
samsung,pins = "gpp7-6", "gpp7-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI14 */
hsi2c28_bus: hsi2c28-bus-pins {
samsung,pins = "gpp8-0", "gpp8-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI14_I2C */
hsi2c29_bus: hsi2c29-bus-pins {
samsung,pins = "gpp8-2", "gpp8-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI15 */
hsi2c30_bus: hsi2c30-bus-pins {
samsung,pins = "gpp11-0", "gpp11-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI15_I2C */
hsi2c31_bus: hsi2c31-bus-pins {
samsung,pins = "gpp11-2", "gpp11-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI16 */
hsi2c32_bus: hsi2c32-bus-pins {
samsung,pins = "gpp9-0", "gpp9-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI16_I2C */
hsi2c33_bus: hsi2c33-bus-pins {
samsung,pins = "gpp9-2", "gpp9-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI17 */
hsi2c34_bus: hsi2c34-bus-pins {
samsung,pins = "gpp12-0", "gpp12-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I2C PERIC1 USI17_I2C */
hsi2c35_bus: hsi2c35-bus-pins {
samsung,pins = "gpp12-2", "gpp12-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI09 */
spi9_bus: spi9-bus-pins {
samsung,pins = "gpp5-0", "gpp5-1", "gpp5-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi9_cs: spi9-cs-pins {
samsung,pins = "gpp5-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi9_cs_func: spi9-cs-func-pins {
samsung,pins = "gpp5-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI10 */
spi10_bus: spi10-bus-pins {
samsung,pins = "gpp5-4", "gpp5-5", "gpp5-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi10_cs: spi10-cs-pins {
samsung,pins = "gpp5-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi10_cs_func: spi10-cs-func-pins {
samsung,pins = "gpp5-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI11 */
spi11_bus: spi11-bus-pins {
samsung,pins = "gpp10-0", "gpp10-1", "gpp10-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi11_cs: spi11-cs-pins {
samsung,pins = "gpp10-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi11_cs_func: spi11-cs-func-pins {
samsung,pins = "gpp10-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI12 */
spi12_bus: spi12-bus-pins {
samsung,pins = "gpp7-0", "gpp7-1", "gpp7-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi12_cs: spi12-cs-pins {
samsung,pins = "gpp7-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi12_cs_func: spi12-cs-func-pins {
samsung,pins = "gpp7-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI13 */
spi13_bus: spi13-bus-pins {
samsung,pins = "gpp7-4", "gpp7-5", "gpp7-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi13_cs: spi13-cs-pins {
samsung,pins = "gpp7-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi13_cs_func: spi13-cs-func-pins {
samsung,pins = "gpp7-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI14 */
spi14_bus: spi14-bus-pins {
samsung,pins = "gpp8-0", "gpp8-1", "gpp8-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi14_cs: spi14-cs-pins {
samsung,pins = "gpp8-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi14_cs_func: spi14-cs-func-pins {
samsung,pins = "gpp8-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI15 */
spi15_bus: spi15-bus-pins {
samsung,pins = "gpp11-0", "gpp11-1", "gpp11-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi15_cs: spi15-cs-pins {
samsung,pins = "gpp11-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi15_cs_func: spi15-cs-func-pins {
samsung,pins = "gpp11-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI16 */
spi16_bus: spi16-bus-pins {
samsung,pins = "gpp9-0", "gpp9-1", "gpp9-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi16_cs: spi16-cs-pins {
samsung,pins = "gpp9-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi16_cs_func: spi16-cs-func-pins {
samsung,pins = "gpp9-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* SPI PERIC1 USI17 */
spi17_bus: spi17-bus-pins {
samsung,pins = "gpp12-0", "gpp12-1", "gpp12-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi17_cs: spi17-cs-pins {
samsung,pins = "gpp12-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
spi17_cs_func: spi17-cs-func-pins {
samsung,pins = "gpp12-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
/* I3C PERIC1 */
i3c4_bus: i3c4-bus-pins {
samsung,pins = "gpp7-2", "gpp7-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
i3c5_bus: i3c5-bus-pins {
samsung,pins = "gpp7-6", "gpp7-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
i3c6_bus: i3c6-bus-pins {
samsung,pins = "gpp8-2", "gpp8-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
i3c7_bus: i3c7-bus-pins {
samsung,pins = "gpp11-2", "gpp11-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
};
arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts 0 → 100644
View file @ 2dfe48a8
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's ExynosAutov920 SADK board device tree source
*
* Copyright (c) 2023 Samsung Electronics Co., Ltd.
*
*/
/dts-v1/;
#include "exynosautov920.dtsi"
#include "exynos-pinctrl.h"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Samsung ExynosAutov920 SADK board";
compatible = "samsung,exynosautov920-sadk", "samsung,exynosautov920";
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &serial_0;
};
chosen {
stdout-path = &serial_0;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_wakeup &key_back>;
key-wakeup {
label = "KEY_WAKEUP";
linux,code = <KEY_WAKEUP>;
gpios = <&gpa0 0 GPIO_ACTIVE_LOW>;
wakeup-source;
};
key-back {
label = "KEY_BACK";
linux,code = <KEY_BACK>;
gpios = <&gpp6 3 GPIO_ACTIVE_LOW>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x70000000>,
<0x8 0x80000000 0x1 0xfba00000>,
<0xa 0x00000000 0x2 0x00000000>;
};
};
&pinctrl_alive {
key_wakeup: key-wakeup-pins {
samsung,pins = "gpa0-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
};
};
&pinctrl_peric1 {
key_back: key-back-pins {
samsung,pins = "gpp6-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_tout0>;
status = "okay";
};
&serial_0 {
status = "okay";
};
&usi_0 {
samsung,clkreq-on; /* needed for UART mode */
status = "okay";
};
&xtcxo {
clock-frequency = <38400000>;
};
arch/arm64/boot/dts/exynos/exynosautov920.dtsi 0 → 100644
View file @ 2dfe48a8
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's ExynosAutov920 SoC device tree source
*
* Copyright (c) 2023 Samsung Electronics Co., Ltd.
*
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/samsung,exynos-usi.h>
/ {
compatible = "samsung,exynosautov920";
#address-cells = <2>;
#size-cells = <1>;
interrupt-parent = <&gic>;
aliases {
pinctrl0 = &pinctrl_alive;
pinctrl1 = &pinctrl_aud;
pinctrl2 = &pinctrl_hsi0;
pinctrl3 = &pinctrl_hsi1;
pinctrl4 = &pinctrl_hsi2;
pinctrl5 = &pinctrl_hsi2ufs;
pinctrl6 = &pinctrl_peric0;
pinctrl7 = &pinctrl_peric1;
};
arm-pmu {
compatible = "arm,cortex-a78-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
xtcxo: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "oscclk";
};
/*
* FIXME: Keep the stub clock for serial driver, until proper clock
* driver is implemented.
*/
clock_usi: clock-usi {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
clock-output-names = "usi";
};
cpus: cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
cpu = <&cpu4>;
};
core1 {
cpu = <&cpu5>;
};
core2 {
cpu = <&cpu6>;
};
core3 {
cpu = <&cpu7>;
};
};
cluster2 {
core0 {
cpu = <&cpu8>;
};
core1 {
cpu = <&cpu9>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x100>;
enable-method = "psci";
};
cpu2: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x200>;
enable-method = "psci";
};
cpu3: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x300>;
enable-method = "psci";
};
cpu4: cpu@10000 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x10000>;
enable-method = "psci";
};
cpu5: cpu@10100 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x10100>;
enable-method = "psci";
};
cpu6: cpu@10200 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x10200>;
enable-method = "psci";
};
cpu7: cpu@10300 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x10300>;
enable-method = "psci";
};
cpu8: cpu@20000 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x20000>;
enable-method = "psci";
};
cpu9: cpu@20100 {
device_type = "cpu";
compatible = "arm,cortex-a78ae";
reg = <0x0 0x20100>;
enable-method = "psci";
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x20000000>;
chipid@10000000 {
compatible = "samsung,exynosautov920-chipid",
"samsung,exynos850-chipid";
reg = <0x10000000 0x24>;
};
gic: interrupt-controller@10400000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x10400000 0x10000>,
<0x10460000 0x140000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
syscon_peric0: syscon@10820000 {
compatible = "samsung,exynosautov920-peric0-sysreg",
"syscon";
reg = <0x10820000 0x2000>;
};
pinctrl_peric0: pinctrl@10830000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x10830000 0x10000>;
interrupts = <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH>;
};
usi_0: usi@108800c0 {
compatible = "samsung,exynosautov920-usi",
"samsung,exynos850-usi";
reg = <0x108800c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1000>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&clock_usi>, <&clock_usi>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_0: serial@10880000 {
compatible = "samsung,exynosautov920-uart",
"samsung,exynos850-uart";
reg = <0x10880000 0xc0>;
interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart0_bus>;
clocks = <&clock_usi>, <&clock_usi>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <256>;
status = "disabled";
};
};
pwm: pwm@109b0000 {
compatible = "samsung,exynosautov920-pwm",
"samsung,exynos4210-pwm";
reg = <0x109b0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
clocks = <&xtcxo>;
clock-names = "timers";
status = "disabled";
};
syscon_peric1: syscon@10c20000 {
compatible = "samsung,exynosautov920-peric1-sysreg",
"syscon";
reg = <0x10c20000 0x2000>;
};
pinctrl_peric1: pinctrl@10c30000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x10c30000 0x10000>;
interrupts = <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_alive: pinctrl@11850000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x11850000 0x10000>;
wakeup-interrupt-controller {
compatible = "samsung,exynosautov920-wakeup-eint";
};
};
pmu_system_controller: system-controller@11860000 {
compatible = "samsung,exynosautov920-pmu",
"samsung,exynos7-pmu","syscon";
reg = <0x11860000 0x10000>;
};
pinctrl_hsi0: pinctrl@16040000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x16040000 0x10000>;
interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_hsi1: pinctrl@16450000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x16450000 0x10000>;
interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_hsi2: pinctrl@16c10000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x16c10000 0x10000>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_hsi2ufs: pinctrl@16d20000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x16d20000 0x10000>;
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_aud: pinctrl@1a460000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x1a460000 0x10000>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
};
};
#include "exynosautov920-pinctrl.dtsi"
arch/arm64/boot/dts/tesla/fsd.dtsi
View file @ 2dfe48a8
......@@ -581,7 +581,7 @@ pdma1: dma-controller@14290000 {
};
serial_0: serial@14180000 {
compatible = "samsung,exynos4210-uart";
compatible = "tesla,fsd-uart", "samsung,exynos4210-uart";
reg = <0x0 0x14180000 0x0 0x100>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma1 1>, <&pdma1 0>;
......@@ -593,7 +593,7 @@ serial_0: serial@14180000 {
};
serial_1: serial@14190000 {
compatible = "samsung,exynos4210-uart";
compatible = "tesla,fsd-uart", "samsung,exynos4210-uart";
reg = <0x0 0x14190000 0x0 0x100>;
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma1 3>, <&pdma1 2>;
......@@ -605,12 +605,12 @@ serial_1: serial@14190000 {
};
pmu_system_controller: system-controller@11400000 {
compatible = "samsung,exynos7-pmu", "syscon";
compatible = "tesla,fsd-pmu", "samsung,exynos7-pmu", "syscon";
reg = <0x0 0x11400000 0x0 0x5000>;
};
watchdog_0: watchdog@100a0000 {
compatible = "samsung,exynos7-wdt";
compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt";
reg = <0x0 0x100a0000 0x0 0x100>;
interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>;
samsung,syscon-phandle = <&pmu_system_controller>;
......@@ -619,7 +619,7 @@ watchdog_0: watchdog@100a0000 {
};
watchdog_1: watchdog@100b0000 {
compatible = "samsung,exynos7-wdt";
compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt";
reg = <0x0 0x100b0000 0x0 0x100>;
interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>;
samsung,syscon-phandle = <&pmu_system_controller>;
......@@ -628,7 +628,7 @@ watchdog_1: watchdog@100b0000 {
};
watchdog_2: watchdog@100c0000 {
compatible = "samsung,exynos7-wdt";
compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt";
reg = <0x0 0x100c0000 0x0 0x100>;
interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>;
samsung,syscon-phandle = <&pmu_system_controller>;
......@@ -637,7 +637,7 @@ watchdog_2: watchdog@100c0000 {
};
pwm_0: pwm@14100000 {
compatible = "samsung,exynos4210-pwm";
compatible = "tesla,fsd-pwm", "samsung,exynos4210-pwm";
reg = <0x0 0x14100000 0x0 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
......@@ -647,7 +647,7 @@ pwm_0: pwm@14100000 {
};
pwm_1: pwm@14110000 {
compatible = "samsung,exynos4210-pwm";
compatible = "tesla,fsd-pwm", "samsung,exynos4210-pwm";
reg = <0x0 0x14110000 0x0 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
......@@ -657,7 +657,7 @@ pwm_1: pwm@14110000 {
};
hsi2c_0: i2c@14200000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c";
reg = <0x0 0x14200000 0x0 0x1000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -670,7 +670,7 @@ hsi2c_0: i2c@14200000 {
};
hsi2c_1: i2c@14210000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c";
reg = <0x0 0x14210000 0x0 0x1000>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -683,7 +683,7 @@ hsi2c_1: i2c@14210000 {
};
hsi2c_2: i2c@14220000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c";
reg = <0x0 0x14220000 0x0 0x1000>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -696,7 +696,7 @@ hsi2c_2: i2c@14220000 {
};
hsi2c_3: i2c@14230000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c";
reg = <0x0 0x14230000 0x0 0x1000>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -709,7 +709,7 @@ hsi2c_3: i2c@14230000 {
};
hsi2c_4: i2c@14240000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c";
reg = <0x0 0x14240000 0x0 0x1000>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -722,7 +722,7 @@ hsi2c_4: i2c@14240000 {
};
hsi2c_5: i2c@14250000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c";
reg = <0x0 0x14250000 0x0 0x1000>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -735,7 +735,7 @@ hsi2c_5: i2c@14250000 {
};
hsi2c_6: i2c@14260000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c";
reg = <0x0 0x14260000 0x0 0x1000>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......@@ -748,7 +748,7 @@ hsi2c_6: i2c@14260000 {
};
hsi2c_7: i2c@14270000 {
compatible = "samsung,exynos7-hsi2c";
compatible = "tesla,fsd-hsi2c", "samsung,exynos7-hsi2c";
reg = <0x0 0x14270000 0x0 0x1000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
......
include/dt-bindings/clock/google,gs101.h 0 → 100644
View file @ 2dfe48a8
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (C) 2023 Linaro Ltd.
* Author: Peter Griffin <peter.griffin@linaro.org>
*
* Device Tree binding constants for Google gs101 clock controller.
*/
#ifndef _DT_BINDINGS_CLOCK_GOOGLE_GS101_H
#define _DT_BINDINGS_CLOCK_GOOGLE_GS101_H
/* CMU_TOP PLL */
#define CLK_FOUT_SHARED0_PLL 1
#define CLK_FOUT_SHARED1_PLL 2
#define CLK_FOUT_SHARED2_PLL 3
#define CLK_FOUT_SHARED3_PLL 4
#define CLK_FOUT_SPARE_PLL 5
/* CMU_TOP MUX */
#define CLK_MOUT_PLL_SHARED0 6
#define CLK_MOUT_PLL_SHARED1 7
#define CLK_MOUT_PLL_SHARED2 8
#define CLK_MOUT_PLL_SHARED3 9
#define CLK_MOUT_PLL_SPARE 10
#define CLK_MOUT_CMU_BO_BUS 11
#define CLK_MOUT_CMU_BUS0_BUS 12
#define CLK_MOUT_CMU_BUS1_BUS 13
#define CLK_MOUT_CMU_BUS2_BUS 14
#define CLK_MOUT_CMU_CIS_CLK0 15
#define CLK_MOUT_CMU_CIS_CLK1 16
#define CLK_MOUT_CMU_CIS_CLK2 17
#define CLK_MOUT_CMU_CIS_CLK3 18
#define CLK_MOUT_CMU_CIS_CLK4 19
#define CLK_MOUT_CMU_CIS_CLK5 20
#define CLK_MOUT_CMU_CIS_CLK6 21
#define CLK_MOUT_CMU_CIS_CLK7 22
#define CLK_MOUT_CMU_CMU_BOOST 23
#define CLK_MOUT_CMU_BOOST_OPTION1 24
#define CLK_MOUT_CMU_CORE_BUS 25
#define CLK_MOUT_CMU_CPUCL0_DBG 26
#define CLK_MOUT_CMU_CPUCL0_SWITCH 27
#define CLK_MOUT_CMU_CPUCL1_SWITCH 28
#define CLK_MOUT_CMU_CPUCL2_SWITCH 29
#define CLK_MOUT_CMU_CSIS_BUS 30
#define CLK_MOUT_CMU_DISP_BUS 31
#define CLK_MOUT_CMU_DNS_BUS 32
#define CLK_MOUT_CMU_DPU_BUS 33
#define CLK_MOUT_CMU_EH_BUS 34
#define CLK_MOUT_CMU_G2D_G2D 35
#define CLK_MOUT_CMU_G2D_MSCL 36
#define CLK_MOUT_CMU_G3AA_G3AA 37
#define CLK_MOUT_CMU_G3D_BUSD 38
#define CLK_MOUT_CMU_G3D_GLB 39
#define CLK_MOUT_CMU_G3D_SWITCH 40
#define CLK_MOUT_CMU_GDC_GDC0 41
#define CLK_MOUT_CMU_GDC_GDC1 42
#define CLK_MOUT_CMU_GDC_SCSC 43
#define CLK_MOUT_CMU_HPM 44
#define CLK_MOUT_CMU_HSI0_BUS 45
#define CLK_MOUT_CMU_HSI0_DPGTC 46
#define CLK_MOUT_CMU_HSI0_USB31DRD 47
#define CLK_MOUT_CMU_HSI0_USBDPDGB 48
#define CLK_MOUT_CMU_HSI1_BUS 49
#define CLK_MOUT_CMU_HSI1_PCIE 50
#define CLK_MOUT_CMU_HSI2_BUS 51
#define CLK_MOUT_CMU_HSI2_MMC_CARD 52
#define CLK_MOUT_CMU_HSI2_PCIE 53
#define CLK_MOUT_CMU_HSI2_UFS_EMBD 54
#define CLK_MOUT_CMU_IPP_BUS 55
#define CLK_MOUT_CMU_ITP_BUS 56
#define CLK_MOUT_CMU_MCSC_ITSC 57
#define CLK_MOUT_CMU_MCSC_MCSC 58
#define CLK_MOUT_CMU_MFC_MFC 59
#define CLK_MOUT_CMU_MIF_BUSP 60
#define CLK_MOUT_CMU_MIF_SWITCH 61
#define CLK_MOUT_CMU_MISC_BUS 62
#define CLK_MOUT_CMU_MISC_SSS 63
#define CLK_MOUT_CMU_PDP_BUS 64
#define CLK_MOUT_CMU_PDP_VRA 65
#define CLK_MOUT_CMU_PERIC0_BUS 66
#define CLK_MOUT_CMU_PERIC0_IP 67
#define CLK_MOUT_CMU_PERIC1_BUS 68
#define CLK_MOUT_CMU_PERIC1_IP 69
#define CLK_MOUT_CMU_TNR_BUS 70
#define CLK_MOUT_CMU_TOP_BOOST_OPTION1 71
#define CLK_MOUT_CMU_TOP_CMUREF 72
#define CLK_MOUT_CMU_TPU_BUS 73
#define CLK_MOUT_CMU_TPU_TPU 74
#define CLK_MOUT_CMU_TPU_TPUCTL 75
#define CLK_MOUT_CMU_TPU_UART 76
#define CLK_MOUT_CMU_CMUREF 77
/* CMU_TOP Dividers */
#define CLK_DOUT_CMU_BO_BUS 78
#define CLK_DOUT_CMU_BUS0_BUS 79
#define CLK_DOUT_CMU_BUS1_BUS 80
#define CLK_DOUT_CMU_BUS2_BUS 81
#define CLK_DOUT_CMU_CIS_CLK0 82
#define CLK_DOUT_CMU_CIS_CLK1 83
#define CLK_DOUT_CMU_CIS_CLK2 84
#define CLK_DOUT_CMU_CIS_CLK3 85
#define CLK_DOUT_CMU_CIS_CLK4 86
#define CLK_DOUT_CMU_CIS_CLK5 87
#define CLK_DOUT_CMU_CIS_CLK6 88
#define CLK_DOUT_CMU_CIS_CLK7 89
#define CLK_DOUT_CMU_CORE_BUS 90
#define CLK_DOUT_CMU_CPUCL0_DBG 91
#define CLK_DOUT_CMU_CPUCL0_SWITCH 92
#define CLK_DOUT_CMU_CPUCL1_SWITCH 93
#define CLK_DOUT_CMU_CPUCL2_SWITCH 94
#define CLK_DOUT_CMU_CSIS_BUS 95
#define CLK_DOUT_CMU_DISP_BUS 96
#define CLK_DOUT_CMU_DNS_BUS 97
#define CLK_DOUT_CMU_DPU_BUS 98
#define CLK_DOUT_CMU_EH_BUS 99
#define CLK_DOUT_CMU_G2D_G2D 100
#define CLK_DOUT_CMU_G2D_MSCL 101
#define CLK_DOUT_CMU_G3AA_G3AA 102
#define CLK_DOUT_CMU_G3D_BUSD 103
#define CLK_DOUT_CMU_G3D_GLB 104
#define CLK_DOUT_CMU_G3D_SWITCH 105
#define CLK_DOUT_CMU_GDC_GDC0 106
#define CLK_DOUT_CMU_GDC_GDC1 107
#define CLK_DOUT_CMU_GDC_SCSC 108
#define CLK_DOUT_CMU_CMU_HPM 109
#define CLK_DOUT_CMU_HSI0_BUS 110
#define CLK_DOUT_CMU_HSI0_DPGTC 111
#define CLK_DOUT_CMU_HSI0_USB31DRD 112
#define CLK_DOUT_CMU_HSI0_USBDPDBG 113
#define CLK_DOUT_CMU_HSI1_BUS 114
#define CLK_DOUT_CMU_HSI1_PCIE 115
#define CLK_DOUT_CMU_HSI2_BUS 116
#define CLK_DOUT_CMU_HSI2_MMC_CARD 117
#define CLK_DOUT_CMU_HSI2_PCIE 118
#define CLK_DOUT_CMU_HSI2_UFS_EMBD 119
#define CLK_DOUT_CMU_IPP_BUS 120
#define CLK_DOUT_CMU_ITP_BUS 121
#define CLK_DOUT_CMU_MCSC_ITSC 122
#define CLK_DOUT_CMU_MCSC_MCSC 123
#define CLK_DOUT_CMU_MFC_MFC 124
#define CLK_DOUT_CMU_MIF_BUSP 125
#define CLK_DOUT_CMU_MISC_BUS 126
#define CLK_DOUT_CMU_MISC_SSS 127
#define CLK_DOUT_CMU_OTP 128
#define CLK_DOUT_CMU_PDP_BUS 129
#define CLK_DOUT_CMU_PDP_VRA 130
#define CLK_DOUT_CMU_PERIC0_BUS 131
#define CLK_DOUT_CMU_PERIC0_IP 132
#define CLK_DOUT_CMU_PERIC1_BUS 133
#define CLK_DOUT_CMU_PERIC1_IP 134
#define CLK_DOUT_CMU_TNR_BUS 135
#define CLK_DOUT_CMU_TPU_BUS 136
#define CLK_DOUT_CMU_TPU_TPU 137
#define CLK_DOUT_CMU_TPU_TPUCTL 138
#define CLK_DOUT_CMU_TPU_UART 139
#define CLK_DOUT_CMU_CMU_BOOST 140
#define CLK_DOUT_CMU_CMU_CMUREF 141
#define CLK_DOUT_CMU_SHARED0_DIV2 142
#define CLK_DOUT_CMU_SHARED0_DIV3 143
#define CLK_DOUT_CMU_SHARED0_DIV4 144
#define CLK_DOUT_CMU_SHARED0_DIV5 145
#define CLK_DOUT_CMU_SHARED1_DIV2 146
#define CLK_DOUT_CMU_SHARED1_DIV3 147
#define CLK_DOUT_CMU_SHARED1_DIV4 148
#define CLK_DOUT_CMU_SHARED2_DIV2 149
#define CLK_DOUT_CMU_SHARED3_DIV2 150
/* CMU_TOP Gates */
#define CLK_GOUT_BUS0_BOOST 151
#define CLK_GOUT_BUS1_BOOST 152
#define CLK_GOUT_BUS2_BOOST 153
#define CLK_GOUT_CORE_BOOST 154
#define CLK_GOUT_CPUCL0_BOOST 155
#define CLK_GOUT_CPUCL1_BOOST 156
#define CLK_GOUT_CPUCL2_BOOST 157
#define CLK_GOUT_MIF_BOOST 158
#define CLK_GOUT_MIF_SWITCH 159
#define CLK_GOUT_BO_BUS 160
#define CLK_GOUT_BUS0_BUS 161
#define CLK_GOUT_BUS1_BUS 162
#define CLK_GOUT_BUS2_BUS 163
#define CLK_GOUT_CIS_CLK0 164
#define CLK_GOUT_CIS_CLK1 165
#define CLK_GOUT_CIS_CLK2 167
#define CLK_GOUT_CIS_CLK3 168
#define CLK_GOUT_CIS_CLK4 169
#define CLK_GOUT_CIS_CLK5 170
#define CLK_GOUT_CIS_CLK6 171
#define CLK_GOUT_CIS_CLK7 172
#define CLK_GOUT_CMU_BOOST 173
#define CLK_GOUT_CORE_BUS 174
#define CLK_GOUT_CPUCL0_DBG 175
#define CLK_GOUT_CPUCL0_SWITCH 176
#define CLK_GOUT_CPUCL1_SWITCH 177
#define CLK_GOUT_CPUCL2_SWITCH 178
#define CLK_GOUT_CSIS_BUS 179
#define CLK_GOUT_DISP_BUS 180
#define CLK_GOUT_DNS_BUS 181
#define CLK_GOUT_DPU_BUS 182
#define CLK_GOUT_EH_BUS 183
#define CLK_GOUT_G2D_G2D 184
#define CLK_GOUT_G2D_MSCL 185
#define CLK_GOUT_G3AA_G3AA 186
#define CLK_GOUT_G3D_BUSD 187
#define CLK_GOUT_G3D_GLB 188
#define CLK_GOUT_G3D_SWITCH 189
#define CLK_GOUT_GDC_GDC0 190
#define CLK_GOUT_GDC_GDC1 191
#define CLK_GOUT_GDC_SCSC 192
#define CLK_GOUT_CMU_HPM 193
#define CLK_GOUT_HSI0_BUS 194
#define CLK_GOUT_HSI0_DPGTC 195
#define CLK_GOUT_HSI0_USB31DRD 196
#define CLK_GOUT_HSI0_USBDPDGB 197
#define CLK_GOUT_HSI1_BUS 198
#define CLK_GOUT_HSI1_PCIE 199
#define CLK_GOUT_HSI2_BUS 200
#define CLK_GOUT_HSI2_MMC_CARD 201
#define CLK_GOUT_HSI2_PCIE 202
#define CLK_GOUT_HSI2_UFS_EMBD 203
#define CLK_GOUT_IPP_BUS 204
#define CLK_GOUT_ITP_BUS 205
#define CLK_GOUT_MCSC_ITSC 206
#define CLK_GOUT_MCSC_MCSC 207
#define CLK_GOUT_MFC_MFC 208
#define CLK_GOUT_MIF_BUSP 209
#define CLK_GOUT_MISC_BUS 210
#define CLK_GOUT_MISC_SSS 211
#define CLK_GOUT_PDP_BUS 212
#define CLK_GOUT_PDP_VRA 213
#define CLK_GOUT_G3AA 214
#define CLK_GOUT_PERIC0_BUS 215
#define CLK_GOUT_PERIC0_IP 216
#define CLK_GOUT_PERIC1_BUS 217
#define CLK_GOUT_PERIC1_IP 218
#define CLK_GOUT_TNR_BUS 219
#define CLK_GOUT_TOP_CMUREF 220
#define CLK_GOUT_TPU_BUS 221
#define CLK_GOUT_TPU_TPU 222
#define CLK_GOUT_TPU_TPUCTL 223
#define CLK_GOUT_TPU_UART 224
/* CMU_APM */
#define CLK_MOUT_APM_FUNC 1
#define CLK_MOUT_APM_FUNCSRC 2
#define CLK_DOUT_APM_BOOST 3
#define CLK_DOUT_APM_USI0_UART 4
#define CLK_DOUT_APM_USI0_USI 5
#define CLK_DOUT_APM_USI1_UART 6
#define CLK_GOUT_APM_APM_CMU_APM_PCLK 7
#define CLK_GOUT_BUS0_BOOST_OPTION1 8
#define CLK_GOUT_CMU_BOOST_OPTION1 9
#define CLK_GOUT_CORE_BOOST_OPTION1 10
#define CLK_GOUT_APM_FUNC 11
#define CLK_GOUT_APM_APBIF_GPIO_ALIVE_PCLK 12
#define CLK_GOUT_APM_APBIF_GPIO_FAR_ALIVE_PCLK 13
#define CLK_GOUT_APM_APBIF_PMU_ALIVE_PCLK 14
#define CLK_GOUT_APM_APBIF_RTC_PCLK 15
#define CLK_GOUT_APM_APBIF_TRTC_PCLK 16
#define CLK_GOUT_APM_APM_USI0_UART_IPCLK 17
#define CLK_GOUT_APM_APM_USI0_UART_PCLK 18
#define CLK_GOUT_APM_APM_USI0_USI_IPCLK 19
#define CLK_GOUT_APM_APM_USI0_USI_PCLK 20
#define CLK_GOUT_APM_APM_USI1_UART_IPCLK 21
#define CLK_GOUT_APM_APM_USI1_UART_PCLK 22
#define CLK_GOUT_APM_D_TZPC_APM_PCLK 23
#define CLK_GOUT_APM_GPC_APM_PCLK 24
#define CLK_GOUT_APM_GREBEINTEGRATION_HCLK 25
#define CLK_GOUT_APM_INTMEM_ACLK 26
#define CLK_GOUT_APM_INTMEM_PCLK 27
#define CLK_GOUT_APM_LHM_AXI_G_SWD_I_CLK 28
#define CLK_GOUT_APM_LHM_AXI_P_AOCAPM_I_CLK 29
#define CLK_GOUT_APM_LHM_AXI_P_APM_I_CLK 30
#define CLK_GOUT_APM_LHS_AXI_D_APM_I_CLK 31
#define CLK_GOUT_APM_LHS_AXI_G_DBGCORE_I_CLK 32
#define CLK_GOUT_APM_LHS_AXI_G_SCAN2DRAM_I_CLK 33
#define CLK_GOUT_APM_MAILBOX_APM_AOC_PCLK 34
#define CLK_GOUT_APM_MAILBOX_APM_AP_PCLK 35
#define CLK_GOUT_APM_MAILBOX_APM_GSA_PCLK 36
#define CLK_GOUT_APM_MAILBOX_APM_SWD_PCLK 37
#define CLK_GOUT_APM_MAILBOX_APM_TPU_PCLK 38
#define CLK_GOUT_APM_MAILBOX_AP_AOC_PCLK 39
#define CLK_GOUT_APM_MAILBOX_AP_DBGCORE_PCLK 40
#define CLK_GOUT_APM_PMU_INTR_GEN_PCLK 41
#define CLK_GOUT_APM_ROM_CRC32_HOST_ACLK 42
#define CLK_GOUT_APM_ROM_CRC32_HOST_PCLK 43
#define CLK_GOUT_APM_CLK_APM_BUS_CLK 44
#define CLK_GOUT_APM_CLK_APM_USI0_UART_CLK 45
#define CLK_GOUT_APM_CLK_APM_USI0_USI_CLK 46
#define CLK_GOUT_APM_CLK_APM_USI1_UART_CLK 47
#define CLK_GOUT_APM_SPEEDY_APM_PCLK 48
#define CLK_GOUT_APM_SPEEDY_SUB_APM_PCLK 49
#define CLK_GOUT_APM_SSMT_D_APM_ACLK 50
#define CLK_GOUT_APM_SSMT_D_APM_PCLK 51
#define CLK_GOUT_APM_SSMT_G_DBGCORE_ACLK 52
#define CLK_GOUT_APM_SSMT_G_DBGCORE_PCLK 53
#define CLK_GOUT_APM_SS_DBGCORE_SS_DBGCORE_HCLK 54
#define CLK_GOUT_APM_SYSMMU_D_APM_CLK_S2 55
#define CLK_GOUT_APM_SYSREG_APM_PCLK 56
#define CLK_GOUT_APM_UASC_APM_ACLK 57
#define CLK_GOUT_APM_UASC_APM_PCLK 58
#define CLK_GOUT_APM_UASC_DBGCORE_ACLK 59
#define CLK_GOUT_APM_UASC_DBGCORE_PCLK 60
#define CLK_GOUT_APM_UASC_G_SWD_ACLK 61
#define CLK_GOUT_APM_UASC_G_SWD_PCLK 62
#define CLK_GOUT_APM_UASC_P_AOCAPM_ACLK 63
#define CLK_GOUT_APM_UASC_P_AOCAPM_PCLK 64
#define CLK_GOUT_APM_UASC_P_APM_ACLK 65
#define CLK_GOUT_APM_UASC_P_APM_PCLK 66
#define CLK_GOUT_APM_WDT_APM_PCLK 67
#define CLK_GOUT_APM_XIU_DP_APM_ACLK 68
#define CLK_APM_PLL_DIV2_APM 69
#define CLK_APM_PLL_DIV4_APM 70
#define CLK_APM_PLL_DIV16_APM 71
/* CMU_MISC */
#define CLK_MOUT_MISC_BUS_USER 1
#define CLK_MOUT_MISC_SSS_USER 2
#define CLK_MOUT_MISC_GIC 3
#define CLK_DOUT_MISC_BUSP 4
#define CLK_DOUT_MISC_GIC 5
#define CLK_GOUT_MISC_MISC_CMU_MISC_PCLK 6
#define CLK_GOUT_MISC_OTP_CON_BIRA_I_OSCCLK 7
#define CLK_GOUT_MISC_OTP_CON_BISR_I_OSCCLK 8
#define CLK_GOUT_MISC_OTP_CON_TOP_I_OSCCLK 9
#define CLK_GOUT_MISC_CLK_MISC_OSCCLK_CLK 10
#define CLK_GOUT_MISC_ADM_AHB_SSS_HCLKM 11
#define CLK_GOUT_MISC_AD_APB_DIT_PCLKM 12
#define CLK_GOUT_MISC_AD_APB_PUF_PCLKM 13
#define CLK_GOUT_MISC_DIT_ICLKL2A 14
#define CLK_GOUT_MISC_D_TZPC_MISC_PCLK 15
#define CLK_GOUT_MISC_GIC_GICCLK 16
#define CLK_GOUT_MISC_GPC_MISC_PCLK 17
#define CLK_GOUT_MISC_LHM_AST_ICC_CPUGIC_I_CLK 18
#define CLK_GOUT_MISC_LHM_AXI_D_SSS_I_CLK 19
#define CLK_GOUT_MISC_LHM_AXI_P_GIC_I_CLK 20
#define CLK_GOUT_MISC_LHM_AXI_P_MISC_I_CLK 21
#define CLK_GOUT_MISC_LHS_ACEL_D_MISC_I_CLK 22
#define CLK_GOUT_MISC_LHS_AST_IRI_GICCPU_I_CLK 23
#define CLK_GOUT_MISC_LHS_AXI_D_SSS_I_CLK 24
#define CLK_GOUT_MISC_MCT_PCLK 25
#define CLK_GOUT_MISC_OTP_CON_BIRA_PCLK 26
#define CLK_GOUT_MISC_OTP_CON_BISR_PCLK 27
#define CLK_GOUT_MISC_OTP_CON_TOP_PCLK 28
#define CLK_GOUT_MISC_PDMA_ACLK 29
#define CLK_GOUT_MISC_PPMU_DMA_ACLK 30
#define CLK_GOUT_MISC_PPMU_MISC_ACLK 31
#define CLK_GOUT_MISC_PPMU_MISC_PCLK 32
#define CLK_GOUT_MISC_PUF_I_CLK 33
#define CLK_GOUT_MISC_QE_DIT_ACLK 34
#define CLK_GOUT_MISC_QE_DIT_PCLK 35
#define CLK_GOUT_MISC_QE_PDMA_ACLK 36
#define CLK_GOUT_MISC_QE_PDMA_PCLK 37
#define CLK_GOUT_MISC_QE_PPMU_DMA_ACLK 38
#define CLK_GOUT_MISC_QE_PPMU_DMA_PCLK 39
#define CLK_GOUT_MISC_QE_RTIC_ACLK 40
#define CLK_GOUT_MISC_QE_RTIC_PCLK 41
#define CLK_GOUT_MISC_QE_SPDMA_ACLK 42
#define CLK_GOUT_MISC_QE_SPDMA_PCLK 43
#define CLK_GOUT_MISC_QE_SSS_ACLK 44
#define CLK_GOUT_MISC_QE_SSS_PCLK 45
#define CLK_GOUT_MISC_CLK_MISC_BUSD_CLK 46
#define CLK_GOUT_MISC_CLK_MISC_BUSP_CLK 47
#define CLK_GOUT_MISC_CLK_MISC_GIC_CLK 48
#define CLK_GOUT_MISC_CLK_MISC_SSS_CLK 49
#define CLK_GOUT_MISC_RTIC_I_ACLK 50
#define CLK_GOUT_MISC_RTIC_I_PCLK 51
#define CLK_GOUT_MISC_SPDMA_ACLK 52
#define CLK_GOUT_MISC_SSMT_DIT_ACLK 53
#define CLK_GOUT_MISC_SSMT_DIT_PCLK 54
#define CLK_GOUT_MISC_SSMT_PDMA_ACLK 55
#define CLK_GOUT_MISC_SSMT_PDMA_PCLK 56
#define CLK_GOUT_MISC_SSMT_PPMU_DMA_ACLK 57
#define CLK_GOUT_MISC_SSMT_PPMU_DMA_PCLK 58
#define CLK_GOUT_MISC_SSMT_RTIC_ACLK 59
#define CLK_GOUT_MISC_SSMT_RTIC_PCLK 60
#define CLK_GOUT_MISC_SSMT_SPDMA_ACLK 61
#define CLK_GOUT_MISC_SSMT_SPDMA_PCLK 62
#define CLK_GOUT_MISC_SSMT_SSS_ACLK 63
#define CLK_GOUT_MISC_SSMT_SSS_PCLK 64
#define CLK_GOUT_MISC_SSS_I_ACLK 65
#define CLK_GOUT_MISC_SSS_I_PCLK 66
#define CLK_GOUT_MISC_SYSMMU_MISC_CLK_S2 67
#define CLK_GOUT_MISC_SYSMMU_SSS_CLK_S1 68
#define CLK_GOUT_MISC_SYSREG_MISC_PCLK 69
#define CLK_GOUT_MISC_TMU_SUB_PCLK 70
#define CLK_GOUT_MISC_TMU_TOP_PCLK 71
#define CLK_GOUT_MISC_WDT_CLUSTER0_PCLK 72
#define CLK_GOUT_MISC_WDT_CLUSTER1_PCLK 73
#define CLK_GOUT_MISC_XIU_D_MISC_ACLK 74
#endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_H */
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7