Add PPC 8280 support, calculate core clock frequency.

Patch from Guy Streeter <streeter@redhat.com>

arch/ppc/boot/simple/embed_config.c

@@ -402,14 +402,18 @@ embed_config(bd_t **bdp)
 
 #ifdef CONFIG_8260
 /* Compute 8260 clock values if the rom doesn't provide them.
- * We can't compute the internal core frequency (I don't know how to
- * do that).
  */
+static unsigned char bus2core_8260[] = {
+/*      0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f */
+	3,  2,  2,  2,  4,  4,  5,  9,  6, 11,  8, 10,  3, 12,  7,  2,
+	6,  5, 13,  2, 14,  4, 15,  2,  3, 11,  8, 10, 16, 12,  7,  2,
+};
+
 static void
 clk_8260(bd_t *bd)
 {
 	uint	scmr, vco_out, clkin;
-	uint	plldf, pllmf, busdf, brgdf, cpmdf;
+	uint	plldf, pllmf, corecnf;
 	volatile immap_t	*ip;
 
 	ip = (immap_t *)IMAP_ADDR;
@@ -423,8 +427,7 @@ clk_8260(bd_t *bd)
 	*/
 	plldf = (scmr >> 12) & 1;
 	pllmf = scmr & 0xfff;
-	cpmdf = (scmr >> 16) & 0x0f;
-	busdf = (scmr >> 20) & 0x0f;
+	corecnf = (scmr >> 24) &0x1f;
 
 	/* This is arithmetic from the 8260 manual.
 	*/
@@ -433,6 +436,7 @@ clk_8260(bd_t *bd)
 	bd->bi_vco = vco_out;		/* Save for later */
 
 	bd->bi_cpmfreq = vco_out / 2;	/* CPM Freq, in MHz */
+	bd->bi_intfreq = bd->bi_busfreq * bus2core_8260[corecnf] / 2;
 
 	/* Set Baud rate divisor.  The power up default is divide by 16,
 	 * but we set it again here in case it was changed.
@@ -440,8 +444,46 @@ clk_8260(bd_t *bd)
 	ip->im_clkrst.car_sccr = 1;	/* DIV 16 BRG */
 	bd->bi_brgfreq = vco_out / 16;
 }
-#endif
 
+static unsigned char bus2core_8280[] = {
+/*      0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f */
+	3,  2,  2,  2,  4,  4,  5,  9,  6, 11,  8, 10,  3, 12,  7,  2,
+	6,  5, 13,  2, 14,  2, 15,  2,  3,  2,  2,  2, 16,  2,  2,  2,
+};
+
+static void
+clk_8280(bd_t *bd)
+{
+	uint	scmr, main_clk, clkin;
+	uint	pllmf, corecnf;
+	volatile immap_t	*ip;
+
+	ip = (immap_t *)IMAP_ADDR;
+	scmr = ip->im_clkrst.car_scmr;
+
+	/* The clkin is always bus frequency.
+	*/
+	clkin = bd->bi_busfreq;
+
+	/* Collect the bits from the scmr.
+	*/
+	pllmf = scmr & 0xf;
+	corecnf = (scmr >> 24) & 0x1f;
+
+	/* This is arithmetic from the 8280 manual.
+	*/
+	main_clk = clkin * (pllmf + 1);
+
+	bd->bi_cpmfreq = main_clk / 2;	/* CPM Freq, in MHz */
+	bd->bi_intfreq = bd->bi_busfreq * bus2core_8280[corecnf] / 2;
+
+	/* Set Baud rate divisor.  The power up default is divide by 16,
+	 * but we set it again here in case it was changed.
+	 */
+	ip->im_clkrst.car_sccr = (ip->im_clkrst.car_sccr & 0x3) | 0x1;
+	bd->bi_brgfreq = main_clk / 16;
+}
+#endif
 #if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260)
 void
 embed_config(bd_t **bdp)

arch/ppc/kernel/cputable.c

@@ -350,6 +350,14 @@ struct cpu_spec	cpu_specs[] = {
 	32, 32,
 	__setup_cpu_603
     },
+    {	/* 8280 is a G2_LE (603e core, plus some) */
+	0x7fff0000, 0x00820000, "8280",
+	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
+	CPU_FTR_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
+	COMMON_PPC,
+	32, 32,
+	__setup_cpu_603
+    },
     {	/* default match, we assume split I/D cache & TB (non-601)... */
     	0x00000000, 0x00000000, "(generic PPC)",
 	CPU_FTR_COMMON |