Commit 2f45a4e2 authored by Meng Tang's avatar Meng Tang Committed by Mark Brown

ASoC: rockchip: i2s_tdm: Fixup config for SND_SOC_DAIFMT_DSP_A/B

SND_SOC_DAIFMT_DSP_A: PCM delay 1 bit mode, L data MSB after FRM LRC
SND_SOC_DAIFMT_DSP_B: PCM no delay mode, L data MSB during FRM LRC

Fixes: 081068fd (ASoC: rockchip: add support for i2s-tdm controller)
Signed-off-by: default avatarMeng Tang <tangmeng@uniontech.com>
Link: https://lore.kernel.org/r/20220318100146.23991-1-tangmeng@uniontech.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 5cb90dcb
...@@ -469,14 +469,14 @@ static int rockchip_i2s_tdm_set_fmt(struct snd_soc_dai *cpu_dai, ...@@ -469,14 +469,14 @@ static int rockchip_i2s_tdm_set_fmt(struct snd_soc_dai *cpu_dai,
txcr_val = I2S_TXCR_IBM_NORMAL; txcr_val = I2S_TXCR_IBM_NORMAL;
rxcr_val = I2S_RXCR_IBM_NORMAL; rxcr_val = I2S_RXCR_IBM_NORMAL;
break; break;
case SND_SOC_DAIFMT_DSP_A: /* PCM no delay mode */ case SND_SOC_DAIFMT_DSP_A: /* PCM delay 1 mode */
txcr_val = I2S_TXCR_TFS_PCM;
rxcr_val = I2S_RXCR_TFS_PCM;
break;
case SND_SOC_DAIFMT_DSP_B: /* PCM delay 1 mode */
txcr_val = I2S_TXCR_TFS_PCM | I2S_TXCR_PBM_MODE(1); txcr_val = I2S_TXCR_TFS_PCM | I2S_TXCR_PBM_MODE(1);
rxcr_val = I2S_RXCR_TFS_PCM | I2S_RXCR_PBM_MODE(1); rxcr_val = I2S_RXCR_TFS_PCM | I2S_RXCR_PBM_MODE(1);
break; break;
case SND_SOC_DAIFMT_DSP_B: /* PCM no delay mode */
txcr_val = I2S_TXCR_TFS_PCM;
rxcr_val = I2S_RXCR_TFS_PCM;
break;
default: default:
ret = -EINVAL; ret = -EINVAL;
goto err_pm_put; goto err_pm_put;
......
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