Commit 2f8639b2 authored by ZHU Yi (ST-FIR/ENG1-Zhu)'s avatar ZHU Yi (ST-FIR/ENG1-Zhu) Committed by Marc Kleine-Budde

can: flexcan: rename legacy error state quirk

Rename FLEXCAN_QUIRK_BROKEN_ERR_STATE to FLEXCAN_QUIRK_BROKEN_WERR_STATE
for better description of the missing [TR]WRN_INT quirk.
Signed-off-by: default avatarZhu Yi <yi.zhu5@cn.bosch.com>
Signed-off-by: default avatarMark Jonas <mark.jonas@de.bosch.com>
Acked-by: default avatarWolfgang Grandegger <wg@grandegger.com>
Cc: linux-stable <stable@vger.kernel.org> # >= v4.11
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent ad230234
...@@ -193,7 +193,7 @@ ...@@ -193,7 +193,7 @@
* *
* Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected.
*/ */
#define FLEXCAN_QUIRK_BROKEN_ERR_STATE BIT(1) /* [TR]WRN_INT not connected */ #define FLEXCAN_QUIRK_BROKEN_WERR_STATE BIT(1) /* [TR]WRN_INT not connected */
#define FLEXCAN_QUIRK_DISABLE_RXFG BIT(2) /* Disable RX FIFO Global mask */ #define FLEXCAN_QUIRK_DISABLE_RXFG BIT(2) /* Disable RX FIFO Global mask */
#define FLEXCAN_QUIRK_ENABLE_EACEN_RRS BIT(3) /* Enable EACEN and RRS bit in ctrl2 */ #define FLEXCAN_QUIRK_ENABLE_EACEN_RRS BIT(3) /* Enable EACEN and RRS bit in ctrl2 */
#define FLEXCAN_QUIRK_DISABLE_MECR BIT(4) /* Disable Memory error detection */ #define FLEXCAN_QUIRK_DISABLE_MECR BIT(4) /* Disable Memory error detection */
...@@ -281,7 +281,7 @@ struct flexcan_priv { ...@@ -281,7 +281,7 @@ struct flexcan_priv {
}; };
static const struct flexcan_devtype_data fsl_p1010_devtype_data = { static const struct flexcan_devtype_data fsl_p1010_devtype_data = {
.quirks = FLEXCAN_QUIRK_BROKEN_ERR_STATE, .quirks = FLEXCAN_QUIRK_BROKEN_WERR_STATE,
}; };
static const struct flexcan_devtype_data fsl_imx28_devtype_data; static const struct flexcan_devtype_data fsl_imx28_devtype_data;
...@@ -767,7 +767,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id) ...@@ -767,7 +767,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
/* state change interrupt or broken error state quirk fix is enabled */ /* state change interrupt or broken error state quirk fix is enabled */
if ((reg_esr & FLEXCAN_ESR_ERR_STATE) || if ((reg_esr & FLEXCAN_ESR_ERR_STATE) ||
(priv->devtype_data->quirks & FLEXCAN_QUIRK_BROKEN_ERR_STATE)) (priv->devtype_data->quirks & FLEXCAN_QUIRK_BROKEN_WERR_STATE))
flexcan_irq_state(dev, reg_esr); flexcan_irq_state(dev, reg_esr);
/* bus error IRQ - handle if bus error reporting is activated */ /* bus error IRQ - handle if bus error reporting is activated */
...@@ -888,7 +888,7 @@ static int flexcan_chip_start(struct net_device *dev) ...@@ -888,7 +888,7 @@ static int flexcan_chip_start(struct net_device *dev)
* on most Flexcan cores, too. Otherwise we don't get * on most Flexcan cores, too. Otherwise we don't get
* any error warning or passive interrupts. * any error warning or passive interrupts.
*/ */
if (priv->devtype_data->quirks & FLEXCAN_QUIRK_BROKEN_ERR_STATE || if (priv->devtype_data->quirks & FLEXCAN_QUIRK_BROKEN_WERR_STATE ||
priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
reg_ctrl |= FLEXCAN_CTRL_ERR_MSK; reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;
else else
......
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