Commit 303b81e0 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter

drm/i915: remove Haswell/LPT bits from ironlake_pch_enable

Since now we have lpt_pch_enable for them.
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 1507e5bd
...@@ -3086,10 +3086,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc) ...@@ -3086,10 +3086,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
* enable sequence. */ * enable sequence. */
intel_enable_pch_pll(intel_crtc); intel_enable_pch_pll(intel_crtc);
if (HAS_PCH_LPT(dev)) { if (HAS_PCH_CPT(dev)) {
DRM_DEBUG_KMS("LPT detected: programming iCLKIP\n");
lpt_program_iclkip(crtc);
} else if (HAS_PCH_CPT(dev)) {
u32 sel; u32 sel;
temp = I915_READ(PCH_DPLL_SEL); temp = I915_READ(PCH_DPLL_SEL);
...@@ -3126,7 +3123,6 @@ static void ironlake_pch_enable(struct drm_crtc *crtc) ...@@ -3126,7 +3123,6 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
I915_WRITE(TRANS_VSYNC(pipe), I915_READ(VSYNC(pipe))); I915_WRITE(TRANS_VSYNC(pipe), I915_READ(VSYNC(pipe)));
I915_WRITE(TRANS_VSYNCSHIFT(pipe), I915_READ(VSYNCSHIFT(pipe))); I915_WRITE(TRANS_VSYNCSHIFT(pipe), I915_READ(VSYNCSHIFT(pipe)));
if (!IS_HASWELL(dev))
intel_fdi_normal_train(crtc); intel_fdi_normal_train(crtc);
/* For PCH DP, enable TRANS_DP_CTL */ /* For PCH DP, enable TRANS_DP_CTL */
......
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