Commit 30b06abf authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'pinctrl-v4.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:

 - A slew of driver fixes for Mediatek mt7622

 - Fix a direction inversion bug in the Ingenic driver

 - Fix unsupported drive strength setting on the PFC r8a77970

 - Off by one and NULL dereference fixes in the NSP driver

* tag 'pinctrl-v4.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: nsp: Fix potential NULL dereference
  pinctrl: nsp: off by ones in nsp_pinmux_enable()
  pinctrl: sh-pfc: r8a77970: remove SH_PFC_PIN_CFG_DRIVE_STRENGTH flag
  pinctrl: ingenic: Fix inverted direction for < JZ4770
  pinctrl: mt7622: fix a kernel panic when gpio-hog is being applied
  pinctrl: mt7622: stop using the deprecated pinctrl_add_gpio_range
  pinctrl: mt7622: fix that pinctrl_claim_hogs cannot work
  pinctrl: mt7622: fix initialization sequence between eint and gpiochip
  pinctrl: mt7622: fix error path on failing at groups building
parents 706bf68b c29e9da5
...@@ -460,8 +460,8 @@ static int nsp_pinmux_enable(struct pinctrl_dev *pctrl_dev, ...@@ -460,8 +460,8 @@ static int nsp_pinmux_enable(struct pinctrl_dev *pctrl_dev,
const struct nsp_pin_function *func; const struct nsp_pin_function *func;
const struct nsp_pin_group *grp; const struct nsp_pin_group *grp;
if (grp_select > pinctrl->num_groups || if (grp_select >= pinctrl->num_groups ||
func_select > pinctrl->num_functions) func_select >= pinctrl->num_functions)
return -EINVAL; return -EINVAL;
func = &pinctrl->functions[func_select]; func = &pinctrl->functions[func_select];
...@@ -577,6 +577,8 @@ static int nsp_pinmux_probe(struct platform_device *pdev) ...@@ -577,6 +577,8 @@ static int nsp_pinmux_probe(struct platform_device *pdev)
return PTR_ERR(pinctrl->base0); return PTR_ERR(pinctrl->base0);
res = platform_get_resource(pdev, IORESOURCE_MEM, 1); res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (!res)
return -EINVAL;
pinctrl->base1 = devm_ioremap_nocache(&pdev->dev, res->start, pinctrl->base1 = devm_ioremap_nocache(&pdev->dev, res->start,
resource_size(res)); resource_size(res));
if (!pinctrl->base1) { if (!pinctrl->base1) {
......
...@@ -1424,7 +1424,7 @@ static struct pinctrl_desc mtk_desc = { ...@@ -1424,7 +1424,7 @@ static struct pinctrl_desc mtk_desc = {
static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
{ {
struct mtk_pinctrl *hw = dev_get_drvdata(chip->parent); struct mtk_pinctrl *hw = gpiochip_get_data(chip);
int value, err; int value, err;
err = mtk_hw_get_value(hw, gpio, PINCTRL_PIN_REG_DI, &value); err = mtk_hw_get_value(hw, gpio, PINCTRL_PIN_REG_DI, &value);
...@@ -1436,7 +1436,7 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) ...@@ -1436,7 +1436,7 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
{ {
struct mtk_pinctrl *hw = dev_get_drvdata(chip->parent); struct mtk_pinctrl *hw = gpiochip_get_data(chip);
mtk_hw_set_value(hw, gpio, PINCTRL_PIN_REG_DO, !!value); mtk_hw_set_value(hw, gpio, PINCTRL_PIN_REG_DO, !!value);
} }
...@@ -1508,11 +1508,20 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) ...@@ -1508,11 +1508,20 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np)
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, /* Just for backward compatible for these old pinctrl nodes without
chip->ngpio); * "gpio-ranges" property. Otherwise, called directly from a
if (ret < 0) { * DeviceTree-supported pinctrl driver is DEPRECATED.
gpiochip_remove(chip); * Please see Section 2.1 of
return ret; * Documentation/devicetree/bindings/gpio/gpio.txt on how to
* bind pinctrl and gpio drivers via the "gpio-ranges" property.
*/
if (!of_find_property(np, "gpio-ranges", NULL)) {
ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0,
chip->ngpio);
if (ret < 0) {
gpiochip_remove(chip);
return ret;
}
} }
return 0; return 0;
...@@ -1695,15 +1704,16 @@ static int mtk_pinctrl_probe(struct platform_device *pdev) ...@@ -1695,15 +1704,16 @@ static int mtk_pinctrl_probe(struct platform_device *pdev)
mtk_desc.custom_conf_items = mtk_conf_items; mtk_desc.custom_conf_items = mtk_conf_items;
#endif #endif
hw->pctrl = devm_pinctrl_register(&pdev->dev, &mtk_desc, hw); err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
if (IS_ERR(hw->pctrl)) &hw->pctrl);
return PTR_ERR(hw->pctrl); if (err)
return err;
/* Setup groups descriptions per SoC types */ /* Setup groups descriptions per SoC types */
err = mtk_build_groups(hw); err = mtk_build_groups(hw);
if (err) { if (err) {
dev_err(&pdev->dev, "Failed to build groups\n"); dev_err(&pdev->dev, "Failed to build groups\n");
return 0; return err;
} }
/* Setup functions descriptions per SoC types */ /* Setup functions descriptions per SoC types */
...@@ -1713,17 +1723,25 @@ static int mtk_pinctrl_probe(struct platform_device *pdev) ...@@ -1713,17 +1723,25 @@ static int mtk_pinctrl_probe(struct platform_device *pdev)
return err; return err;
} }
err = mtk_build_gpiochip(hw, pdev->dev.of_node); /* For able to make pinctrl_claim_hogs, we must not enable pinctrl
if (err) { * until all groups and functions are being added one.
dev_err(&pdev->dev, "Failed to add gpio_chip\n"); */
err = pinctrl_enable(hw->pctrl);
if (err)
return err; return err;
}
err = mtk_build_eint(hw, pdev); err = mtk_build_eint(hw, pdev);
if (err) if (err)
dev_warn(&pdev->dev, dev_warn(&pdev->dev,
"Failed to add EINT, but pinctrl still can work\n"); "Failed to add EINT, but pinctrl still can work\n");
/* Build gpiochip should be after pinctrl_enable is done */
err = mtk_build_gpiochip(hw, pdev->dev.of_node);
if (err) {
dev_err(&pdev->dev, "Failed to add gpio_chip\n");
return err;
}
platform_set_drvdata(pdev, hw); platform_set_drvdata(pdev, hw);
return 0; return 0;
......
...@@ -536,7 +536,7 @@ static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, ...@@ -536,7 +536,7 @@ static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input); ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input);
} else { } else {
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, false); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, false);
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DIR, input); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DIR, !input);
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, false); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, false);
} }
......
...@@ -21,15 +21,13 @@ ...@@ -21,15 +21,13 @@
#include "core.h" #include "core.h"
#include "sh_pfc.h" #include "sh_pfc.h"
#define CFG_FLAGS SH_PFC_PIN_CFG_DRIVE_STRENGTH
#define CPU_ALL_PORT(fn, sfx) \ #define CPU_ALL_PORT(fn, sfx) \
PORT_GP_CFG_22(0, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_CFG_28(1, fn, sfx, CFG_FLAGS), \ PORT_GP_28(1, fn, sfx), \
PORT_GP_CFG_17(2, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_CFG_17(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_CFG_6(4, fn, sfx, CFG_FLAGS), \ PORT_GP_6(4, fn, sfx), \
PORT_GP_CFG_15(5, fn, sfx, CFG_FLAGS) PORT_GP_15(5, fn, sfx)
/* /*
* F_() : just information * F_() : just information
* FM() : macro for FN_xxx / xxx_MARK * FM() : macro for FN_xxx / xxx_MARK
......
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