Commit 3126c7bc authored by Russell King's avatar Russell King

ARM: AMBA: Add pclk definition for platforms using primecells

Add a dummy clk definition for the APB pclk signal on all platforms
using the AMBA bus infrastructure.  This ensures that these platforms
continue to work when the core amba bus code controls the APB pclk.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 2f7989ef
...@@ -91,8 +91,17 @@ static struct clk uart_clk = { ...@@ -91,8 +91,17 @@ static struct clk uart_clk = {
.parent = &pll1_clk, .parent = &pll1_clk,
}; };
static struct clk dummy_apb_pclk = {
.name = "BUSCLK",
.type = CLK_TYPE_PRIMARY,
.mode = CLK_MODE_XTAL,
};
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
{ /* UART0 */ { /* Bus clock */
.con_id = "apb_pclk",
.clk = &dummy_apb_pclk,
}, { /* UART0 */
.dev_id = "uarta", .dev_id = "uarta",
.clk = &uart_clk, .clk = &uart_clk,
}, { /* UART1 */ }, { /* UART1 */
......
...@@ -185,7 +185,7 @@ static struct clk_lookup clocks[] = { ...@@ -185,7 +185,7 @@ static struct clk_lookup clocks[] = {
INIT_CK(NULL, "pll1", &clk_pll1), INIT_CK(NULL, "pll1", &clk_pll1),
INIT_CK(NULL, "fclk", &clk_f), INIT_CK(NULL, "fclk", &clk_f),
INIT_CK(NULL, "hclk", &clk_h), INIT_CK(NULL, "hclk", &clk_h),
INIT_CK(NULL, "pclk", &clk_p), INIT_CK(NULL, "apb_pclk", &clk_p),
INIT_CK(NULL, "pll2", &clk_pll2), INIT_CK(NULL, "pll2", &clk_pll2),
INIT_CK("ep93xx-ohci", NULL, &clk_usb_host), INIT_CK("ep93xx-ohci", NULL, &clk_usb_host),
INIT_CK("ep93xx-keypad", NULL, &clk_keypad), INIT_CK("ep93xx-keypad", NULL, &clk_keypad),
......
...@@ -119,8 +119,13 @@ static struct clk uartclk = { ...@@ -119,8 +119,13 @@ static struct clk uartclk = {
.rate = 14745600, .rate = 14745600,
}; };
static struct clk dummy_apb_pclk;
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
{ /* UART0 */ { /* Bus clock */
.con_id = "apb_pclk",
.clk = &dummy_apb_pclk,
}, { /* UART0 */
.dev_id = "mb:16", .dev_id = "mb:16",
.clk = &uartclk, .clk = &uartclk,
}, { /* UART1 */ }, { /* UART1 */
......
...@@ -53,6 +53,10 @@ static struct clk clk_default; ...@@ -53,6 +53,10 @@ static struct clk clk_default;
} }
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
{
.con_id = "apb_pclk",
.clk = &clk_default,
},
CLK(&clk_24, "mtu0"), CLK(&clk_24, "mtu0"),
CLK(&clk_24, "mtu1"), CLK(&clk_24, "mtu1"),
CLK(&clk_48, "uart0"), CLK(&clk_48, "uart0"),
......
...@@ -3166,6 +3166,10 @@ static struct clk uart4_ick_am35xx = { ...@@ -3166,6 +3166,10 @@ static struct clk uart4_ick_am35xx = {
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
static struct clk dummy_apb_pclk = {
.name = "apb_pclk",
.ops = &clkops_null,
};
/* /*
* clkdev * clkdev
...@@ -3173,6 +3177,7 @@ static struct clk uart4_ick_am35xx = { ...@@ -3173,6 +3177,7 @@ static struct clk uart4_ick_am35xx = {
/* XXX At some point we should rename this file to clock3xxx_data.c */ /* XXX At some point we should rename this file to clock3xxx_data.c */
static struct omap_clk omap3xxx_clks[] = { static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "apb_pclk", &dummy_apb_pclk, CK_3XXX),
CLK(NULL, "omap_32k_fck", &omap_32k_fck, CK_3XXX), CLK(NULL, "omap_32k_fck", &omap_32k_fck, CK_3XXX),
CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_3XXX), CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_3XXX),
CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_3XXX), CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_3XXX),
......
...@@ -300,8 +300,13 @@ static struct clk ref24_clk = { ...@@ -300,8 +300,13 @@ static struct clk ref24_clk = {
.rate = 24000000, .rate = 24000000,
}; };
static struct clk dummy_apb_pclk;
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
{ /* UART0 */ { /* Bus clock */
.con_id = "apb_pclk",
.clk = &dummy_apb_pclk,
}, { /* UART0 */
.dev_id = "dev:uart0", .dev_id = "dev:uart0",
.clk = &ref24_clk, .clk = &ref24_clk,
}, { /* UART1 */ }, { /* UART1 */
......
...@@ -341,8 +341,11 @@ static struct clk gpio_clk = { ...@@ -341,8 +341,11 @@ static struct clk gpio_clk = {
.recalc = &follow_parent, .recalc = &follow_parent,
}; };
static struct clk dummy_apb_pclk;
/* array of all spear 3xx clock lookups */ /* array of all spear 3xx clock lookups */
static struct clk_lookup spear_clk_lookups[] = { static struct clk_lookup spear_clk_lookups[] = {
{ .con_id = "apb_pclk", .clk = &dummy_apb_pclk},
/* root clks */ /* root clks */
{ .con_id = "osc_32k_clk", .clk = &osc_32k_clk}, { .con_id = "osc_32k_clk", .clk = &osc_32k_clk},
{ .con_id = "osc_24m_clk", .clk = &osc_24m_clk}, { .con_id = "osc_24m_clk", .clk = &osc_24m_clk},
......
...@@ -428,8 +428,11 @@ static struct clk gpio2_clk = { ...@@ -428,8 +428,11 @@ static struct clk gpio2_clk = {
.recalc = &follow_parent, .recalc = &follow_parent,
}; };
static struct clk dummy_apb_pclk;
/* array of all spear 6xx clock lookups */ /* array of all spear 6xx clock lookups */
static struct clk_lookup spear_clk_lookups[] = { static struct clk_lookup spear_clk_lookups[] = {
{ .con_id = "apb_pclk", .clk = &dummy_apb_pclk},
/* root clks */ /* root clks */
{ .con_id = "osc_32k_clk", .clk = &osc_32k_clk}, { .con_id = "osc_32k_clk", .clk = &osc_32k_clk},
{ .con_id = "osc_30m_clk", .clk = &osc_30m_clk}, { .con_id = "osc_30m_clk", .clk = &osc_30m_clk},
......
...@@ -1212,6 +1212,8 @@ static struct clk ppm_clk = { ...@@ -1212,6 +1212,8 @@ static struct clk ppm_clk = {
}; };
#endif #endif
static struct clk dummy_apb_pclk;
#define DEF_LOOKUP(devid, clkref) \ #define DEF_LOOKUP(devid, clkref) \
{ \ { \
.dev_id = devid, \ .dev_id = devid, \
...@@ -1223,6 +1225,10 @@ static struct clk ppm_clk = { ...@@ -1223,6 +1225,10 @@ static struct clk ppm_clk = {
* look up through clockdevice. * look up through clockdevice.
*/ */
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
{
.con_id = "apb_pclk",
.clk = &dummy_apb_pclk,
},
/* Connected directly to the AMBA bus */ /* Connected directly to the AMBA bus */
DEF_LOOKUP("amba", &amba_clk), DEF_LOOKUP("amba", &amba_clk),
DEF_LOOKUP("cpu", &cpu_clk), DEF_LOOKUP("cpu", &cpu_clk),
......
...@@ -453,7 +453,11 @@ static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0); ...@@ -453,7 +453,11 @@ static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0);
static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL); static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL);
static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL); static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL);
static struct clk clk_dummy_apb_pclk;
static struct clk_lookup u8500_common_clks[] = { static struct clk_lookup u8500_common_clks[] = {
CLK(dummy_apb_pclk, NULL, "apb_pclk"),
/* Peripheral Cluster #1 */ /* Peripheral Cluster #1 */
CLK(gpio0, "gpio.0", NULL), CLK(gpio0, "gpio.0", NULL),
CLK(gpio0, "gpio.1", NULL), CLK(gpio0, "gpio.1", NULL),
......
...@@ -400,8 +400,13 @@ static struct clk ref24_clk = { ...@@ -400,8 +400,13 @@ static struct clk ref24_clk = {
.rate = 24000000, .rate = 24000000,
}; };
static struct clk dummy_apb_pclk;
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
{ /* UART0 */ { /* AMBA bus clock */
.con_id = "apb_pclk",
.clk = &dummy_apb_pclk,
}, { /* UART0 */
.dev_id = "dev:f1", .dev_id = "dev:f1",
.clk = &ref24_clk, .clk = &ref24_clk,
}, { /* UART1 */ }, { /* UART1 */
......
...@@ -298,8 +298,13 @@ static struct clk osc2_clk = { ...@@ -298,8 +298,13 @@ static struct clk osc2_clk = {
.rate = 24000000, .rate = 24000000,
}; };
static struct clk dummy_apb_pclk;
static struct clk_lookup v2m_lookups[] = { static struct clk_lookup v2m_lookups[] = {
{ /* UART0 */ { /* AMBA bus clock */
.con_id = "apb_pclk",
.clk = &dummy_apb_pclk,
}, { /* UART0 */
.dev_id = "mb:uart0", .dev_id = "mb:uart0",
.clk = &osc2_clk, .clk = &osc2_clk,
}, { /* UART1 */ }, { /* UART1 */
......
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