Commit 32c2f2a4 authored by Andrew Halaney's avatar Andrew Halaney Committed by Bjorn Andersson

clk: qcom: gcc-sc8280xp: Add EMAC GDSCs

Add the EMAC GDSCs to allow the EMAC hardware to be enabled.
Acked-by: default avatarStephen Boyd <sboyd@kernel.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: default avatarBrian Masney <bmasney@redhat.com>
Signed-off-by: default avatarAndrew Halaney <ahalaney@redhat.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230413191541.1073027-2-ahalaney@redhat.com
parent 68d1151f
...@@ -6873,6 +6873,22 @@ static struct gdsc usb30_sec_gdsc = { ...@@ -6873,6 +6873,22 @@ static struct gdsc usb30_sec_gdsc = {
.pwrsts = PWRSTS_RET_ON, .pwrsts = PWRSTS_RET_ON,
}; };
static struct gdsc emac_0_gdsc = {
.gdscr = 0xaa004,
.pd = {
.name = "emac_0_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
};
static struct gdsc emac_1_gdsc = {
.gdscr = 0xba004,
.pd = {
.name = "emac_1_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
};
static struct clk_regmap *gcc_sc8280xp_clocks[] = { static struct clk_regmap *gcc_sc8280xp_clocks[] = {
[GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr, [GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr,
[GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr, [GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr,
...@@ -7351,6 +7367,8 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = { ...@@ -7351,6 +7367,8 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = {
[USB30_MP_GDSC] = &usb30_mp_gdsc, [USB30_MP_GDSC] = &usb30_mp_gdsc,
[USB30_PRIM_GDSC] = &usb30_prim_gdsc, [USB30_PRIM_GDSC] = &usb30_prim_gdsc,
[USB30_SEC_GDSC] = &usb30_sec_gdsc, [USB30_SEC_GDSC] = &usb30_sec_gdsc,
[EMAC_0_GDSC] = &emac_0_gdsc,
[EMAC_1_GDSC] = &emac_1_gdsc,
}; };
static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = { static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = {
......
...@@ -492,5 +492,7 @@ ...@@ -492,5 +492,7 @@
#define USB30_MP_GDSC 9 #define USB30_MP_GDSC 9
#define USB30_PRIM_GDSC 10 #define USB30_PRIM_GDSC 10
#define USB30_SEC_GDSC 11 #define USB30_SEC_GDSC 11
#define EMAC_0_GDSC 12
#define EMAC_1_GDSC 13
#endif #endif
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