Commit 32da8c85 authored by Alexandre Belloni's avatar Alexandre Belloni Committed by Nicolas Ferre

ARM: at91/dt: sam9261: Add ssc2, SSC clocks and pcks

Add ssc2 support, ssc2 pinctrl and clocks for the three SSCs.
Also add support for the programmable clocks.
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent b1059186
...@@ -29,6 +29,7 @@ aliases { ...@@ -29,6 +29,7 @@ aliases {
i2c0 = &i2c0; i2c0 = &i2c0;
ssc0 = &ssc0; ssc0 = &ssc0;
ssc1 = &ssc1; ssc1 = &ssc1;
ssc2 = &ssc2;
}; };
cpus { cpus {
...@@ -182,6 +183,8 @@ ssc0: ssc@fffbc000 { ...@@ -182,6 +183,8 @@ ssc0: ssc@fffbc000 {
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
clocks = <&ssc0_clk>;
clock-names = "pclk";
status = "disabled"; status = "disabled";
}; };
...@@ -191,6 +194,19 @@ ssc1: ssc@fffc0000 { ...@@ -191,6 +194,19 @@ ssc1: ssc@fffc0000 {
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
clocks = <&ssc1_clk>;
clock-names = "pclk";
status = "disabled";
};
ssc2: ssc@fffc4000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffc4000 0x4000>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
clocks = <&ssc2_clk>;
clock-names = "pclk";
status = "disabled"; status = "disabled";
}; };
...@@ -385,6 +401,22 @@ pinctrl_ssc1_rx: ssc1_rx-0 { ...@@ -385,6 +401,22 @@ pinctrl_ssc1_rx: ssc1_rx-0 {
}; };
}; };
ssc2 {
pinctrl_ssc2_tx: ssc2_tx-0 {
atmel,pins =
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
pinctrl_ssc2_rx: ssc2_rx-0 {
atmel,pins =
<AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
<AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
spi0 { spi0 {
pinctrl_spi0: spi0-0 { pinctrl_spi0: spi0-0 {
atmel,pins = atmel,pins =
...@@ -576,6 +608,38 @@ usb: usbck { ...@@ -576,6 +608,38 @@ usb: usbck {
clocks = <&pllb>; clocks = <&pllb>;
}; };
prog: progck {
compatible = "atmel,at91rm9200-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
prog2: prog2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
prog3: prog3 {
#clock-cells = <0>;
reg = <3>;
interrupts = <AT91_PMC_PCKRDY(3)>;
};
};
systemck { systemck {
compatible = "atmel,at91rm9200-clk-system"; compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>; #address-cells = <1>;
...@@ -593,6 +657,30 @@ udpck: udpck { ...@@ -593,6 +657,30 @@ udpck: udpck {
clocks = <&usb>; clocks = <&usb>;
}; };
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
pck2: pck2 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
pck3: pck3 {
#clock-cells = <0>;
reg = <11>;
clocks = <&prog3>;
};
hclk0: hclk0 { hclk0: hclk0 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <16>; reg = <16>;
...@@ -667,6 +755,21 @@ spi1_clk: spi1_clk { ...@@ -667,6 +755,21 @@ spi1_clk: spi1_clk {
reg = <13>; reg = <13>;
}; };
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <14>;
};
ssc1_clk: ssc1_clk {
#clock-cells = <0>;
reg = <15>;
};
ssc2_clk: ssc2_clk {
#clock-cells = <0>;
reg = <16>;
};
tc0_clk: tc0_clk { tc0_clk: tc0_clk {
#clock-cells = <0>; #clock-cells = <0>;
reg = <17>; reg = <17>;
......
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