Commit 3394cc0e authored by Nicolas Chauvet's avatar Nicolas Chauvet Committed by Thierry Reding

ARM: tegra: paz00: Add emc-tables for ram-code 1

The same table as ram-code 0 operates correctly on ram-code 1

v2: rebase on current kernel
Signed-off-by: default avatarNicolas Chauvet <kwizart@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 4cece764
......@@ -533,6 +533,49 @@ emc-table@333000 {
0x00000000 0x00000000 0x00000000 0x00000000>;
};
};
emc-tables@1 {
nvidia,ram-code = <0x1>;
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
emc-table@166500 {
reg = <166500>;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = <166500>;
nvidia,emc-registers = <0x0000000a 0x00000016
0x00000008 0x00000003 0x00000004 0x00000004
0x00000002 0x0000000c 0x00000003 0x00000003
0x00000002 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x000004df
0x00000000 0x00000003 0x00000003 0x00000003
0x00000003 0x00000001 0x0000000a 0x000000c8
0x00000003 0x00000006 0x00000004 0x00000008
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xe03b0323
0x007fe010 0x00001414 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000>;
};
emc-table@333000 {
reg = <333000>;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = <333000>;
nvidia,emc-registers = <0x00000018 0x00000033
0x00000012 0x00000004 0x00000004 0x00000005
0x00000003 0x0000000c 0x00000006 0x00000006
0x00000003 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x00000bff
0x00000000 0x00000003 0x00000003 0x00000006
0x00000006 0x00000001 0x00000011 0x000000c8
0x00000003 0x0000000e 0x00000007 0x00000008
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xf0440303
0x007fe010 0x00001414 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000>;
};
};
};
usb@c5000000 {
......
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